Re: [coreboot] Pavilion Chromebook 14 (Butterfly) Q&A session

[mrnuke]

On Monday, January 20, 2014 12:37:30 PM you wrote:
> I have some questions about this little guy. Fear not, your answers will be
> ported to the coreboot wiki at my earliest convenience.
> What is the maximum amount of RAM that it supports? Can in take in 2 x
>
> 8GiB modules? If so, are there any limitations as to the number of ranks?
> Are the slots dual channel, or are both slots routed to same channel?
>
> (From the source, I think it's dual.)
> If I install 1.35 V capable DIMMs, will coreboot run them at 1.35 V, or
>
> is 1.5 V the only option?
> If ECC modules are installed, will coreboot be able to enable ECC, or are
>
> those pins not even routed ?
> Why is SATA speed limited to 6Gbps (see devicetree.cb) ? From my
>
> understanding, the first SATA port on the chipset is 6G capable, as is the
> SSD shipping inside. Is this a board routing limitation, or copypasta? I
> can submit a patch if it's the latter.

6. Why is the max_ddr3_freq declared as 1600MHz when Intel's product page [1] 
claims the CPU can do 1333 Max. Copypasta, or truly 1600 MHz capable ?

[1] http://ark.intel.com/products/56056/
> Thanks,
> Alex