If its possible to verify the same by extracting binaries using a fit tool will be the best. Ideally CRC of IOM, MG & TBT fw CRC should match with that of working UEFI bios.
Also enabling CR4.MCE may help when things go wrong as it triggers exception handler.
If you have itp/dci/csript, then please step around code where it hangs. Exact instruction which cause hang may give some hint. Alternatively adding more printk around failure to locate exact failing point or nature of failure.
If clearing mca is skipped, does it still cause a hang ?
You mentioned: "engineering sample PCH have been forcing the ME into disabled state" Is this seen with UEFI bios ?
Regards, Naresh Solanki
On Tue, Aug 24, 2021 at 4:09 PM Michał Żygowski michal.zygowski@3mdeb.com wrote:
On 24.08.2021 11:45, Naresh G. Solanki wrote:
I remember working on an issue related to "FSP asserts on IOM ready check" I guess on ICL RVP It got fixed for me after making sure proper IOM binary was added using the fit tool.
I'm sure your setup is able to boot with vendor provided bios. Then other option is that you can extract iom.bin from a working bios & pack it into your generated coreboot fw. Then give it a try.
I couldn't get the IOM working despite preserving the ME region during flash updates. So literalyl I have been using the same IOM binary as shipped. Using the same IOM binary doesn't guarantee the correct operation of the TCSS and ends up in assert. Why? Because for some reason an engineering sample PCH have been forcing the ME into disabled state. No command could get ME out of this state which is probably the reason why IOM was not working correctly as well (ME didn't load the firmware?) or the FSP was not compatible with pre-production silicon.
Regards, Naresh Solanki
On Tue, Aug 24, 2021 at 2:39 PM Samek, Jan <jan.samek@siemens.com mailto:jan.samek@siemens.com> wrote:
Hello again Michal, I'd like to additionally ask you about a small detail regarding to the issue: What was the stepping that started to work? I'm currently encountering this behavior on B-0. I really did have some really bad memory init errors on A-0 which was considered an engineering sample and swapping for B-0 solved it. Nevertheless, this MCE issue still persists on B-0 in my case. Thanks for info. Regards, Jan Samek Siemens, s.r.o. ADV D EU CZ AE AC 7 jan.samek@siemens.com <mailto:jan.samek@siemens.com> _______________________________________________ coreboot mailing list -- coreboot@coreboot.org <mailto:coreboot@coreboot.org> To unsubscribe send an email to coreboot-leave@coreboot.org <mailto:coreboot-leave@coreboot.org>-- Best regards, Naresh G. Solanki
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Best regards,
Michał Żygowski Firmware Engineer GPG: 6B5BA214D21FCEB2 https://3mdeb.com | @3mdeb_com _______________________________________________ coreboot mailing list -- coreboot@coreboot.org To unsubscribe send an email to coreboot-leave@coreboot.org