Greetings,
I'll have to do a bit of studying, but the one thing that jumps out at me immediatly is bit 7 of register 0x8c. and 0x78-0x7b. The big difference there is that DRAM timings are backed off a bit, and 0x8c selects for 133 (266) MHz operation.
There will likely be a bit of trial and error with differences to the RAM configuration since there is no way to dump those settings out (unless someone knows something I don't).
0xe8-9 and 0x80-3 are not documented by Intel. 0x80 appears to involve CAS latency according to Eric (it certainly seems that way). That setting is at line 189 of e7501/raminit.inc.
G'day, sjames
On Thu, 10 Apr 2003, Terry B. Chen wrote:
We tested s2723 that use E7501 source code; I find linuxbios can not support dual channel memory. Then I try to disable hyper threading, the spot_check meet error again�� I have compare the E7501 with E7500 Bios spec, it have a lot of differences between these two chipsets including RCOMP programming. I suppose it need to modify in many site. This is the two the lspci file. I suppose you just need 00:00;0 400 FSB: 00:00.0 Host bridge: Intel Corp.: Unknown device 254c (rev 01) 00: 86 80 4c 25 06 01 90 00 01 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 40: 09 00 05 11 00 00 00 00 00 00 00 00 00 00 00 00 50: 04 60 0d 00 00 00 00 00 00 10 11 01 00 00 33 33 60: 00 00 08 08 08 08 08 08 00 00 00 00 00 00 00 00 70: 00 03 00 00 00 00 00 00 1f 04 01 39 79 02 67 20 80: b1 0b 71 00 00 00 00 00 00 98 10 d2 0d 00 00 00 90: 00 00 00 00 00 00 00 00 55 05 55 05 01 1a 38 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 44 c0 50 11 00 20 ff 03 00 00 00 00 00 00 00 00 d0: 02 28 00 0e 03 00 00 33 80 09 31 b5 00 00 01 01 e0: 1d 1d 00 00 00 00 00 00 56 46 00 00 00 00 00 00 f0: 00 00 00 00 74 00 30 40 40 0f 00 00 00 00 00 00 533 MHZ: 00:00.0 Host bridge: Intel Corp.: Unknown device 254c (rev 01) 00: 86 80 4c 25 06 01 90 00 01 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 00 00 00 40: 09 00 05 11 00 00 00 00 00 00 00 00 00 00 00 00 50: 04 60 0d 00 00 00 00 00 00 10 11 01 00 00 33 33 60: 00 00 08 08 08 08 08 08 00 00 00 00 00 00 00 00 70: 00 03 00 00 00 00 00 00 04 02 01 28 79 02 67 20 80: 62 06 71 00 00 00 00 00 00 98 10 d2 8d 00 00 00 90: 00 00 00 00 00 00 00 00 55 05 55 05 01 1a 38 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 44 c0 50 11 00 20 ff 03 00 00 00 00 00 00 00 00 d0: 02 28 00 0e 03 00 00 33 80 09 31 b5 00 00 01 01 e0: 1d 1d 00 00 00 00 00 00 54 4a 00 00 00 00 00 00 f0: 00 00 00 00 74 00 30 40 40 0f 00 00 00 00 00 00
-----Original Message----- From: steven james [mailto:pyro@linuxlabs.com] Sent: 2003��4��8�� 23:16 To: Terry B. Chen Cc: linuxbios@clustermatic.org Subject: Re: 533Mhz FSB of E7501
Greetings,
Most likely, there is an undocumented register issue in the northbridge.
With the OEM BIOS, can you send me an lspci with a 400 FSB and a 533 FSB. That should narrow things down.
G'day, sjames
On Tue, 8 Apr 2003, Terry B. Chen wrote:
Dear all; I am trying the Tyan 2723(E7501), but I find it will report spot_check error if the board run in 533 FSB. But if the CPU or the memory is 400 FSB it will be ok. Does anyone else meet the same problem?
Best regards Terry chen _______________________________________________ Linuxbios mailing list Linuxbios@clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios