On 5/26/10 1:34 PM, Arne Georg Gleditsch wrote:
I guess it's either that or moving the AMD MMCONF range down below the 32-bit barrier. If we want to do the latter anyway, perhaps we should just do it now.
That alone won't do it,.. There's the AMD specific MSR and %gs is not set to MMCONFIG_BASE on other chipsets/cpus. Not sure what to do about the MSR,... the %gs thing should probably fixed by setting up %gs in a central place somewhere.
Stefan