Stefan Reinauer (stefan.reinauer@coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1284
-gerrit
commit 8d5a1ddb04733d2094ea934bec72005497b46b94 Author: Stefan Reinauer reinauer@chromium.org Date: Wed Jun 13 16:31:50 2012 -0700
Fix automatic ME detection in finalize
The ME needs to be talked to through the PCIe memory mapped config space.
Change-Id: Ic2c5a572a126722a08a82d95df13d11507586c6b Signed-off-by: Stefan Reinauer reinauer@google.com --- src/southbridge/intel/bd82x6x/me.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index 0c40ab4..25b88b9 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -533,7 +533,7 @@ static void intel_me7_finalize_smm(void)
void intel_me_finalize_smm(void) { - u32 did = pci_read_config32(PCH_ME_DEV, PCI_VENDOR_ID); + u32 did = pcie_read_config32(PCH_ME_DEV, PCI_VENDOR_ID); switch (did) { case 0x80861c3a: intel_me7_finalize_smm();