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hmm, probably should have tried that first, I suppose. I did a bunch of init for it, and it currently causes a kernel panic. Thanks!
It has only set some bits for the SMM by BIOS, which we dont need. So nothing is needed.
Hre is mu promised update:
Hmm I tried to set some bits for socket 939 in fun2 0x90 and 0x94, seems that RAM works now for two dimms ;) Perhaps I need to develop some fix? I will write about this later.
Just after some S3 ;)
- - PCI_ADDR(0, 0x18, 2, 0x8c), 0xff8fe08e, (0 << 20)|(0 << 8)|(0 << 4)|(0 << 0), + PCI_ADDR(0, 0x18, 2, 0x8c), 0xff8fe08e, (0 << 20)|(0 << 8)|(0 << 4)|(1 << 0), //change!
I enlarged the Write-to-Read Delay to 2 clocks as my AW is doing.
- - PCI_ADDR(0, 0x18, 2, 0x90), 0xf0000000, + PCI_ADDR(0, 0x18, 2, 0x90), 0xc0000000, + (1 << 29)| //change (4 << 25)|(0 << 24)| (0 << 23)|(0 << 22)|(0 << 21)|(0 << 20)| (1 << 19)|(0 << 18)|(1 << 17)|(0 << 16)| (2 << 14)|(0 << 13)|(0 << 12)| - - (0 << 11)|(0 << 10)|(0 << 9)|(0 << 8)| + (0 << 11)|(0 << 10)|(1 << 9)|(0 << 8)| //CHANGE DUAL DIMM ENABLE (0 << 3) |(0 << 1) |(0 << 0),
And then also bit9
Dual DIMM Enable (DualDimmEn)--Bit 9. When this bit is set, the A copy of the memory address bus is enabled, regardless of the MC0_EN (Function 2, Offset 94h) value, and the B copy of the memory bus is disabled if 939 package with 128-bit bus is not used. This bit should be set if unbuffered DIMMs are used, and two DIMM sockets are connected to the A copy of the memory address bus, as in SODIMM or 939 package configurations. See "Register Differences in Revisions of the AMD AthlonTM 64 and AMD OpteronTM Processors" on page 29 for revision information about this field.
And 29:
Upper Chip Select Mapping (UpperCSMap)--Bit 29. When this bit is set, chip select pins CS[7:4] are copies of chip select pins CS[3:0]. This bit should be set if the 939 package is used. See "Register Differences in Revisions of the AMD AthlonTM 64 and AMD OpteronTM Processors" on page 29 for revision information about this field.
After that my 2 DIMMS works fine it seems.
Rudolf