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[coreboot - Bug #321] (Resolved) NVME in X16 port issue
by Felix Singer 11 Feb '22

11 Feb '22

Issue #321 has been updated by Felix Singer. Status changed from New to Resolved ---------------------------------------- Bug #321: NVME in X16 port issue https://ticket.coreboot.org/issues/321#change-878 * Author: Francois Ollonois * Status: Resolved * Priority: Normal * Start date: 2021-09-07 ---------------------------------------- I have used latest git version of coreboot to build a rom for my ASUS P5QL-EM. I have some strange behavior: I use a **X16 nvme** Adapter in the X16 graphic card slot. I also want to use an add-on gpu card (nvidia GT710 **PCIe X1**) to be able to use higher resolution displays. With the bare board without any card everything works fine, but when I plug in the nvme adapter card with ssd, only the VGA output is working, but it is shiftet one character to the left. HDMI and DVI output are dead. It is possible to boot from the nvme ssd in this configuration. When the GT710 is pluged in, it is no longer possible to boot from the nvme ssd. (Read Error) ---Files-------------------------------- p5ql-em.config (17 KB) coreboot_p5ql_with_nvme_hdmi (40.7 KB) lspci_vendor.txt (61.9 KB) lspci_coreboot_root2.txt (64.3 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #249] (Closed) Clean up jasperlake_rvp devictree
by Felix Singer 11 Feb '22

11 Feb '22

Issue #249 has been updated by Felix Singer. Status changed from New to Closed ---------------------------------------- Bug #249: Clean up jasperlake_rvp devictree https://ticket.coreboot.org/issues/249#change-877 * Author: Aamir Bohra * Status: Closed * Priority: Normal * Assignee: Aamir Bohra * Start date: 2019-12-27 ---------------------------------------- Current jasperlake_rvp mainboard CL: https://review.coreboot.org/c/coreboot/+/37557 is based on copy from icelake_rvp . Once this is merged, devicetree needs to be cleaned up as per JSL SOC. This bug tracks further jasperlake_rvp mainboard devicetree cleanup -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #22] (Resolved) X230 native raminit failed
by Felix Singer 11 Feb '22

11 Feb '22

Issue #22 has been updated by Felix Singer. Status changed from Needs Testing to Resolved ---------------------------------------- Bug #22: X230 native raminit failed https://ticket.coreboot.org/issues/22#change-876 * Author: Patrick Rudolph * Status: Resolved * Priority: Normal * Assignee: Patrick Rudolph * Start date: 2016-01-10 ---------------------------------------- Native raminit failed with: "edge write discovery failed". It's failing on channel 1 with two DIMMs installed, while it has no problems booting with a single DIMM. The test fails on lane 1. These are the Cvals of channel 1: Cval: 1, 1, 0, 26 Cval: 1, 1, 1, 21 Cval: 1, 1, 2, 41 Cval: 1, 1, 3, 4d Cval: 1, 1, 4, 4e Cval: 1, 1, 5, 52 Cval: 1, 1, 6, 2c Cval: 1, 1, 7, 5e Cval: 1, 0, 0, 22 Cval: 1, 0, 1, 5e Cval: 1, 0, 2, 3b Cval: 1, 0, 3, 4a Cval: 1, 0, 4, 4a Cval: 1, 0, 5, 4c Cval: 1, 0, 6, 29 Cval: 1, 0, 7, 5b Values for the same lane are about the same (+- 6units), but only lane 1 shows a huge offset of 61. ---Files-------------------------------- x230_edge_write_discovery_failed.log (911 KB) debugboot1.txt (61.7 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #45] (Closed) F2A85-M fails to detect 24-32GB of RAM properly
by Felix Singer 11 Feb '22

11 Feb '22

Issue #45 has been updated by Felix Singer. Status changed from Response Needed to Closed Closed. No response since 5 years. ---------------------------------------- Bug #45: F2A85-M fails to detect 24-32GB of RAM properly https://ticket.coreboot.org/issues/45#change-875 * Author: Daniel Kulesz * Status: Closed * Priority: Normal * Assignee: Kyösti Mälkki * Start date: 2016-04-25 ---------------------------------------- Hi, I am running Coreboot 4.3 release on the Asus F2a85-M with 16GB of Crucial Ballistix Sport DDR-1600 DIMMs at 1,5V (2 sticks). When I populate the remaining RAM slots with another 2 sticks of the same type, the system does not boot to the Payload. When I put only 1 of the additional sticks in (so in total I should have 24GB), the system boots fine but I am seeing 78GB (!!) of memory detected on the operating system - see the attached output. I don't have the coreboot config at hand, but I am just running basically 4.3 release configured for this board together with the vgabios blob. Is it safe to try the 4.4 prerelease to see if the bug can be reproduced there as well? I am just asking because I have no separate chip as backup nor the proper clip for hardware flashing this device. ---Files-------------------------------- memtotal.txt (1.21 KB) coreboot.rom.bz2 (446 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #37] (Closed) x220/native graphics: after some time the display shows only a one color blur image.
by Felix Singer 11 Feb '22

11 Feb '22

Issue #37 has been updated by Felix Singer. Status changed from Response Needed to Closed Closed. No response since 5 years. ---------------------------------------- Bug #37: x220/native graphics: after some time the display shows only a one color blur image. https://ticket.coreboot.org/issues/37#change-874 * Author: Alexander Couzens * Status: Closed * Priority: Normal * Start date: 2016-03-12 ---------------------------------------- After some time the display goes into a one color blur mode. Everything but the display continues to work. Changing to another tty doesn't help. Workaround: suspend/resume <pre> [22770.401257] [drm:intel_set_pch_fifo_underrun_reporting [i915]] *ERROR* uncleared pch fifo underrun on pch transcoder A </pre> ---Files-------------------------------- config (349 Bytes) dmesg_with_resume_with_native_graphics_with_failure (154 KB) dmesg_with_resume_with_native_graphics_without_failure (126 KB) dmesg_vgabios (126 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #47] (Closed) Wsxga+ screens display Grub incorrectly
by Felix Singer 11 Feb '22

11 Feb '22

Issue #47 has been updated by Felix Singer. Status changed from Response Needed to Closed Closed. No response since 5 years. ---------------------------------------- Bug #47: Wsxga+ screens display Grub incorrectly https://ticket.coreboot.org/issues/47#change-873 * Author: Kete Foy * Status: Closed * Priority: Normal * Start date: 2016-04-27 ---------------------------------------- Wsxga+ screens partition Grub output into a few sections, and one of the sections is blank; so it's hard to use the Grub commandline. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #147] (Closed) Backlight level setting is not restored when the display wakes up from sleep on ThinkPad X230
by Felix Singer 11 Feb '22

11 Feb '22

Issue #147 has been updated by Felix Singer. Status changed from Feedback to Closed Closed. No response since 3 years. ---------------------------------------- Bug #147: Backlight level setting is not restored when the display wakes up from sleep on ThinkPad X230 https://ticket.coreboot.org/issues/147#change-872 * Author: Tobis Greer * Status: Closed * Priority: Normal * Start date: 2017-11-03 ---------------------------------------- I am using Ubuntu 17.10, it also occurred on 17.04. Whenever the display is sleeping (the laptop is still awake, just the display is off), and when it wakes up again (by moving the mouse, or issuing a keypress); then the backlight setting is at 100% regardless of what it was set at before the display went to sleep. If I press the Fn+F8 key to set it again, one press is enough for the backlight level to go down several increments; back to where it was before the display turned off. This didn't happen with the same Ubuntu install but running the stock BIOS. For context, here is an excerpt from the mailing list: ~~~ this is a known issue. It actually was there all the time but only got more visible with the introduction of ACPI/OpRegion for the inte- grated GFX. Here is what I found out so far (on my ArchLinux): w/o OpRegion: 1. `acpi_video` driver gets loaded, systemd restores brightness from last shutdown. 2. `i915` driver gets loaded, reads the current brightness. 3. `i915` exposes backlight as `intel_backlight`, systemd restores brightness from last shutdown here as well. Every time `i915` power cycles the backlight, it restores the value it has seen when it was loaded. w/ Opregion the order somehow changes to 2. 1. 3., now `i915` always restores to 100% that it read before systemd restored the brightness. A sane solution would be to extend XBCM in `src/drivers/intel/gma/acpi/ configure_brightness_levels.asl` to always notify `i915` when we change the backlight through OpRegion mailbox 3. ~~~ Happy to provide more logs or details as required. Thanks! -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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New Defects reported by Coverity Scan for coreboot
by scan-admin＠coverity.com 11 Feb '22

11 Feb '22

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 1 new defect(s) introduced to coreboot found with Coverity Scan. 1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 1 of 1 defect(s) ** CID 1469611: (OVERRUN) /src/soc/amd/cezanne/psp_verstage/uart.c: 16 in get_uart_base() /src/soc/amd/cezanne/psp_verstage/uart.c: 25 in get_uart_base() /src/soc/amd/cezanne/psp_verstage/uart.c: 17 in get_uart_base() ________________________________________________________________________________________________________ *** CID 1469611: (OVERRUN) /src/soc/amd/cezanne/psp_verstage/uart.c: 16 in get_uart_base() 10 { 11 uint32_t err; 12 13 if (idx > ARRAY_SIZE(uart_bars)) 14 return 0; 15 >>> CID 1469611: (OVERRUN) >>> Overrunning array "uart_bars" of 1 4-byte elements at element index 1 (byte offset 7) using index "idx" (which evaluates to 1). 16 if (uart_bars[idx]) 17 return (uintptr_t)uart_bars[idx]; 18 19 err = svc_map_fch_dev(FCH_IO_DEVICE_UART, idx, 0, &uart_bars[idx]); 20 if (err) { 21 svc_debug_print("Failed to map UART\n"); /src/soc/amd/cezanne/psp_verstage/uart.c: 25 in get_uart_base() 19 err = svc_map_fch_dev(FCH_IO_DEVICE_UART, idx, 0, &uart_bars[idx]); 20 if (err) { 21 svc_debug_print("Failed to map UART\n"); 22 return 0; 23 } 24 >>> CID 1469611: (OVERRUN) >>> Overrunning array "uart_bars" of 1 4-byte elements at element index 1 (byte offset 7) using index "idx" (which evaluates to 1). 25 return (uintptr_t)uart_bars[idx]; /src/soc/amd/cezanne/psp_verstage/uart.c: 17 in get_uart_base() 11 uint32_t err; 12 13 if (idx > ARRAY_SIZE(uart_bars)) 14 return 0; 15 16 if (uart_bars[idx]) >>> CID 1469611: (OVERRUN) >>> Overrunning array "uart_bars" of 1 4-byte elements at element index 1 (byte offset 7) using index "idx" (which evaluates to 1). 17 return (uintptr_t)uart_bars[idx]; 18 19 err = svc_map_fch_dev(FCH_IO_DEVICE_UART, idx, 0, &uart_bars[idx]); 20 if (err) { 21 svc_debug_print("Failed to map UART\n"); 22 return 0; 23 } 24 25 return (uintptr_t)uart_bars[idx]; ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P…

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4.15 issue on pcengines apu2
by Jan Eidtmann 11 Feb '22

11 Feb '22

Greetings, with 4.15 access to my mSATA SSD on freebsd 13 (opnsense 22.1) times out. Reverting to 4.14 fixes the issue. I have posted some details in the opnsense forum here: https://forum.opnsense.org/index.php?topic=26661.0 NOK: https://pcengines.github.io/#mr-54 OK: https://pcengines.github.io/#mr-52 Please let me know if this is a known issue and wether it has been fixed in 4.16. Also please let me know if you need more information or help with testing. Jan

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asus p2b logs - change: cpu/x86/lapic: Move LAPIC configuration to MP init
by Branden Waldner 09 Feb '22

09 Feb '22

With https://review.coreboot.org/c/coreboot/+/58387 merged, my p2b board hangs at seabios. I've attached serial logs from a rom of this commit and the previous one. Branden

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