coreboot

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39687 discussions

Personal challenge | Ramp up on coreboot : Trials on aftermarket X58 motherboards.
by Master 15 Feb '22

15 Feb '22

Hello everyone, I hope you're doing fine I would like to do some trials to see if I may be able to support few boards I have cause they are aftermarket withoout EFI and without firmware updates and not working as I would like them to. (https://askubuntu.com/questions/1370496/cant-boot-latests-lives-for-install…) I really would not like to throw them... They are X58 chipset with ICH10 with Xeon Westmere on socket 1366 and SuperIO NCT5532D. (https://www.intel.com/content/dam/doc/datasheet/x58-express-chipset-datashe…) (https://www.intel.com/content/dam/doc/datasheet/io-controller-hub-10-family…) (https://datasheetspdf.com/pdf-file/1042365/novoTon/NCT5532D/1) I have the tooling to backup and restore the flash and already done that few time. I have built latest coreboot (4.14 using lenovo x201 config) with EDK2 firmware as payload (edk2-stable202108 NOOPT) successfully but nothing is happening after flash swap and power on. I have RS232 debug working at ttyS0 (at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A) From the original firmware, just after power on, even before any bip or display or keyboard light I see "Socket = 0" on serial, so the the original firmware is able to output to this serial very early. I read quite a lot of literature about coreboot, but still, I am not sure how to pursue now. Thanks in advance, Have a nice day, Best Regards, Mickaël.

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Proposition to revert GCC 11
by Arthur Heymans 15 Feb '22

15 Feb '22

Hi There have been some reports of GCC11 not booting on some AGESA fam15 platforms and on Intel ironlake. I confirmed that on my X201 (ironlake). The system hangs at an endless loop during heci init. The code generated doing that part is not wrong, which makes me think that other code in that 5k+ LOC file is incorrectly generated. Figuring out what is going on: whether that gcc revision is broken or our code is going to take some time. Clang (with some patches to get it to build) does result in a booting image btw. Also my fedora35 gcc11 has the same issue. My initial approach for figuring out what function is incorrectly generated is to move them over in a separate file and replace the .o file with a gcc8 generated .o file. That approach will take some time for sure as there are a lot of functions in that 5K LOC file. Another suggestion was to bisect gcc, which is more straightforward. Any suggestions for a faster/better approach? I'm suggesting reverting gcc while this issue is being sorted out. One issue with this however is that older GCC don't build anymore with my fedora gcc11 toolchain. However this can likely easily be fixed using docker. GCC 8.3 was the previous revision we used but there have been a lot of releases in between so those could be considered too. Kind regards Arthur

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New on blogs.coreboot.org: KGPE-D16 open-source firmware status
by blogs.coreboot.org 14 Feb '22

14 Feb '22

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Fwd: T440P
by Mike Banon 12 Feb '22

12 Feb '22

---------- Forwarded message --------- From: Patrick Bratu <patrick(a)bratu.de> Date: Thu, Feb 10, 2022 at 1:56 PM Subject: Re: [coreboot] T440P To: Mike Banon <mikebdp2(a)gmail.com> Hello Mr. Banon here is my config thankyou very much Best regards Am 29.01.22 um 16:09 schrieb Mike Banon: > Please share your coreboot .config , describe the errors and give us > more info to help you > > On Tue, Jan 25, 2022 at 2:51 PM Patrick Bratu <patrick(a)bratu.de> wrote: >> Hello dear team of Coreboot I tried to install CoreBoot with SeaBios on >> my T440p with dGPU but I can not get the graphics card to show up and >> when installing Arch also always come errors can you help me please? >> >> Best Regards >> >> _______________________________________________ >> coreboot mailing list -- coreboot(a)coreboot.org >> To unsubscribe send an email to coreboot-leave(a)coreboot.org > > -- Best regards, Mike Banon Open Source Community Manager of 3mdeb - https://3mdeb.com/

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[coreboot - Bug #338] (New) test issue
by Test User 11 Feb '22

11 Feb '22

Issue #338 has been reported by Test User. ---------------------------------------- Bug #338: test issue https://ticket.coreboot.org/issues/338 * Author: Test User * Status: New * Priority: Normal * Start date: 2022-02-11 ---------------------------------------- test -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #317] (Resolved) "make savedefconfig" broken
by Felix Singer 11 Feb '22

11 Feb '22

Issue #317 has been updated by Felix Singer. Status changed from In Progress to Resolved ---------------------------------------- Bug #317: "make savedefconfig" broken https://ticket.coreboot.org/issues/317#change-883 * Author: Wladislav Artsimovich * Status: Resolved * Priority: Normal * Start date: 2021-08-04 ---------------------------------------- With Manjaro Linux and newest Updates, in coreboot git master, performing `make savedefconfig` without errors out with: ~~~ cp: missing destination file operand after '/home/gigi/coreboot-debug/Latest/.config' Try 'cp --help' for more information. make: *** [/home/gigi/coreboot-debug/Latest/util/kconfig/Makefile.inc:34: savedefconfig] Error 1 ~~~ System info: ~~~ System: Host: gigi-pc Kernel: 5.10.53-1-MANJARO x86_64 bits: 64 compiler: gcc v: 11.1.0 Desktop: Budgie 10.5.3 wm: budgie-wm dm: LightDM Distro: Manjaro Linux base: Arch Linux CPU: Info: Quad Core model: Intel Core2 Extreme Q9300 bits: 64 type: MCP arch: Penryn rev: A cache: L2: 6 MiB flags: lm nx pae sse sse2 sse3 sse4_1 ssse3 bogomips: 20277 Speed: 2533 MHz min/max: 1600/2534 MHz boost: enabled Core speeds (MHz): 1: 2533 2: 2534 3: 2534 4: 2534 Graphics: Device-1: Intel Mobile 4 Series Integrated Graphics vendor: Lenovo driver: i915 v: kernel bus-ID: 00:02.0 chip-ID: 8086:2a42 Display: x11 server: X.Org 1.20.11 compositor: budgie-wm driver: loaded: intel resolution: 1920x1200 s-dpi: 96 OpenGL: renderer: Mesa DRI Mobile Intel GM45 Express (CTG) v: 2.1 Mesa 21.1.5 direct render: Yes ~~~ -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #246] (Closed) Remove Jasperlake Preprod device IDs when Jasperlake Production SKU is available
by Felix Singer 11 Feb '22

11 Feb '22

Issue #246 has been updated by Felix Singer. Status changed from New to Closed ---------------------------------------- Bug #246: Remove Jasperlake Preprod device IDs when Jasperlake Production SKU is available https://ticket.coreboot.org/issues/246#change-882 * Author: Aamir Bohra * Status: Closed * Priority: Normal * Category: chipset configuration * Start date: 2019-12-10 ---------------------------------------- Initial Jasperlake develeopement code is adding Jasperlake Pre-Production SKU device IDs. Once the production SOC SKU is available these IDs would become obsolete and needs to cleaned up. This Bug is intended to track the clean up once the Production SKU is available and Pre-Prod SKU phases out. https://review.coreboot.org/c/coreboot/+/37434 -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #302] (Closed) You need to be root
by Felix Singer 11 Feb '22

11 Feb '22

Issue #302 has been updated by Felix Singer. Status changed from New to Closed No response after 11 months. Closing. ---------------------------------------- Bug #302: You need to be root https://ticket.coreboot.org/issues/302#change-881 * Author: Tim L * Status: Closed * Priority: Normal * Start date: 2021-03-29 ---------------------------------------- ~~~ # ./intelmetool -m iopl: Operation not permitted You need to be root. # id uid=0(root) gid=0(root) groups=0(root) ~~~ -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #48] (Closed) Linux fails to boot with embedded GRUB payload but works with embedded SeaBIOS payload
by Felix Singer 11 Feb '22

11 Feb '22

Issue #48 has been updated by Felix Singer. Status changed from New to Closed ---------------------------------------- Bug #48: Linux fails to boot with embedded GRUB payload but works with embedded SeaBIOS payload https://ticket.coreboot.org/issues/48#change-880 * Author: Timothy Pearson * Status: Closed * Priority: Normal * Category: os_handoff * Start date: 2016-04-28 ---------------------------------------- When booting an ASUS KGPE-D16 with the embedded GRUB payload Linux fails to acquire the ACPI IRQ and/or tables; booting the same board and OS image with the embedded SeaBIOS payload works fine. Log of failed kernel boot from GRUB attached; logs of the successful kernel boot under SeaBIOS are forthcoming. ---Files-------------------------------- kgpe-d16-grub-linux-acpi-failure.log (21.2 KB) kgpe-d16-seabios-linux-success.log (376 KB) kgpe-d16-grub-linux-4.5-failure.log (366 KB) kgpe-d16-seabios-linux-4.5-success.log (379 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #93] (Closed) Romstage messages missing on Asus KGPE-D16
by Felix Singer 11 Feb '22

11 Feb '22

Issue #93 has been updated by Felix Singer. Status changed from New to Closed ---------------------------------------- Bug #93: Romstage messages missing on Asus KGPE-D16 https://ticket.coreboot.org/issues/93#change-879 * Author: Paul Menzel * Status: Closed * Priority: Normal * Start date: 2017-01-31 ---------------------------------------- With no CMOS battery (not tested with one yet), and using the user option table (CMOS/NVRAM) nothing is shown on the serial console until 40 s right before ramstage starts. ``` # This image was built using coreboot 4.5-917-g545edca CONFIG_ANY_TOOLCHAIN=y CONFIG_USE_OPTION_TABLE=y CONFIG_COLLECT_TIMESTAMPS=y CONFIG_USE_BLOBS=y CONFIG_BOOTBLOCK_NORMAL=y CONFIG_VENDOR_ASUS=y CONFIG_BOARD_ASUS_KGPE_D16=y CONFIG_NO_POST=y CONFIG_COREBOOT_ROMSIZE_KB_16384=y CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI=y CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x40000 CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3=y CONFIG_PAYLOAD_GRUB2=y CONFIG_GRUB2_EXTRA_MODULES="boottime" CONFIG_GRUB2_INCLUDE_RUNTIME_CONFIG_FILE=y CONFIG_COREINFO_SECONDARY_PAYLOAD=y CONFIG_MEMTEST_SECONDARY_PAYLOAD=y CONFIG_MEMTEST_MASTER=y CONFIG_NVRAMCUI_SECONDARY_PAYLOAD=y CONFIG_TINT_SECONDARY_PAYLOAD=y ``` Please find the log from CBMEM console attached. ---Files-------------------------------- 20170131–coreboot–asus_kgpe-d16–cbmem-c.txt (84.5 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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