coreboot

coreboot@coreboot.org

25 participants
39547 discussions

no docipl after make
by Tobias Kloss 23 Jun '03

23 Jun '03

Hi, i have an old gigabyte board with the 430TX chipset on it. For configuration i used the example from src/mainborads/digitallogic/smartcore-p5/config.example, because it uses the 430tx as northbridge and the piix4 as southbridge as my board does. After running the python program, i started to make a romimage. But i don't get the docipl file after make finshed. What can i do? Thanks, Tobias Kloss This is my lspci output: 00:00.0 Host bridge: Intel Corp. 430TX - 82439TX MTXC (rev 01) 00:07.0 ISA bridge: Intel Corp. 82371AB/EB/MB PIIX4 ISA (rev 01) 00:07.1 IDE interface: Intel Corp. 82371AB/EB/MB PIIX4 IDE (rev 01) 00:07.2 USB Controller: Intel Corp. 82371AB/EB/MB PIIX4 USB (rev 01) 00:07.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 01) 00:08.0 VGA compatible controller: Matrox Graphics, Inc. MGA 2164W [Millennium II] 00:0a.0 Ethernet controller: 3Com Corporation 3c905B 100BaseTX [Cyclone] (rev 24)

1 0

Re: 440bx Mouse function (fixed)
by Richard Smith 23 Jun '03

23 Jun '03

Oops... Sent this dirctly to ron instead of the list like I wanted. ron minnich wrote: > I'm not checked out on this particular problem, most of my nodes don't do > mice. :-( > I solved my no mouse issues. The problem was that the keyboard_on() in southbridge.c was setting the KBCSS# enable bit and I didn't realize it. The KBCSS# enable causes the piix4e to assert KBCS# and XOE# upon access to io ports 60 and 64. These are basically chip selects for a setup that dosn't have decoding of these io port build in. Our NSC PC87351 superio dosen't need these lines as it does its own IO decodeing of these ports. And even though these lines aren't hooked to anything on our board if this bit is enabled then the mouse won't work. Kinda of wierd since the keyboard works fine and they both use the same IO addresses. So this enable needs to be an option rather than hardcoded as its motherboard dependant if you need this bit set or not. I suspect that almost all modern superios will _not_ need any help with IO decode so I'll default this to off. Ron: did you ever attempt to sync the 440bx code with patch file I sent you? If not then don't worry about it as I have change quite a bit since then. Most of it is just a lot of addtional prink_debugs to show what the code is doing and where it happens but there is a fix or 2 in there as well. I'm also adding some things like getting the USB bridge setup right. Linux still whines about not being able to get the irq. -- Richard A. Smith rsmith(a)bitworks.com

1 0

Gigabyte GA-7DXR
by Stefan 23 Jun '03

23 Jun '03

Hi there, does anyone know if this LinuxBIOS works on my GA-7DXR from Gigabyte?

6 10

patch for my mainboard?
by John Praveen 23 Jun '03

23 Jun '03

Hi, I am new to LinuxBios. I got the source for Linuxbios through CVS. It is given in the doc that some patch has to be applied to the kernel. Is applying this patch is a compulsory one even if we use the kernel version 2.4.17 or higher? I guess that the patches are related to the mainboard. I dont find a patch corresponding to my mainboard. What should be done then? Plz help me. __________________________________ Do you Yahoo!? SBC Yahoo! DSL - Now only $29.95 per month! http://sbc.yahoo.com

2 1

Which Kernel to be used?
by Devi Priya 23 Jun '03

23 Jun '03

Hello, I want to build LinuxBIOS for SC1200. I have the kernel 2.4.18-14 (Redhat 8.0). Can I use the same kernel to be used by linuxbios? If I use this kernel then what patch should I apply from freebios/src/kernel_patches/ directory to build for sc1200? Or else should I use the kernel linux-2.4.0-test12?(ie is it mandatory to use this kernel?) For this what patch should I apply to build it for the sc1200? Thanks for any help in advance. _________________________________________________________________ Gift yourself a holiday. Treat your family like royalty. http://www.flexihols.com/2003/index.php

2 1

Gigabyte GA-7DXR
by Stefan 22 Jun '03

22 Jun '03

Hi! Does anyone know if LinuxBIOS works on a GA-7DXR? SuSE 8.0 is working perfect! Here are the lspci results: linux:~ # lspci 00:00.0 Host bridge: Advanced Micro Devices [AMD] AMD-760 [Irongate] System Controller (rev 13) 00:01.0 PCI bridge: Advanced Micro Devices [AMD] AMD-760 [Irongate] AGP Bridge 00:07.0 ISA bridge: VIA Technologies, Inc. VT82C686 [Apollo Super South] (rev 40) 00:07.1 IDE interface: VIA Technologies, Inc. Bus Master IDE (rev 06) 00:07.2 USB Controller: VIA Technologies, Inc. UHCI USB (rev 1a) 00:07.3 USB Controller: VIA Technologies, Inc. UHCI USB (rev 1a) 00:07.4 SMBus: VIA Technologies, Inc. VT82C686 [Apollo Super ACPI] (rev 40) 00:0a.0 Network controller: AVM Audiovisuelles MKTG & Computer System GmbH A1 ISDN [Fritz] (rev 02) 00:0c.0 Multimedia audio controller: Creative Labs SB Live! EMU10k1 (rev 07) 00:0c.1 Input device controller: Creative Labs SB Live! (rev 07) 00:0d.0 Multimedia video controller: Brooktree Corporation Bt878 (rev 02) 00:0d.1 Multimedia controller: Brooktree Corporation Bt878 (rev 02) 00:0f.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139 (rev 10) 00:10.0 RAID bus controller: Promise Technology, Inc. 20265 (rev 02) 01:05.0 VGA compatible controller: nVidia Corporation: Unknown device 0202 (rev a3) linux:~ # lspci -v 00:00.0 Host bridge: Advanced Micro Devices [AMD] AMD-760 [Irongate] System Controller (rev 13) Flags: bus master, medium devsel, latency 32 Memory at c0000000 (32-bit, prefetchable) [size=256M] Memory at db023000 (32-bit, prefetchable) [size=4K] I/O ports at 9000 [disabled] [size=4] Capabilities: [a0] AGP version 2.0 00:01.0 PCI bridge: Advanced Micro Devices [AMD] AMD-760 [Irongate] AGP Bridge (prog-if 00 [Normal decode]) Flags: bus master, 66Mhz, medium devsel, latency 32 Bus: primary=00, secondary=01, subordinate=01, sec-latency=32 Memory behind bridge: d8000000-d9ffffff Prefetchable memory behind bridge: d0000000-d7ffffff 00:07.0 ISA bridge: VIA Technologies, Inc. VT82C686 [Apollo Super South] (rev 40) Subsystem: VIA Technologies, Inc. VT82C686/A PCI to ISA Bridge Flags: bus master, stepping, medium devsel, latency 0 Capabilities: [c0] Power Management version 2 00:07.1 IDE interface: VIA Technologies, Inc. Bus Master IDE (rev 06) (prog-if 8a [Master SecP PriP]) Subsystem: VIA Technologies, Inc. Bus Master IDE Flags: bus master, medium devsel, latency 32 I/O ports at 9400 [size=16] Capabilities: [c0] Power Management version 2 00:07.2 USB Controller: VIA Technologies, Inc. UHCI USB (rev 1a) (prog-if 00 [UHCI]) Subsystem: Unknown device 0925:1234 Flags: bus master, medium devsel, latency 32, IRQ 11 I/O ports at 9800 [size=32] Capabilities: [80] Power Management version 2 00:07.3 USB Controller: VIA Technologies, Inc. UHCI USB (rev 1a) (prog-if 00 [UHCI]) Subsystem: Unknown device 0925:1234 Flags: bus master, medium devsel, latency 32, IRQ 11 I/O ports at 9c00 [size=32] Capabilities: [80] Power Management version 2 00:07.4 SMBus: VIA Technologies, Inc. VT82C686 [Apollo Super ACPI] (rev 40) Subsystem: VIA Technologies, Inc. VT82C686 [Apollo Super ACPI] Flags: medium devsel, IRQ 9 Capabilities: [68] Power Management version 2 00:0a.0 Network controller: AVM Audiovisuelles MKTG & Computer System GmbH A1 ISDN [Fritz] (rev 02) Subsystem: AVM Audiovisuelles MKTG & Computer System GmbH FRITZ!Card ISDN Controller Flags: medium devsel, IRQ 10 Memory at db024000 (32-bit, non-prefetchable) [size=32] I/O ports at a000 [size=32] 00:0c.0 Multimedia audio controller: Creative Labs SB Live! EMU10k1 (rev 07) Subsystem: Creative Labs: Unknown device 8064 Flags: bus master, medium devsel, latency 32, IRQ 5 I/O ports at a400 [size=32] Capabilities: [dc] Power Management version 1 00:0c.1 Input device controller: Creative Labs SB Live! (rev 07) Subsystem: Creative Labs Gameport Joystick Flags: bus master, medium devsel, latency 32 I/O ports at a800 [size=8] Capabilities: [dc] Power Management version 1 00:0d.0 Multimedia video controller: Brooktree Corporation Bt878 (rev 02) Subsystem: Hauppauge computer works Inc. WinTV/GO Flags: bus master, medium devsel, latency 32, IRQ 7 Memory at db020000 (32-bit, prefetchable) [size=4K] 00:0d.1 Multimedia controller: Brooktree Corporation Bt878 (rev 02) Subsystem: Hauppauge computer works Inc. WinTV/GO Flags: bus master, medium devsel, latency 32, IRQ 7 Memory at db021000 (32-bit, prefetchable) [size=4K] 00:0f.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139 (rev 10) Subsystem: Realtek Semiconductor Co., Ltd. RT8139 Flags: bus master, medium devsel, latency 32, IRQ 11 I/O ports at ac00 [size=256] Memory at db022000 (32-bit, non-prefetchable) [size=256] Capabilities: [50] Power Management version 2 00:10.0 RAID bus controller: Promise Technology, Inc. 20265 (rev 02) Subsystem: Promise Technology, Inc. Ultra100 Flags: bus master, medium devsel, latency 32, IRQ 11 I/O ports at b000 [size=8] I/O ports at b400 [size=4] I/O ports at b800 [size=8] I/O ports at bc00 [size=4] I/O ports at c000 [size=64] Memory at db000000 (32-bit, non-prefetchable) [size=128K] Expansion ROM at <unassigned> [disabled] [size=128K] Capabilities: [58] Power Management version 1 01:05.0 VGA compatible controller: nVidia Corporation: Unknown device 0202 (rev a3) (prog-if 00 [VGA]) Subsystem: Micro-star International Co Ltd: Unknown device 5305 Flags: bus master, 66Mhz, medium devsel, latency 32, IRQ 5 Memory at d8000000 (32-bit, non-prefetchable) [size=16M] Memory at d0000000 (32-bit, prefetchable) [size=64M] Memory at d4000000 (32-bit, prefetchable) [size=512K] Expansion ROM at <unassigned> [disabled] [size=64K] Capabilities: [60] Power Management version 2 Capabilities: [44] AGP version 2.0 thx & greetings

2 1

答复: new config language.
by YhLu 21 Jun '03

21 Jun '03

Eric, I have added some hardcode to northbridge/amd/amdk8/coherent_ht.c. Till now, I can not change NodeID from 7 to 1 for the second Node. Do I need to send the coherent_ht.c to Stefan to check or after I finished the debug? Regards Yinghai Lu -----邮件原件----- 发件人: YhLu 发送时间: 2003年6月20日 14:23 收件人: ebiederman(a)lnxi.com 抄送: ron minnich; linuxbios(a)clustermatic.org 主题: 答复: new config language. Eric, S2880 is 2P and it is ready. S4880 is 4P and it is on-going. Regards Yinghai Lu -----邮件原件----- 发件人: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] 发送时间: 2003年6月20日 14:11 收件人: YhLu 抄送: ron minnich; linuxbios(a)clustermatic.org 主题: Re: new config language. YhLu <YhLu(a)tyan.com> writes: > Eric, > > Thanks for the info about ROMCC. Welcome. Given that we are switching to writing all of the code before memory is initialized knowing how stable the main tool for doing the job is useful. And the list was copied so I don't have to mention it multiple times. > The code about mem init in northbridge/amd/amdk8/coherent_ht.c and > northbridge/amd/amdk8/raminit.c had some overlap. On bus 0, dev 0x18 and f > 1. Very peculiar as I don't see that code and the actual coherent HT mapping is just concerned with function 0. The mapping which specifies which resources go where is on function 1. > I will add something at northbridge/amd/amdk8/coherent_ht.c There are some peculiarities as the code is a first pass at properly factoring it. I think I made a good stab at it but the code still needs to be generalized. An important thing to not is that when the code is done there should be no board specific hard codes, excpet in code that lives in auto.c Do you have a 4P case or just 2P? Eric _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

3 2

newbie question
by tcook 20 Jun '03

20 Jun '03

I am working on the Super Micro P4DPR-IGM I am trying to get linuxbios installed I run cmos_util -d > $filename And when it creates $filename It gives me this message at the top. ************************************************************************ ********************************************************* # The CMOS Definition table was not found in ram # CMOS definition table was not found in RAM memory # Looking for definitions in cmos.layout file # WARNING - Select only one option per entry # reserved_memory = 185445500431042106032602508000004066f08803800200fc010019eb231aeb1b100010 b28102000000f500f8ff0a28 ************************************************************************ *********************************************************** Like I said I am fairly new to this I am still trying to figure out how it works and if there is a howto for the super micro MB's or if the howto's for the older boards will work. could some please help me. Thank you Tim Cook ""A man is not idle because he is absorbed in thought. There is a visible labor and there is an invisible labor "" "Victor Hugo <http://www.promicrosystems.com/> "

2 1

答复: new config language.
by YhLu 20 Jun '03

20 Jun '03

Eric, S2880 is 2P and it is ready. S4880 is 4P and it is on-going. Regards Yinghai Lu -----邮件原件----- 发件人: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] 发送时间: 2003年6月20日 14:11 收件人: YhLu 抄送: ron minnich; linuxbios(a)clustermatic.org 主题: Re: new config language. YhLu <YhLu(a)tyan.com> writes: > Eric, > > Thanks for the info about ROMCC. Welcome. Given that we are switching to writing all of the code before memory is initialized knowing how stable the main tool for doing the job is useful. And the list was copied so I don't have to mention it multiple times. > The code about mem init in northbridge/amd/amdk8/coherent_ht.c and > northbridge/amd/amdk8/raminit.c had some overlap. On bus 0, dev 0x18 and f > 1. Very peculiar as I don't see that code and the actual coherent HT mapping is just concerned with function 0. The mapping which specifies which resources go where is on function 1. > I will add something at northbridge/amd/amdk8/coherent_ht.c There are some peculiarities as the code is a first pass at properly factoring it. I think I made a good stab at it but the code still needs to be generalized. An important thing to not is that when the code is done there should be no board specific hard codes, excpet in code that lives in auto.c Do you have a 4P case or just 2P? Eric

1 0

Re: power connectors for mainboards
by Peter Fedorow 20 Jun '03

20 Jun '03

I also have a need for multicomputer (motherboard only) ATX power supplies. Chances are we aren't the only ones, so perhaps it wouldn't hurt to suggest such a product to a high quality power supply manufacturer? My requirements don't necessitate the motherboard being able to turn off it's power. Within the next 6 months I expect to need: 20-60 units : At up to $30 / computer When I have the budget approved for them I'm thinking of contacting PC Power and Cooling to see if they're interested. Their Turbo-Cool 425 ATX/ATX12V in 12-31 units is on sale for $125.74 each right now, and its rated at: +5V @ 40A +12V @ 20A -5V @ .3A -12V @ 1A +3.3v @ 40A +5VSB @ 2A (With +5 and +3.3 combined < 300W) They're very conservatively rated power supplies, and I've never had one fail, (even in the most brutal environment I know of on computers schools.) The only power output limitation I see for the purpose is the 5VSB power. Some NICs (particularly Gigabit, and older 100 Mbs ones,) draw more than that for the WOL. But as the computers are diskless I don't have a need for that feature. How many quad output power supplies do you expect to need?

2 1

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot