coreboot

coreboot@coreboot.org

10 participants
39711 discussions

答复: [COMMIT] linuxbios 1.1.6....
by YhLu 11 Mar '04

11 Mar '04

I'm working on it. -----邮件原件----- 发件人: Hendricks David W. [mailto:dwh@lanl.gov] 发送时间: 2004年3月11日 14:17 收件人: Eric W. Biederman 抄送: LinuxBIOS 主题: Re: [COMMIT] linuxbios 1.1.6.... Looks to work on the HDAMA, but the S2885 is horribly broken. Good thing next week is my spring break :) _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

1 0

Epia-M IDE HowTo
by linuxbios＠chvojka.at 11 Mar '04

11 Mar '04

Hi, I have a EPIA-M (ME6000) and I want to use Linuxbios for my HTPC. So I want to boot from hd. Is there anywhere a good HowTo for this. The HowTo in the cvs for talks only about etherboot. greetz

3 2

Re: COMPAQ Armada 1530D
by Stefan 11 Mar '04

11 Mar '04

Hi there, I ran the lspci on my notebook, here's the result: phreak:~# lspci 00:00.0 Host Bridge: OPTi Inc. 82C701 [FireStar Plus] (rev 10) 00:01.0 ISA Bridge: OPTi Inc. 82C700 (rev 10) 00:02.0 VGA compatible controller: Cirrus Logic GD 7548 00:11.0 CardBus bridge: Texas Instruments PCI 1131 (rev 01) 00:11.1 CardBus bridge: Texas Instruments PCI 1131 (rev 01) 00:14.0 IDE interface: OPTi Inc. 82C825 [Firebridge 2] (rev 12) Hope you can use this reply, thx & greetings

3 2

ACPI support
by YhLu 11 Mar '04

11 Mar '04

Stefan, It seems that you put some code about acpi in the tree. What's your plan about that? Can I use that together with ACPI support in Kernel to make "shutdown -h now" to be real shutdown the power? Regards YH

4 9

Re: TODO: K8 CG stepping support
by ebiederman＠lnxi.com 11 Mar '04

11 Mar '04

Stefan Reinauer <stepan(a)suse.de> writes: > * Eric W. Biederman <ebiederman(a)lnxi.com> [040311 16:58]: > > Just an FYI there is some work needed to support the latest K8 steppings > > mostly they are Athlon64s. And that is the one item I forgot to put > > on my todo list... > > Can you give some details? There are some memory controller enhancements. 2T timings I think. And possibly some memory loading requirements. There are one or two other things, power control or irq stuff. And I think there one or two errata. It is nothing huge but it should all be covered in the latest BIOS programmers guide and the revision guide for the K8. And I believe the CG stepping is publicly documented now so anyone who wants to look through things and make certain we are uptodate should be able to do it just by wading through the docs. AMD keeps enhancing things and their processor keeps getting better. We poor BIOS guys just have to keep up. Oh and there is the cpu name string that we could fill in if we felt so inclined. I don't think I have ever gotten that far. I'm busy working on a different port so I don't think I will refresh Opteron code past the C0 stepping any time soon. Anyway it is probably more important to make certain we have the normal Opteron ports working before we get to far into that. I am just trying to flush my queue of outstanding issues before they start suffering from bit rot. A lot of the code I flushed today has been running on Lightning and Orange for a while. I think everything except the cleaned up superio. Eric

1 0

OEM looking at LinuxBIOS
by Anthony Winner 11 Mar '04

11 Mar '04

Hello all, I work for a OEM and I'm playing with the idea of using linuxBIOS, I have all of the technical info for the machine short of the actual source code to the Phoenix BIOS we use now as it was done by a contractor before I joined the company. Are there any pointers for a 'from scratch', implementation? Should I start with the old code or start fresh from the new freebios2 tree? For reference, the machine is a Intel PIII with a 82830 Northbridge, a 82801ca Southbridge, TI pci1450 card bus controller, and a pair of SMC SIO chips.... Anthony Winner WalkAbout Computers awinner(a)walkabout-comp.com (561)712-1200 x221

3 2

TODO: K8 CG stepping support
by ebiederman＠lnxi.com 11 Mar '04

11 Mar '04

Just an FYI there is some work needed to support the latest K8 steppings mostly they are Athlon64s. And that is the one item I forgot to put on my todo list... Eric

1 0

COMPAQ Armada 1530D
by Stefan 11 Mar '04

11 Mar '04

Hi LinuxBIOS-users ;) I got a compaq armada 1530d notebook, is it possible to run linuxbios on it? Is there a command to enter ? thx

2 1

答复: 答复: Prefmem of bus 3
by YhLu 11 Mar '04

11 Mar '04

You'd better commit the additional commet made by Eirc. > /* For a non bridge resource granularity and alignment are the same. > * For a bridge resource align is the largest needed alignment below > * the bridge. While the granularity is simply how many low bits of the > * address cannot be set. > */ YH. -----邮件原件----- 发件人: ron minnich [mailto:rminnich@lanl.gov] 发送时间: 2004年3月10日 20:24 收件人: Eric W. Biederman 抄送: YhLu; 'LinuxBIOS' 主题: Re: 答复: Prefmem of bus 3 On 10 Mar 2004, Eric W. Biederman wrote: > > It has the additional comment: > > /* Get the resource granularity */ > gran = 1UL << resource->gran; > > /* For a non bridge resource granularity and alignment are the same. > * For a bridge resource align is the largest needed alignment below > * the bridge. While the granularity is simply how many low bits of the > * address cannot be set. > */ > > /* Get the limit (rounded up) */ > limit = base + ((resource->size + gran - 1UL) & ~(gran - 1UL)) -1UL; not to worry, Ollie and I fixed it too. We're going to have some real collisions when you commit. We are using the round() function for clarity, e.g. limit = base + round(resource->size, gran) - 1UL; ron

1 0

答复: Prefmem of bus 3
by YhLu 11 Mar '04

11 Mar '04

I mean /* Get the base address */ base = resource->base; /* Get the resource alignment */ align = 1UL << resource->align; /* Get the limit (rounded up) */ limit = base + ((resource->size + align - 1UL) & ~(align - 1UL)) -1UL; should be changed. -----邮件原件----- 发件人: YhLu 发送时间: 2004年3月9日 20:14 收件人: YhLu; ebiederman(a)lnxi.com; ron minnich 抄送: LinuxBIOS 主题: re: Prefmem of bus 3 Eric, I print out the allocating spew and found the align calculation seems not correct. PCI: 01:02.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 03:03.0 10 * [0x00000000 - 0x0fffffff] prefmem PCI: 03:03.0 18 * [0x10000000 - 0x13ffffff] prefmem <null> compute_allocate_prefmem: base: 14000000 size: 14000000 align: 28 gran: 20 done When computing limit in pci_set_device of pci_device.c, only using align. So will produce limit=0xffffffff, instead of 0xf3ffffff. So maybe need to using gran together with align and base to calculate the limit. Regards YH Allocating resources... Root Device compute_allocate_io: base: 00000400 size: 00000000 align: 0 gran: 0 PCI: 00:18.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 01:01.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 02:0a.0 10 * [0x00000000 - 0x000000ff] io PCI: 02:0a.1 10 * [0x00000400 - 0x000004ff] io <null> compute_allocate_io: base: 00000500 size: 00001000 align: 12 gran: 12 done PCI: 01:01.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 <null> compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 01:01.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 02:09.0 10 * [0x00000000 - 0x0000ffff] mem PCI: 02:09.0 18 * [0x00010000 - 0x0001ffff] mem PCI: 02:09.1 10 * [0x00020000 - 0x0002ffff] mem PCI: 02:09.1 18 * [0x00030000 - 0x0003ffff] mem PCI: 02:0a.0 14 * [0x00040000 - 0x0004ffff] mem PCI: 02:0a.0 1c * [0x00050000 - 0x0005ffff] mem PCI: 02:0a.1 14 * [0x00060000 - 0x0006ffff] mem PCI: 02:0a.1 1c * [0x00070000 - 0x0007ffff] mem <null> compute_allocate_mem: base: 00080000 size: 00100000 align: 20 gran: 20 done PCI: 01:02.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 <null> compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 done PCI: 01:02.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 03:03.0 10 * [0x00000000 - 0x0fffffff] prefmem PCI: 03:03.0 18 * [0x10000000 - 0x13ffffff] prefmem <null> compute_allocate_prefmem: base: 14000000 size: 14000000 align: 28 gran: 20 done PCI: 01:02.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 <null> compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 01:03.0 compute_allocate_io: base: 00000000 size: 00000000 align: 12 gran: 12 PCI: 04:01.0 missing read_resources PCI: 04:06.0 14 * [0x00000000 - 0x000000ff] io PCI: 04:05.0 18 * [0x00000400 - 0x0000047f] io PCI: 04:05.0 10 * [0x00000480 - 0x000004bf] io PCI: 04:05.0 14 * [0x000004c0 - 0x000004cf] io <null> compute_allocate_io: base: 000004d0 size: 00001000 align: 12 gran: 12 done PCI: 01:03.0 compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 04:01.0 missing read_resources <null> compute_allocate_prefmem: base: 00000000 size: 00000000 align: 20 gran: 20 done PCI: 01:03.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 04:01.0 missing read_resources PCI: 04:06.0 10 * [0x00000000 - 0x00ffffff] mem PCI: 04:05.0 20 * [0x01000000 - 0x0101ffff] mem PCI: 04:00.0 10 * [0x01020000 - 0x01020fff] mem PCI: 04:00.1 10 * [0x01021000 - 0x01021fff] mem PCI: 04:05.0 1c * [0x01022000 - 0x01022fff] mem PCI: 04:06.0 18 * [0x01023000 - 0x01023fff] mem PCI: 04:00.2 10 * [0x01024000 - 0x010240ff] mem PCI: 04:00.2 14 * [0x01025000 - 0x0102501f] mem <null> compute_allocate_mem: base: 01025020 size: 01100000 align: 24 gran: 20 done PCI: 01:04.5 missing read_resources PCI: 01:04.6 missing read_resources PCI: 01:01.0 1c * [0x00000000 - 0x00000fff] io PCI: 01:03.0 1c * [0x00001000 - 0x00001fff] io PCI: 01:02.0 1c * [0x00002000 - 0x00001fff] io PCI: 01:04.2 10 * [0x00002000 - 0x0000201f] io PCI: 01:04.1 20 * [0x00002020 - 0x0000202f] io <null> compute_allocate_io: base: 00002030 size: 00003000 align: 12 gran: 12 done PCI: 00:18.0 compute_allocate_mem: base: 00000000 size: 00000000 align: 20 gran: 20 PCI: 01:04.5 missing read_resources PCI: 01:04.6 missing read_resources PCI: 01:02.0 24 * [0x00000000 - 0x13ffffff] prefmem PCI: 01:03.0 20 * [0x14000000 - 0x150fffff] mem PCI: 01:01.0 20 * [0x15100000 - 0x151fffff] mem PCI: 01:01.0 24 * [0x15200000 - 0x151fffff] prefmem PCI: 01:02.0 20 * [0x15200000 - 0x151fffff] mem PCI: 01:03.0 24 * [0x15200000 - 0x151fffff] prefmem PCI: 01:01.1 10 * [0x15200000 - 0x15200fff] mem PCI: 01:02.1 10 * [0x15201000 - 0x15201fff] mem <null> compute_allocate_mem: base: 15202000 size: 15300000 align: 28 gran: 20 done PCI: 00:18.0 c0 * [0x00001000 - 0x00003fff] io <null> compute_allocate_io: base: 00004000 size: 00003c00 align: 12 gran: 0 done Root Device compute_allocate_mem: base: 00000000 size: 00000000 align: 0 gran: 0 PCI: 00:18.0 b8 * [0x00000000 - 0x152fffff] mem <null> compute_allocate_mem: base: 15300000 size: 15300000 align: 28 gran: 0 done Root Device compute_allocate_io: base: 00001000 size: 00003c00 align: 12 gran: 0 PCI: 00:18.0 c0 * [0x00001000 - 0x00003fff] io <null> compute_allocate_io: base: 00004000 size: 00003000 align: 12 gran: 0 done Root Device compute_allocate_mem: base: e0000000 size: 15300000 align: 28 gran: 0 PCI: 00:18.0 b8 * [0xe0000000 - 0xf52fffff] mem <null> compute_allocate_mem: base: f5300000 size: 15300000 align: 28 gran: 0 done -----邮件原件----- 发件人: YhLu 发送时间: 2004年3月1日 13:10 收件人: 'ebiederman(a)lnxi.com'; ron minnich 抄送: LinuxBIOS 主题: 答复: Prefmem of bus 3 Some time you said that arima board connect all PCI-X slots of amd 8131 irq to amd 8111 ioapic intead of 8131. So even disable ioapic of 8131, device on PCI-X still works properly. After enable ioapic of 8131, devices that are not using prefmem works well. YH. -----邮件原件----- 发件人: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] 发送时间: 2004年3月1日 10:48 收件人: ron minnich 抄送: YhLu; ebiederman(a)lnxi.com; LinuxBIOS 主题: Re: Prefmem of bus 3 ron minnich <rminnich(a)lanl.gov> writes: > On Fri, 27 Feb 2004, YhLu wrote: > > > Have you ever tested myrinet card on K8 MB under LinuxBIOS? > > we have a 1408-node K8 machine with myrinet working under linuxbios, and a > 256-node K8 machine working with linuxbios. Arima HDAMA mainboards. > > I wonder what's going on here, I have not had time to look in detail. So the problem appears to be that the prefmem region on the upper bus is to large. I wonder if why this work on LANL clusters and not on others is the result of code skew. Lightning nodes with myrinet only seem to have one prefmem region. Yet another reminder that I really need to finish syncing up the code bases. Eric

3 3

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot