coreboot

coreboot@coreboot.org

10 participants
39711 discussions

RE: Linux Startup Times [PMX:#]
by John Usher (Maptek) 03 Apr '04

03 Apr '04

without rc scripts - I'm talking before getting to the starting init stage... -----Original Message----- From: ron minnich [mailto:rminnich@lanl.gov] Sent: Friday, 2 April 2004 12:09 PM To: John Usher (Maptek) Cc: linuxbios(a)clustermatic.org Subject: Re: Linux Startup Times [PMX:#] On Fri, 2 Apr 2004, John Usher (Maptek) wrote: > Linux startup times? Linux on our systems is taking more than 10 seconds > to start, and I guess its due to it searching for devices and the like. with/without the rc scripts? ron

2 1

Can I execute a linuxbios image from linux?
by Svante Signell 03 Apr '04

03 Apr '04

Hello, I'm trying to upgrade the CPU on a 440BX dual board MSI-6210 from dual Celerons (Mendocino) to a single Celeron2 (Tualatin) using a socket 370 to slot 1 adapter, SLOT-T from Upgradeware. On other 440BX based motherboards, this works perfectly. Two computers I have upgraded are a QDI BrillianX 1 based box and the Compaq 5670. The lates BIOS for the 6120 does not support Coppermine or Tualatin processors. With the 6120, I get a successful boot too, but the effective speed is 7 MHz as compared to expected 1.3GHz (measured with lmbench). I have made a small kernel module testing the level 2 cache activation code, without any improvements. Also mtrr seems to be set up correctly. Now I would like to execute a full linuxbios image after boot to linux, in order to avoid the problem of re-flashing the BIOS. Is this possible? The Upgradeware support pages mentions that the IO chips have to be of correct type for a similar single CPU board, the MSI-6119 to uork with the SLOT-T adapter. What function does the IO chip have, and how can in be tested? Thanks, Svante

5 8

Linux Startup Times
by John Usher (Maptek) 02 Apr '04

02 Apr '04

Hi all, Its a bit off topic, but has anyone here done any work on reducing the Linux startup times? Linux on our systems is taking more than 10 seconds to start, and I guess its due to it searching for devices and the like. Any pointers to any resources or information to assist with reducing these times would be great. ...John...

4 4

unreliably booting off a BCM5701.
by Stefan Reinauer 01 Apr '04

01 Apr '04

Hi, 1.1.6 seems really picky when using etherboot for network booting. The link seems very often to go up and down at will, before a real boot happens. See attached log. Any idea? Regards, Stefan ----------------------------------------------------------------------- LinuxBIOS-1.1.6.0-Fallback Mo Mär 22 17:42:39 CET 2004 starting... setting up resource map....done. ht reset - LinuxBIOS-1.1.6.0-Fallback Mo Mär 22 17:42:39 CET 2004 starting... setting up resource map....done. Initializing memory: done Clearing LinuxBIOS memory: done Testing DRAM : 00000000-00100000 DRAM fill: 00000000-00100000 00100000 DRAM filled DRAM verify: 00000000-00100000 00100000 DRAM verified Done. Copying LinuxBIOS to ram. Jumping to LinuxBIOS. Jumping to LinuxBIOS. ROM segment 0xb7fa length 0xff3e reloc 0x00020000 CPU 1650 Mhz Etherboot 5.3.6 (GPL) http://etherboot.org Tagged ELF for [TG3][IDE] Relocating _text from: [000264e0,00058510) to [1fecdfd0,1ff00000) Boot from (N)etwork or (Q)uit? ^TProbing pci nic... [tg3-5701]Ethernet addr: 00:04:76:E0:11:99 Tigon3 [partno(3C996B-T) rev 0105 PHY(5701)] (PCI:33MHz:32-bit) Link is up at 1000 Mbps, full duplex. TX RX flow control Searching for server (DHCP)... .Link is down. Link is up at 1000 Mbps, full duplex. TX RX flow control Link is down. Link is up at 1000 Mbps, full duplex. TX RX flow control Link is down. Link is up at 1000 Mbps, full duplex. TX RX flow control .Link is down. [..] Link is up at 1000 Mbps, full duplex. TX RX flow control ..Me: 192.168.0.2, Server: 192.168.0.1 Loading 192.168.0.1:kernel.elf ...(ELF)... ........... [..] ......done Firmware type: LinuxBIOS -- Stefan Reinauer, SUSE LINUX AG Head of Architecture Development

2 6

abit SI-1Ns
by Michael Hale 01 Apr '04

01 Apr '04

Hi all, I have an abit SI-1Ns with an intel 845GV chipset. I would like to put linuxbios on this board... but according to the status page it looks like this board is not supported. I am an applications programmer, not a hardware programmer... so I am somewhat at a loss as to where I should start. Can someone point me in the right direction for getting linuxbios running on this board? Thanks, Michael

2 1

VIA EPIA question
by root 01 Apr '04

01 Apr '04

hello, I've been watching an reading a lot in this interesting adventure... I've been trying to get Linuxbios work first on a SiS530 but through mailing list, tree docs, and surroundings i didn't find out enough support on this. So i decide to switch to another board that have been greatly tested. I am willing now to make LinuxBios work on a Apollo PLE133 mainboard, this is a VIA EPIA chipset based motherboard (http://www.viavpsd.com/product/epia_mini_itx_spec.jsp?motherboardId=21) 00.0 Host bridge: VIA 0601 (rev5) 01.0 PCI bridge : VIA 8601 11.0 ISA bridge : VIA 8231 11.1 IDE interf : VT82C586 (rev6) 11.2 USB interf : VT82C586B (rev 1e) 11.3 USB interf : VT82C586B (rev 1e) 11.4 Bridge : VIA 8235 (rev10) 11.5 audio : VIA 3058 (rev 40) 12.0 Ethernet : VIA 3065 (rev51) 1:00.0 VGA Trident: 8500(rev 6a) on a via C3 CPU working kernel 2.4.18 I'am looking for a kernel patch for VIA Epia on this kernel but couldn't find one. Would it mean it needn't a fix ? Also wandering on a "easiest" way to get my config work : on v1 or in v2 (I got to take care of the portability with v1-v2 issues?) Knowing that at the end (of this adventure:) I will make it boot on a M-DoC 2000... yet firstly I'll burn a bios chip and boot a IDE HD... step by step :) This is a RFC, so anything helpful on my methods, developpement risk, wayouts, adviced other docs are very welcome Thanks. Mathieu Deschamps, _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

2 1

More n00by questions...
by Vic Berdin 01 Apr '04

01 Apr '04

Hi everyone, Which kernel patch should I apply having this hardware? Processor & southbridge: AMDGX2 + CS5535 BIOS chip: SST49LF008A FWH `lspci -n`: 00:01.0 Class 0600: 100b:0028 (rev 21) 00:01.1 Class 0300: 100b:0030 00:0e.0 Class 0200: 10ec:8139 (rev 10) 00:0f.0 Class 0601: 100b:002b (rev 13) 00:0f.2 Class 0101: 100b:002d 00:0f.3 Class 0401: 100b:002e 00:0f.4 Class 0c03: 100b:002f (rev 06) 00:0f.5 Class 0c03: 100b:002f (rev 06) TIA - Vic

3 6

nowby question
by root 01 Apr '04

01 Apr '04

1 0

product using linuxbios
by Andre Dias 31 Mar '04

31 Mar '04

We have launched a product using linuxbios here in Brasil, its a jukebox for pubs, but we use ogg vorbis and we have developed the entire system (including a hard disk distribution based in debian and one for the bios based in busybox). I have been using sis730 motherboards, but they are pretty scarce in the market right now. We use linuxbios for a faster boot, for maintenance, in case there is a HD problem, to avoid CMOS reset problems and because its cool ;) Have a look at the machine: http://www.digipop.com.br/produtos.htm (website in portuguese).

1 0

答复: S2885 ht reset multi chain.
by YhLu 31 Mar '04

31 Mar '04

You should ask Eric, because I just wrap the code to call scan_ht_chain several times. All the info should be removed and do it dynamically, but the problem the code is in auto.c, and romcc would produce large code. Unless romcc can produce the small code, I think we can let everything to be done dynamically. YH -----邮件原件----- 发件人: Li-Ta Lo [mailto:ollie@lanl.gov] 发送时间: 2004年3月31日 14:37 收件人: YhLu 抄送: 'ron minnich'; 'linuxbios(a)clustermatic.org' 主题: Re: S2885 ht reset multi chain. On Thu, 2004-03-25 at 21:42, YhLu wrote: > Stefan, > > Please try this one. Remove the mindev in struct. And use next_unitid to > calculate the dev min and max. > > Can you try that in AMD quartet to see if ht reset works. > > You may need to add several lines in auto.c > > > static const struct ht_chain ht_c[] = { > { > .udev = PCI_DEV(0, 0x18, 0), > .upos = 0xc0, > .devreg = 0xe0, > }, > { > .udev = PCI_DEV(0, 0x19, 0), > .upos = 0xa0, > .devreg = 0xe4, > }, > }; > Why don't you use LDT[-02] instead of register address like .upos ? It is much easier to understand. Ollie

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot