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39711 discussions

Is LinuxBIOS still alive?
by Marc Nicholas 25 Jul '04

25 Jul '04

Hello... I used to be on the LinuxBIOS list a few years back...the website seems a little dry on information these days -- is LB still alive and kicking? I'm specifically interested in getting things working with VIA Mini-ITX boards, namely the M and MII. -marc

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sis630et memory init problem
by zhu shi song 25 Jul '04

25 Jul '04

Hi, lists, I've got one ECS p6stmt motherboard based on sis630et. I have dumped pci host bridge settings: P6STMT 00:00.0 Host bridge: Silicon Integrated Systems: Unknown device 0630 (rev 30) 00: 39 10 30 06 07 00 10 22 30 00 00 06 00 20 80 00 10: 00 00 00 d8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 9e 00 c5 00 00 19 00 01 00 15 51 00 00 00 00 00 60: 0b 00 00 a1 00 00 00 00 01 50 c6 00 e0 00 00 00 70: 3f 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 20 ff 7f 1f 60 00 03 40 00 08 00 00 78 88 00 55 90: 00 00 00 00 40 00 00 01 00 00 00 00 02 00 00 00 a0: 00 00 03 01 aa 00 00 00 00 00 00 00 00 00 f8 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 02 00 20 00 07 02 00 1f 04 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 SPD dump: Memory Type 0x04 Number of Row Address bits 0x0d Number of Column Address bits 0x0a Number of Sides 0x01 Number of Banks 0x04 I try to set the values just as the same as bios settings. But when ipl use stack, it hangs on copying linuxbios from DOC. It's obvious that memory init failed. I noticed that 0x8e is 0, It's very different with winfast6300's. winfast6300 0x8e is 03. What's the problem behind it? tks zhu --------------------------------- Do you Yahoo!? Yahoo! Mail is new and improved - Check it out!

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Does LinuxBIOS V2 support AGP (vedio card) for via/epia board
by Simon Xin Cheng 23 Jul '04

23 Jul '04

I successfully boot Linux kernel 2.6.7 by LinuxBIOS V2 + filo. However, I have to disable AGP support in the kernel because I got some errors when Kernel initialized agpgart. I checked the source code. It seems that AGP is not supported for via/epia board either in V1 or in V2. Am I right? How can I obtain AGP support? I need Xwindow. Thanks. Simon Cheng www.msica.com

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AMD 8111 GPIO
by Jay Miller 23 Jul '04

23 Jul '04

We've got Linux up and running on our Tyan S2885 motherboards, using etherboot and filo with USB support. Thanks for all your help, and patience! I was hoping that with all the expertise here with AMD 8111 chipset, that someone would be able to answer my question. Although it's not strictly LinuxBIOS, it is Linux. ;-) So I'm trying to write a Linux driver for the GPIO pins on the AMD 8111. I saw a comment in amd8111_smbus.c that PMIOEN is set. I believe this is part of what I need to be able to drive the GPIOs. But how/where were all those hex values determined? The spec uses mnemonics to abstract the addresses, and I don't see how they correlate. Thanks, Jay Miller 781-229-7812x117 Actuality Systems, Inc. jmiller(a)acutality-systems.com

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Re: Sis 630 memory init
by Richard Smith 23 Jul '04

23 Jul '04

zhu shi song wrote: > Do you know what errors of original code have been corrected after using the new code? My suggestion would be to dump the northbridge of a BIOS that works correctly and compare it to what LinuxBios does. The go consult the data sheet on each difference.

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Re: Sis 630 memory init
by Richard Smith 23 Jul '04

23 Jul '04

zhu shi song wrote: > Where is work placed? Can you kindly send me for reference? > Look in northbridge/intel/440bx/raminit.inc > I have checked the value of (sdram type, row, col, bank ,side ) through post code(output to 0x80 port). They are all correct values. But I still can't use SDRAM on ECS P6STMT board. > Do you know what errors of original code have been corrected after using the new code? > tks If I remember correctly the page size and the ram boundrys were not being set correctly. The orginal RAM routines tried to set all the registers in one big loop so it was really hard to debug. I switced to the newer code since it did things one step at a time and would be easier to debug. Switching had the side-effect of making things work so I didn't bother totaly figureing out what was wrong with the orginal code.

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Starting point for a SuperIO port (SMC LPC47B272)
by Chris Love 22 Jul '04

22 Jul '04

I am trying to bring up LinuxBIOS on an x86 CPCI blade here. Output from lspci is included below. The one item I've noticed so far is that the SuperIO device doesn't appear to be supported in either source tree. The northbridge, southbridge, and BIOS flash device (82802AC) appear to be supported in the freebios tree. Has anyone dealt with this SuperIO device before? Are any of the other SMC superio drivers a good or bad starting point for a port? My first step is probably going to be comparing datasheets between this and some of the other devices, but other suggestions would be welcome. Thanks in advance, Chris 00:00.0 Host bridge: Intel Corp.: Unknown device 254c (rev 01) 00:02.0 PCI bridge: Intel Corp. e7500 [Plumas] HI_B Virtual PCI Bridge (F0) (rev 01) 00:1d.0 USB Controller: Intel Corp. 82801CA/CAM USB (Hub #1) (rev 02) 00:1e.0 PCI bridge: Intel Corp. 82801BA/CA/DB PCI Bridge (rev 42) 00:1f.0 ISA bridge: Intel Corp. 82801CA ISA Bridge (LPC) (rev 02) 00:1f.1 IDE interface: Intel Corp. 82801CA IDE U100 (rev 02) 00:1f.3 SMBus: Intel Corp. 82801CA/CAM SMBus (rev 02) 01:01.0 SCSI storage controller: LSI Logic / Symbios Logic 53c896 (rev 07) 01:01.1 SCSI storage controller: LSI Logic / Symbios Logic 53c896 (rev 07) 01:02.0 Ethernet controller: Intel Corp. 82559ER (rev 09) 01:03.0 Ethernet controller: Intel Corp. 82559ER (rev 09) 01:05.0 Serial controller: Exar Corp.: Unknown device 0154 (rev 03) 01:08.0 Ethernet controller: Intel Corp. 82801CAM (ICH3) PRO/100 VE (LOM) Ethernet Controller (rev 42) 02:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) 02:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) 02:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) 02:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) 03:01.0 PCI bridge: Intel Corp. 21154 PCI-to-PCI Bridge 03:02.0 VGA compatible controller: Silicon Motion, Inc. SM710 LynxEM (rev a3) 05:01.0 Ethernet controller: Intel Corp. 82546EB Gigabit Ethernet Controller (Copper) (rev 01) 05:01.1 Ethernet controller: Intel Corp. 82546EB Gigabit Ethernet Controller (Copper) (rev 01) -- Chris Love // Continuous Computing Corporation love(a)ccpu.com // http://www.ccpu.com

1 0

Was a newbie, now a polliwog
by Thomas Fritz 22 Jul '04

22 Jul '04

I became interested in linuxbios a while back, and while I've subscribed to this list I've never done anything with it. I've learned quite a bit more since then, and I'm even working on reading the Linux From Scatch book. I've come back around to it again, for two reasons...I have a working laptop (IBM TP 390X), and an extra mainboard for the laptop. I have to do a password recovery on mainboard, but I was thinking if I'm going to go through the trouble, I would like to try something with it. Especially with the TSSOP flash bios chip within easy reach :) The other reason...I've been looking at embedded applications lately, and I don't really feel like going the DIY hardware route...since I have access to a surplus source of IBM thin clients (403GCX PPC, PC87303 SuperIO, S3 Trio64V+ video, single PCMCIA slot, two EDO SIMM slots, parport, serial, mouse/keybd, DP83907 ATLANTIC II ethernet, and a whopping 512KB AM29F040 flash bios), which have everything I could want, except USB, which a PCMCIA card could fix. What I want to do with one of the thin clients is put on linuxbios, and since I would be using the PCMCIA for USB, boot a compact system off of a USB memory stick. I was wondering how far along things have come, and if anyone has done something like the USB booting, or even what other devices linuxbios can boot a system off of? Also, after reading about all that's been done with the X-box project, and the mod chips they sell, I was wondering if anyone has had any thoughts on something like the Xenium X-box mod chip?

3 2

Sis 630 memory init
by zhu shi song 22 Jul '04

22 Jul '04

I have met two problems when using V1 linuxbios for winfast 6300. (1) For winfast 6300, it is not compatible with some SDRAM. (2) For ECS P6STMT board which uses sis630et chipset, IPL hangs when ipl use stack to read Linuxbios from DOC. The two problems are all related to memory init. Maybe the current memory init procedures in freebios V1 is not complete. Who know how to init SDRAM correctly, so it can work for more SDRAM and more boards? zhu --------------------------------- Do you Yahoo!? New and Improved Yahoo! Mail - 100MB free storage!

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trouble with SDRAM when using sis630 SDRAM synchronous mode
by zhu shi song 21 Jul '04

21 Jul '04

(1) ECS P6stmt board use SDRAM synchronous mode. I've got P6STMT motherboard based on sis630et. It's strange that the 0x8e is equal 0 which I have read from linux running on the board, that means the board uses SDRAM synchronous mode. (2) The board halt after setting 0x8c~8f value same as bios setting. I set 0x8c~8f (in dll.inc) values to which I have read under linux. But ipl can't copy linuxbios from Doc to RAM. I have tested doc_mil.inc. When the second "call doc_reset" that is the second time to use RAM stack(%ss=$0x400, %sp=$0x0), the board halt. (3) winfast 6300 Max board use SDRAM asynchronous mode. I have read 0x8c~8f values of winfast 6300. The value of 0x8e is 0x3. So winfast6300 use SDRAM asynchronous mode. IPL can boot linuxbios and linux successfully. (4)under p6stmt Even I set register 0x50~0x5A (except 0x52 and 0x57) value to what I have read from its bios. IPL can't copy linuxbios to RAM either. Who has met the same experience? I need help. zhu --------------------------------- Do you Yahoo!? Vote for the stars of Yahoo!'s next ad campaign!

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