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39711 discussions

RE: Freebios2 amd/serenade keyboard init error
by Stephen.Kimball＠bench.com 28 Jul '04

28 Jul '04

Tony, Thanks. It worked. Instead I commented out the code in keyboard.c inside init_pc_keyboard(), since there are several versions of superio.c. Not sure which is used. Steve -----Original Message----- From: Tony Cheng [mailto:tony_cheng@pcmagic.net] Sent: Wednesday, July 28, 2004 2:27 PM To: Kimball, Stephen; linuxbios(a)clustermatic.org Subject: Re: Freebios2 amd/serenade keyboard init error you can try to comment out the "init_pc_keyboard" from superio.c Tony

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how to setup FSB
by zhu shi song 27 Jul '04

27 Jul '04

Dear lists, who knows how to setup FSB of winfast6300? I need linuxbios to support > 733M celeron. tks zhu __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - 100MB free storage! http://promotions.yahoo.com/new_mail

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A quick question...
by Mike McWhorter 26 Jul '04

26 Jul '04

I checked the LinuxBIOS status page to see if my motherboard is supported, but I found it to be a little confusing. I'm using an older Dell Optiplex and (based on the lspci output) I believe it uses the Intel 440BX chipset. Does anyone know if this board is supported? Thanks, - Mike knoppix@ttyp0[knoppix]$ lspci 0000:00:00.0 Host bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX Host bridge (rev 03) 0000:00:01.0 PCI bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX AGP bridge (rev 03) 0000:00:07.0 ISA bridge: Intel Corp. 82371AB/EB/MB PIIX4 ISA (rev 02) 0000:00:07.1 IDE interface: Intel Corp. 82371AB/EB/MB PIIX4 IDE (rev 01) 0000:00:07.2 USB Controller: Intel Corp. 82371AB/EB/MB PIIX4 USB (rev 01) 0000:00:07.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02) 0000:00:0e.0 Multimedia audio controller: Aureal Semiconductor Vortex 1 (rev 02) 0000:00:0f.0 PCI bridge: Digital Equipment Corporation DECchip 21152 (rev 03) 0000:00:11.0 Ethernet controller: 3Com Corporation 3c905B 100BaseTX [Cyclone] (rev 24) 0000:01:00.0 VGA compatible controller: ATI Technologies Inc 3D Rage Pro AGP 1X/2X (rev 5c)

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RE: AMD 8111 GPIO
by Jay Miller 26 Jul '04

26 Jul '04

The GPIO pins are I/O mapped at an offset from the Power Management base address. The PM base address is at the second PCI device, function 3, offset 0x58. On a typical PC-BIOS this value is usually 0x5000. But when I do an lspci -xxx on a system running LinuxBIOS the value at offset 0x58 is 0x0000. I guess the question now is, does LinuxBIOS setup the PM base address? Jay Miller 781-229-7812x117 Actuality Systems, Inc. jmiller(a)acutality-systems.com -----Original Message----- From: YhLu [mailto:YhLu@tyan.com] Sent: Monday, July 26, 2004 2:46 PM To: Jay Miller; linuxbios(a)clustermatic.org Subject: RE: AMD 8111 GPIO You can use GPIO from AMD8111 and SuperIO Winbond 86327hf. But you need to check which pin can be linked out. Regards YH -----Original Message----- From: Jay Miller [mailto:jmiller@actuality-systems.com] Sent: Friday, July 23, 2004 1:45 PM To: linuxbios(a)clustermatic.org Subject: AMD 8111 GPIO We've got Linux up and running on our Tyan S2885 motherboards, using etherboot and filo with USB support. Thanks for all your help, and patience! I was hoping that with all the expertise here with AMD 8111 chipset, that someone would be able to answer my question. Although it's not strictly LinuxBIOS, it is Linux. ;-) So I'm trying to write a Linux driver for the GPIO pins on the AMD 8111. I saw a comment in amd8111_smbus.c that PMIOEN is set. I believe this is part of what I need to be able to drive the GPIOs. But how/where were all those hex values determined? The spec uses mnemonics to abstract the addresses, and I don't see how they correlate. Thanks, Jay Miller 781-229-7812x117 Actuality Systems, Inc. jmiller(a)acutality-systems.com _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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RE: AMD 8111 GPIO
by YhLu 26 Jul '04

26 Jul '04

You can use GPIO from AMD8111 and SuperIO Winbond 86327hf. But you need to check which pin can be linked out. Regards YH -----Original Message----- From: Jay Miller [mailto:jmiller@actuality-systems.com] Sent: Friday, July 23, 2004 1:45 PM To: linuxbios(a)clustermatic.org Subject: AMD 8111 GPIO We've got Linux up and running on our Tyan S2885 motherboards, using etherboot and filo with USB support. Thanks for all your help, and patience! I was hoping that with all the expertise here with AMD 8111 chipset, that someone would be able to answer my question. Although it's not strictly LinuxBIOS, it is Linux. ;-) So I'm trying to write a Linux driver for the GPIO pins on the AMD 8111. I saw a comment in amd8111_smbus.c that PMIOEN is set. I believe this is part of what I need to be able to drive the GPIOs. But how/where were all those hex values determined? The spec uses mnemonics to abstract the addresses, and I don't see how they correlate. Thanks, Jay Miller 781-229-7812x117 Actuality Systems, Inc. jmiller(a)acutality-systems.com _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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RE: [NEWBIE question] LinuxBIOS & IEEE 1394
by YhLu 26 Jul '04

26 Jul '04

You can use FILO in Etherboot to get boot from USB (UHCI and OHCI). https://sourceforge.net/tracker/?func=detail&aid=943300&group_id=4233&atid=3 04233 Next step maybe EHCI support. Is there any 1394 sticks now? Regards YH -----Original Message----- From: Vincent BARBARIN [mailto:vbarbarin@ifrance.com] Sent: Monday, July 26, 2004 2:25 AM To: linuxbios(a)clustermatic.org Subject: [NEWBIE question] LinuxBIOS & IEEE 1394 Hi, here's a new one there, tired of those "Boot from ".... options that are not so available on those PCs... I'd like to know if there's any project going on to put in LinuxBIOS Int 13 support for IEEE 1394 drives (why not USB too ? motherboard integrated or not) Any link with linux1394.org ? Just for making any OS boot loader running from any drive... pleeeeeeeeeese ? _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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RE: sis630et memory init problem
by zhu shi song 26 Jul '04

26 Jul '04

Sir, (1) On my sis630et board P6STMT, bios value of 0x8E is 00 (2) if I set 0x8E to 00 in IPL, ipl hangs on using stack to read linuxbios from DOC to ram (3) if I set 0x8E to 03 in IPL, linuxbios can start linux image successfully, but linux hangs at random time. (4) conclusion IPL init SDRAM has some trouble, memory can't work stably. It's so strange I have setted the values after the bios values. Is there any trick to init SDRAM on SIS630ET? tks zhu Nick Jarmany <nick.jarmany(a)densitron.co.uk> wrote: Zhu, On SiS630ET x8Eh has two active bits:- Bit 0: SDRAM synchronous mode. 0=Enable, 1=Disable Bit 1:Relationship between CPU & SDRAM clocks. 0=CPU>SDRAM, 1=CPU<SDRAM Default value of this register at POR=00h Regards, Nick -----Original Message----- From: linuxbios-admin(a)clustermatic.org [mailto:linuxbios-admin@clustermatic.org]On Behalf Of zhu shi song Sent: 25 July 2004 11:10 To: linuxbios(a)clustermatic.org Subject: sis630et memory init problem Hi, lists, I've got one ECS p6stmt motherboard based on sis630et. I have dumped pci host bridge settings: P6STMT 00:00.0 Host bridge: Silicon Integrated Systems: Unknown device 0630 (rev 30) 00: 39 10 30 06 07 00 10 22 30 00 00 06 00 20 80 00 10: 00 00 00 d8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 9e 00 c5 00 00 19 00 01 00 15 51 00 00 00 00 00 60: 0b 00 00 a1 00 00 00 00 01 50 c6 00 e0 00 00 00 70: 3f 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 20 ff 7f 1f 60 00 03 40 00 08 00 00 78 88 00 55 90: 00 00 00 00 40 00 00 01 00 00 00 00 02 00 00 00 a0: 00 00 03 01 aa 00 00 00 00 00 00 00 00 00 f8 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 02 00 20 00 07 02 00 1f 04 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 SPD dump: Memory Type 0x04 Number of Row Address bits 0x0d Number of Column Address bits 0x0a Number of Sides 0x01 Number of Banks 0x04 I try to set the values just as the same as bios settings. But when ipl use stack, it hangs on copying linuxbios from DOC. It's obvious that memory init failed. I noticed that 0x8e is 0, It's very different with winfast6300's. winfast6300 0x8e is 03. What's the problem behind it? tks zhu --------------------------------- Do you Yahoo!? Yahoo! Mail is new and improved - Check it out! --------------------------------- Do you Yahoo!? New and Improved Yahoo! Mail - Send 10MB messages!

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RE: sis630et memory init problem
by Nick Jarmany 26 Jul '04

26 Jul '04

Zhu, On SiS630ET x8Eh has two active bits:- Bit 0: SDRAM synchronous mode. 0=Enable, 1=Disable Bit 1:Relationship between CPU & SDRAM clocks. 0=CPU>SDRAM, 1=CPU<SDRAM Default value of this register at POR=00h Regards, Nick -----Original Message----- From: linuxbios-admin(a)clustermatic.org [mailto:linuxbios-admin@clustermatic.org]On Behalf Of zhu shi song Sent: 25 July 2004 11:10 To: linuxbios(a)clustermatic.org Subject: sis630et memory init problem Hi, lists, I've got one ECS p6stmt motherboard based on sis630et. I have dumped pci host bridge settings: P6STMT 00:00.0 Host bridge: Silicon Integrated Systems: Unknown device 0630 (rev 30) 00: 39 10 30 06 07 00 10 22 30 00 00 06 00 20 80 00 10: 00 00 00 d8 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 c0 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 9e 00 c5 00 00 19 00 01 00 15 51 00 00 00 00 00 60: 0b 00 00 a1 00 00 00 00 01 50 c6 00 e0 00 00 00 70: 3f 90 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 20 ff 7f 1f 60 00 03 40 00 08 00 00 78 88 00 55 90: 00 00 00 00 40 00 00 01 00 00 00 00 02 00 00 00 a0: 00 00 03 01 aa 00 00 00 00 00 00 00 00 00 f8 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 02 00 20 00 07 02 00 1f 04 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 SPD dump: Memory Type 0x04 Number of Row Address bits 0x0d Number of Column Address bits 0x0a Number of Sides 0x01 Number of Banks 0x04 I try to set the values just as the same as bios settings. But when ipl use stack, it hangs on copying linuxbios from DOC. It's obvious that memory init failed. I noticed that 0x8e is 0, It's very different with winfast6300's. winfast6300 0x8e is 03. What's the problem behind it? tks zhu _____ Do you Yahoo!? Yahoo! Mail is new and improved - Check <http://us.rd.yahoo.com/mail_us/taglines/new/*http://promotions.yahoo.com/ne…> it out!

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[NEWBIE question] LinuxBIOS & IEEE 1394
by Vincent BARBARIN 26 Jul '04

26 Jul '04

Hi, here's a new one there, tired of those "Boot from ".... options that are not so available on those PCs... I'd like to know if there's any project going on to put in LinuxBIOS Int 13 support for IEEE 1394 drives (why not USB too ? motherboard integrated or not) Any link with linux1394.org ? Just for making any OS boot loader running from any drive... pleeeeeeeeeese ?

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Re: Was a newbie, now a polliwog
by Richard Smith 26 Jul '04

26 Jul '04

Thomas Fritz wrote: > There's a PDF file on the tiny-linux site, which has a descriptions of > results - with a 2.6 kernel with more features than I'd need, the writer > says that he got it as small as a compressed 363K image, and a user > reported a compressed image as small as 191K. Thats very encouraging. I wonder what was enabled in the 191Kib version. 191+64 is just enough for those people with 256Kib flashes. > This is all very interesting, but while I have 512K to work in right > now, I have no idea how much space linuxbios needs. Also, keep in mind > I'm going to be trying to cross-compile for the PowerPC...does the same > code need more bytes or fewer bytes? In my current LB1 setup that does not netboot: LB = 60Kib ADLO = 136Kib By the time they run through the script the whole thing ends up being 228Kib but I have my settings so that the smallest alignment is like 64k or so. I don't remember exactly so I've got wasted space. I have no idea how the PPC code compares to x86. I've cc: this to the list perhaps some PPC person can comment. I think V2 is much larger due to the use of romcc but I don't have any hard info on that as I haven't made the jump yet.

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