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Panasonic CF-25LJM8EAM Toughbook - what are the chances?
by Miernik 21 Aug '04

21 Aug '04

I bought a Pansonic CF-25LJM8EAM notebook. All important chips on the mainboard are listed here: http://www.miernik.ctnet.pl/linuxbios/CF-25LJM8EAM-chiplist Bari, can you spot which one is the "keyboard controller" which you said is usually the critical problem on getting LinuxBIOS to a laptop? The chipset is supported (Intel TX). szrenica:~# lspci -v 0000:00:00.0 Host bridge: Intel Corp. 430TX - 82439TX MTXC (rev 01) Flags: bus master, medium devsel, latency 32 0000:00:01.0 ISA bridge: Intel Corp. 82371AB/EB/MB PIIX4 ISA (rev 01) Flags: bus master, medium devsel, latency 0 0000:00:01.1 IDE interface: Intel Corp. 82371AB/EB/MB PIIX4 IDE (rev 01) (prog-if 80 [Master]) Flags: bus master, medium devsel, latency 64 I/O ports at ffa0 [size=16] 0000:00:01.2 USB Controller: Intel Corp. 82371AB/EB/MB PIIX4 USB (rev 01) (prog-if 00 [UHCI]) Flags: medium devsel I/O ports at 1000 [size=32] 0000:00:01.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 01) Flags: medium devsel, IRQ 9 0000:00:02.0 VGA compatible controller: Neomagic Corporation NM2093 [MagicGraph 128ZV] (rev 04) (prog-if 00 [VGA]) Flags: medium devsel Memory at 42000000 (32-bit, prefetchable) [size=4M] 0000:00:13.0 CardBus bridge: Ricoh Co Ltd RL5c476 II (rev 01) Subsystem: Matsushita Electric Industrial Co., Ltd.: Unknown device 8306 Flags: bus master, medium devsel, latency 168, IRQ 11 Memory at f0000000 (32-bit, non-prefetchable) [size=4K] Bus: primary=00, secondary=01, subordinate=04, sec-latency=176 Memory window 0: 10000000-103ff000 (prefetchable) Memory window 1: 10400000-107ff000 I/O window 0: 00004400-000044ff I/O window 1: 00004800-000048ff 16-bit legacy interface ports at 0001 0000:00:13.1 CardBus bridge: Ricoh Co Ltd RL5c476 II (rev 01) Subsystem: Matsushita Electric Industrial Co., Ltd.: Unknown device 8306 Flags: bus master, medium devsel, latency 168, IRQ 11 Memory at f0001000 (32-bit, non-prefetchable) [size=4K] Bus: primary=00, secondary=05, subordinate=08, sec-latency=176 Memory window 0: 10800000-10bff000 (prefetchable) Memory window 1: 10c00000-10fff000 I/O window 0: 00004c00-00004cff I/O window 1: 00005000-000050ff 16-bit legacy interface ports at 0001 szrenica:~# What are the chances of getting this to work? The BIOS flash is unfortunately soldered, but I thing of giving the mainboard to an electronics facility so they can desolder it and solder a socket there. Interesting, the CPU is in a socket, so it might be possible to mount a AMD K6-2 350 MHz. It is possible on other Intel 430TX motherboards after binary patching the BIOS. Here is a site with binary patches for such BIOSes in many motherboards: http://web.inter.nl.net/hcc/J.Steunebrink/k6plus.htm -- Miernik ________________________ xmpp:miernik@amessage.info ___________________/__ tel: +48888299997 __/ mailto:miernik@ctnet.pl http://www.miernik.ctnet.pl/ GPG:0xABC292D1

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Opteron / Tyan motherboard fault on boot.
by Dave Belfer-Shevett 20 Aug '04

20 Aug '04

We're in the process of deploying Linuxbios to boot a cluster of Opteron based blade servers. I built a new kernel, put it in /tftpboot after using: mkelf-linux --rootdir=rom --ip=rom ./bzImage > vmlinuz.tyan and cycled the blade. Wen booting, I get: Searching for server (DHCP) Me: 192.168.1.200, Server: 192.168.1.200, Gateway 192.168.1.1 Loading 192.168.1.200:vmlinuz.tyan (ELF)... done LinuxBIOS-1.1.62.0_Fallback [date date] starting... Unknown Trwt Looking at an old message to this list, there's this snippet: http://www.mail-archive.com/linuxbios@clustermatic.org/msg03174.html where the following line(s) are, in set_Trwt()... if ((clocks < DTH_TRWT_MIN) || (clocks > DTH_TRWT_MAX)) { die("Unknown Trwt"); } What is this, and why is it happening? Is there a patch needed for LinuxBIOS to work properly on modern Opterons? Thanks, I'm in dire straights here, any help would be appreciated. -dbs -- -------------------. .----------- Dave Belfer-Shevett \ Conference Management Solutions \ Stonekeep dbs(a)stonekeep.com \ http://www.stonekeep.com \ Consulting ---------------------' 978 239 5902 `------------

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RE: Opteron / Tyan motherboard fault on boot.
by YhLu 20 Aug '04

20 Aug '04

In the Etherboot Src/arch/i386/Config There is an option -DCOFIG_X86_64. You need to enable it to use Etherboot boot elf with X86-64 kernel. Regards YH -----Original Message----- From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] Sent: Friday, August 20, 2004 10:11 AM To: dbs(a)stonekeep.com Cc: linuxbios(a)clustermatic.org Subject: Re: Opteron / Tyan motherboard fault on boot. Dave Belfer-Shevett <dbs(a)stonekeep.com> writes: > On Thu, 2004-08-19 at 19:29, Eric W. Biederman wrote: > > > mkelf-linux --rootdir=rom --ip=rom ./bzImage > vmlinuz.tyan > > This is your first problem. > > > > mkelf-linux does not know how to bypass the BIOS calls so > > it will not work under LinuxBIOS. > > Ahhhh. > > > Please get mkelfImage 2.5 > > ftp://ftp.lnxi.com/pub/mkelfImage. > > Done, compiled, and installed. I'm a little worried here though: > > ./mkelfImage --kernel=/tftpboot/bzImage > --output=/tftpboot/vmlinuz-2.tyan > > When I do a 'file' on the new image, I see: > > /tftpbot/vmlinuz-2.tyan: ELF 32-bit LSB executable, Intel 80386, version > 1 (SYSV), statically linked, corrupted section header size > > This image (bzImage) is an Opteron compiled kernel, which should be 64 > bit, unless there's no real difference in the elf header. Stefan already gave the practical explanation. The small bit beyond that is the x86_64 kernel does not even have a valid 64bit entry point. The code is actually present in the 32bit etherboot to cope with an 64bit in for x86_64. But except for test programs I have not been able to find any native ones. Eric _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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RE: Opteron / Tyan motherboard fault on boot.
by YhLu 20 Aug '04

20 Aug '04

I guess that you have some problem with your Etherboot configuration. Also please let us know your compile environment. I will send you my pre-built image and etc..via our FTP server. Regards YH -----Original Message----- From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] Sent: Friday, August 20, 2004 10:03 AM To: dbs(a)stonekeep.com Cc: linuxbios(a)clustermatic.org Subject: Re: Opteron / Tyan motherboard fault on boot. Dave Belfer-Shevett <dbs(a)stonekeep.com> writes: > On Thu, 2004-08-19 at 19:29, Eric W. Biederman wrote: > > mkelf-linux does not know how to bypass the BIOS calls so > > it will not work under LinuxBIOS. > > > > Please get mkelfImage 2.5 > > > > ftp://ftp.lnxi.com/pub/mkelfImage. > > Thanks Eric, but I think the problem is deeper than this. > > I just tried to start Linuxbios on the machine, with no network cable, > no drives, no nothing. It starts up, comes to the Boot from (N)etwork > (D)isk (F)loppy or (Q)uit. > > I hit 'Q' here. The 'Q' option is generic in etherboot and it does not do anything sensible under LinuxBIOS. So you are probably triggering a triple fault again. It does look like the code you have does not know how to reboot properly but that is a minor issue. > And I get LinuxBIOS-1.1.62.0_Fallback [date date] starting... > Unknown Trwt > > So this is happening way before the image is even downloaded. > > I'm experiencing other problems with this bios image as well. I can't > boot of hard drive or off floppy, it justs, for [D]isk boot "probing > pci disk [IDE] LBA48mode, disk-1... > Searching for image... > <abort> > Probing pci disk... > [IDE] > Probing isa disk... > <sleep> > Boot from (N)etwork... Unless you have an ELF header at the start of your disk that is likely the culprit. The simple path is to get etherboot working with an image created by mkelfImage. > When I replace the BIOS chip back with the AMI original image, I'm able > to boot from floppy without a problem. You have a cluster node with a floppy drive? > So, my next step is to rebuild my linuxbios image, and flash it again... > but... it appears that cvs.sourceforge.net is down. Does anyone have a > recent checkout of the CVS tree I can wget or ftp? Please IM or mail > me... _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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RE: ROMSTRAP
by YhLu 20 Aug '04

20 Aug '04

I solved the problem about the ROMSTRAP by romstrap.lds and romstrap.inc. Also I change 0x10 in id.lds and id.inc to let it don't use 0xffffffe0... Current I still can not get output from serial port. And I can use postcard with your chipset. Regards YH -----Original Message----- From: Tom Warren [mailto:twarren@nvidia.com] Sent: Friday, August 20, 2004 9:42 AM To: YhLu; ebiederman(a)lnxi.com Cc: linuxbios(a)clustermatic.org Subject: RE: ROMSTRAP YH, If you have specific Nvidia chipset questions, you can ask me directly, or I can point you to our developer liaison. All of our chipsets use SIP tables to allow autoprogramming of (AMD) CPU link defaults, MAC addresses, etc. The pointers to these 2 tables (safe and user) are at 0xFFFFFFE0 and 0xFFFFFFE4 (dwords). Some of the table format might be proprietary, depending on the chipset. What was Eric's original question? I didn't see it come across the reflector. - Tom Warren NVIDIA -----Original Message----- From: linuxbios-admin(a)clustermatic.org [mailto:linuxbios-admin@clustermatic.org] On Behalf Of YhLu Sent: Thursday, August 19, 2004 5:07 PM To: ebiederman(a)lnxi.com Cc: linuxbios(a)clustermatic.org Subject: ROMSTRAP Eric, I'm debug the one Opteron MB with NV CK 804. That chipset (SB) can use ROM Strap to set some register before control is handed to CPU. But the space it need about 0xffffffe00 to 0xfffffef. I guess that add romstarp.lds and romstrap.inc could solve the problem. And it is only needed by fallback. Please advise. Regards YH _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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RE: ROMSTRAP
by Tom Warren 20 Aug '04

20 Aug '04

YH, If you have specific Nvidia chipset questions, you can ask me directly, or I can point you to our developer liaison. All of our chipsets use SIP tables to allow autoprogramming of (AMD) CPU link defaults, MAC addresses, etc. The pointers to these 2 tables (safe and user) are at 0xFFFFFFE0 and 0xFFFFFFE4 (dwords). Some of the table format might be proprietary, depending on the chipset. What was Eric's original question? I didn't see it come across the reflector. - Tom Warren NVIDIA -----Original Message----- From: linuxbios-admin(a)clustermatic.org [mailto:linuxbios-admin@clustermatic.org] On Behalf Of YhLu Sent: Thursday, August 19, 2004 5:07 PM To: ebiederman(a)lnxi.com Cc: linuxbios(a)clustermatic.org Subject: ROMSTRAP Eric, I'm debug the one Opteron MB with NV CK 804. That chipset (SB) can use ROM Strap to set some register before control is handed to CPU. But the space it need about 0xffffffe00 to 0xfffffef. I guess that add romstarp.lds and romstrap.inc could solve the problem. And it is only needed by fallback. Please advise. Regards YH _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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entering protected_start halt
by zhu shi song 20 Aug '04

20 Aug '04

I'm using QDIA6T MB based on vt8601/vt82c686. Now I can boot it using DOC IPL. I can copy linuxbios from DOC to RAM at 0x8000:0. But when linuxbios executed "data32 ljmp $ROM_CODE_SEG, $__protected_start" statement. The MB halted. help! zhu __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - 100MB free storage! http://promotions.yahoo.com/new_mail

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RE: PPC and K8 Thunder 2885 support.
by YhLu 19 Aug '04

19 Aug '04

Welcome. You can get the source code from freebios2. It includes S2885 support. Regards YH -----Original Message----- From: Steve Milo [mailto:slavik914@mrbrklyn.com] Sent: Thursday, August 19, 2004 5:50 PM To: linuxbios(a)clustermatic.org Subject: PPC and K8 Thunder 2885 support. Hello all my name is Steve and I'm a Linux guy. I lurked a little (maybe for two days) but I want to try to jump in ASAP. I downloaded the mailing list archives and found the 'HOW DO I' FAQ which is pretty helpful. I want to maybe clarify a few things for my understanding but a little background about me would probably be in order. I dont have hardware level programming experience, most of what I know about computers I learned through reading. I like to think I'm a bit discriminating about what I learn, but I would be wrong about that. Learning is usually, at least for me, a stumble around, trip over facts and fiction, tediously seperate the wheat from the chaff, chew on the facts on my walk home, kind of process. I am currently a student at Brooklyn College in Brooklyn New York and I am fortunate enough to work with a professor who is giving me the very generous opportunity to setup a small cluster consisting of a few dual Opteron 2885 machines. This opportunity comes to me because I am trying to start a GPL'ish software club here. Also, I own a PowerBook G4 and I run YDL 3.0.1 on it. This is the lspci output: 00:10.0 VGA compatible controller: ATI Technologies Inc Radeon Mobility M7 LW [Radeon Mobility 7500] 01:0b.0 Host bridge: Apple Computer Inc. UniNorth 1.5 PCI 01:17.0 Class ff00: Apple Computer Inc. KeyLargo Mac I/O (rev 03) 01:18.0 USB Controller: Apple Computer Inc. KeyLargo USB 01:19.0 USB Controller: Apple Computer Inc. KeyLargo USB 01:1a.0 CardBus bridge: Texas Instruments PCI1410 PC card Cardbus Controller (rev 02) 06:0b.0 Host bridge: Apple Computer Inc. UniNorth 1.5 Internal PCI 06:0e.0 FireWire (IEEE 1394): Lucent Microelectronics FW323 06:0f.0 Ethernet controller: Apple Computer Inc. UniNorth GMAC (Sun GEM) (rev 01) The kernel is a 2.6.6 which appears to work well. Considering the purpose of this list my questions are probably fairly obvious. Is there support for the 2885 motherboards? And is there support for the PPC platform. I had seen some posts regarding PPC support and there is apparently someone here who runs YDL as well. But I havent seen anything outright as far as support for both platforms I mentioned. Or perhaps to put it correctly, are the platforms I mentioned supported. What are the real dangerous pitfalls I should lookout for? As in the kind of pitfall that would render my machine a unique doorstop, would I would like to avoid that at all costs. Thank you, Steve M -- Open WebMail Project (http://openwebmail.org) _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

2 1

ROMSTRAP
by YhLu 19 Aug '04

19 Aug '04

Eric, I'm debug the one Opteron MB with NV CK 804. That chipset (SB) can use ROM Strap to set some register before control is handed to CPU. But the space it need about 0xffffffe00 to 0xfffffef. I guess that add romstarp.lds and romstrap.inc could solve the problem. And it is only needed by fallback. Please advise. Regards YH

1 0

PPC and K8 Thunder 2885 support.
by Steve Milo 19 Aug '04

19 Aug '04

Hello all my name is Steve and I'm a Linux guy. I lurked a little (maybe for two days) but I want to try to jump in ASAP. I downloaded the mailing list archives and found the 'HOW DO I' FAQ which is pretty helpful. I want to maybe clarify a few things for my understanding but a little background about me would probably be in order. I dont have hardware level programming experience, most of what I know about computers I learned through reading. I like to think I'm a bit discriminating about what I learn, but I would be wrong about that. Learning is usually, at least for me, a stumble around, trip over facts and fiction, tediously seperate the wheat from the chaff, chew on the facts on my walk home, kind of process. I am currently a student at Brooklyn College in Brooklyn New York and I am fortunate enough to work with a professor who is giving me the very generous opportunity to setup a small cluster consisting of a few dual Opteron 2885 machines. This opportunity comes to me because I am trying to start a GPL'ish software club here. Also, I own a PowerBook G4 and I run YDL 3.0.1 on it. This is the lspci output: 00:10.0 VGA compatible controller: ATI Technologies Inc Radeon Mobility M7 LW [Radeon Mobility 7500] 01:0b.0 Host bridge: Apple Computer Inc. UniNorth 1.5 PCI 01:17.0 Class ff00: Apple Computer Inc. KeyLargo Mac I/O (rev 03) 01:18.0 USB Controller: Apple Computer Inc. KeyLargo USB 01:19.0 USB Controller: Apple Computer Inc. KeyLargo USB 01:1a.0 CardBus bridge: Texas Instruments PCI1410 PC card Cardbus Controller (rev 02) 06:0b.0 Host bridge: Apple Computer Inc. UniNorth 1.5 Internal PCI 06:0e.0 FireWire (IEEE 1394): Lucent Microelectronics FW323 06:0f.0 Ethernet controller: Apple Computer Inc. UniNorth GMAC (Sun GEM) (rev 01) The kernel is a 2.6.6 which appears to work well. Considering the purpose of this list my questions are probably fairly obvious. Is there support for the 2885 motherboards? And is there support for the PPC platform. I had seen some posts regarding PPC support and there is apparently someone here who runs YDL as well. But I havent seen anything outright as far as support for both platforms I mentioned. Or perhaps to put it correctly, are the platforms I mentioned supported. What are the real dangerous pitfalls I should lookout for? As in the kind of pitfall that would render my machine a unique doorstop, would I would like to avoid that at all costs. Thank you, Steve M -- Open WebMail Project (http://openwebmail.org)

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