coreboot

coreboot@coreboot.org

11 participants
39711 discussions

ECS K7S5A and NOT DOC
by Jeremy Jackson 29 Aug '04

29 Aug '04

I see that the raminit lives in northsouthbridge/sis/735/ipl.S There are conditionals for STD_FLASH, but how do I use this? in my config, I tried docipl northsouthbridge/sis/735/ipl.S but it builds romimage without the reset vector, and an extra "docipl" that's only 64k Neither works correctly when written to flash. -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net

2 1

Nvidia CK804 and Tyan S2895 support
by YhLu 28 Aug '04

28 Aug '04

Just FYI. I just finished the LinuxBIOS support to S2895 (it has two CK804 onboard). Connection is CPU1<----->CPU0<---->8131 | | | | CK804 CK804. Regards YH

1 0

Help for geode (fwd)
by ron minnich 28 Aug '04

28 Aug '04

can someone help this person, I am out until next week. ron ---------- Forwarded message ---------- Date: Sat, 28 Aug 2004 10:33:57 +0900 (KST) From: minyoung(a)cselab.snu.ac.kr To: rminnich(a)lanl.gov Subject: Help for geode Dear Ron Minnich, I'm going to work on linuxbios for geode sc1200 board. Could you provide me with a sample config file for it? The linuxbios status page says nano/nano is supported but I could find the config file. Best regards, Minyoung

1 0

New targets
by ron minnich 27 Aug '04

27 Aug '04

FYI I'm doing a port for the 855PM chipset, ICH4 south, for a Pentium-M box. Let's see how it goes. This is with V2. More about the board later. I am mentioning this as I got from zero to an initial source tree that compiles to a romimage in about 90 minutes, with all the chips (not correct yet!) in place. There's enough code you can use in the V2 tree now to really move fast to build new platforms. Romcc is a big help here. I hope others will see this and take heart. There's also (finally) a transmeta platform in the works (V2 as well). ron p.s. Has anyone seen the widely publicized Intel web site with BIOS source on it? I have not yet seen it ... anyone have the URL? Someone asked me about it again yesterday, and I did not know what to tell them. Is the "Intel open source BIOS" just press releases so far with no code?

3 3

other features for Linuxbios
by Jeremy Jackson 26 Aug '04

26 Aug '04

Here's some ideas i've been getting: firmware debugger: perhaps using romcc, a minimal debugger would allow trying different ram initialization sequences rapidly. If it were treated as a stub, it would be possible to run make on the controlling machine, and (with some line from the serial port to the reset line on the target board) have it compile the IPL ram init sequence, reset the board, upload it, then test it. By keeping VI open in another window, you could try new code every few seconds. Where would it store this code? Well there's Eric's Cache-as-ram trick, where available, and I was thinking about all those video cards that aren't used with Linuxbios... don't almost all video cards have static ram on them? What would it take to execute code from there? I wonder how much the gdb kernel stub depends on the kernel? A serial console api could be useful there and elsewhere, to avoid duplicating the serial code in the various payloads. other ideas... it would be swell to have an IPL that could accept downloads (zmodem?) via the serial console port, and (re)flash the payload, though it would require reimplementing the flashing code. Probably nicer to use the MTD drivers in Linux. Regards, Jeremy -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net

1 0

serial console int0x10 redirector
by Jeremy Jackson 26 Aug '04

26 Aug '04

Hi, Has anyone thought about an Ncurses style int 0x10 redirector for serial console? Observe Memtest86's partial implementation, ALDO, etc, maybe there's something close already? This could be useful for Linuxbios, or it could be flashed into an old PCI video card, to give that capability to *any* PC, like the PC Weasel, but real cheap. Cheers, Jeremy -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net

1 0

help with new motherboard Soyo 6BA+
by Jeremy Jackson 26 Aug '04

26 Aug '04

Hi, I'm getting C1 (pause 6 seconds) C6, hang on the post card. I modified the smartcore-p3 (also 440BX based. Possibly there's 0x10 for an instant to start. I'll post all the lspci stuff tomorrow, just wondering if those post codes ring a bell for anyone. I can't find those in the code anywhere. Regards, Jeremy -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net

5 17

init hangs booting epia
by zhu shi song 26 Aug '04

26 Aug '04

I can boot epia using linuxbios now. But when executing /sbin/init linux hangs.Messages: "Freeing unused kernel memory: 248k freed Warning: unable to open an initial console. " what's the problem? zhu _______________________________ Do you Yahoo!? Win 1 of 4,000 free domain names from Yahoo! Enter now. http://promotions.yahoo.com/goldrush

1 0

RE: booting other oses
by YhLu 25 Aug '04

25 Aug '04

You mean put the kernel and initrd in the ROM (8Mbit) ? So can spare the flash? Regards YH -----Original Message----- From: ron minnich [mailto:rminnich@lanl.gov] Sent: Wednesday, August 25, 2004 11:40 AM To: YhLu Cc: Dave Aubin; Jakob Praher; linuxbios Subject: RE: booting other oses On Wed, 25 Aug 2004, YhLu wrote: > 1. I guess use filo to load the elf ( the elf will be in flash, and filo > will be in the ROM) oh yeah ... 1 MB is plenty big enough for even 2.6 kernel + initrd ron

3 4

RE: New targets
by YhLu 25 Aug '04

25 Aug '04

Intel's version should be in CPL..., I wonder if there is ACPI in it. Also FYI. In Opteron side, nvidia CK804 (PCI-E) support is done half. Till now, and It reached out to Etherboot now. What's the plan on ACPI support? Regards YH -----Original Message----- From: ron minnich [mailto:rminnich@lanl.gov] Sent: Wednesday, August 25, 2004 1:23 PM To: linuxbios(a)clustermatic.org Subject: New targets FYI I'm doing a port for the 855PM chipset, ICH4 south, for a Pentium-M box. Let's see how it goes. This is with V2. More about the board later. I am mentioning this as I got from zero to an initial source tree that compiles to a romimage in about 90 minutes, with all the chips (not correct yet!) in place. There's enough code you can use in the V2 tree now to really move fast to build new platforms. Romcc is a big help here. I hope others will see this and take heart. There's also (finally) a transmeta platform in the works (V2 as well). ron p.s. Has anyone seen the widely publicized Intel web site with BIOS source on it? I have not yet seen it ... anyone have the URL? Someone asked me about it again yesterday, and I did not know what to tell them. Is the "Intel open source BIOS" just press releases so far with no code? _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot