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[LinuxBIOS] LinuxBIOS support for nvidia CK804 northbridge?
by Carl-Daniel Hailfinger 20 Apr '06

20 Apr '06

Hi, in the process of trying to find any motherboard with more than 3 PCI-Express slots and LinuxBIOS support, I failed miserably. It seems such boards only exist with nVidia CK804 northbridges for which I couldn't find any code in the LinuxBIOS source code. Section 2.9 of the LinuxBIOS FAQ suggests to send lspci -vvv to this list for closer inspection. One of those systems with 4 PCIe slots is the Asus K8N-SLI Deluxe. The lspci below contains four PCIe gigabit ethernet controllers at 0000:01:00.0, 0000:02:00.0, 0000:03:00.0 and 0000:04:00.0. It's the only motherboard with this northbridge I have access to at the moment. switch:~ # lspci -vvv 0000:00:00.0 Memory controller: nVidia Corporation CK804 Memory Controller (rev a3) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Capabilities: [44] #08 [01e0] Capabilities: [e0] #08 [a801] 0000:00:01.0 ISA bridge: nVidia Corporation: Unknown device 0050 (rev a3) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 0000:00:01.1 SMBus: nVidia Corporation CK804 SMBus (rev a2) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 11 Region 0: I/O ports at e400 [size=32] Region 4: I/O ports at 4c00 [size=64] Region 5: I/O ports at 4c40 [size=64] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:02.0 USB Controller: nVidia Corporation CK804 USB Controller (rev a2) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 201 Region 0: Memory at d3004000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:02.1 USB Controller: nVidia Corporation CK804 USB Controller (rev a3) (prog-if 20 [EHCI]) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin B routed to IRQ 177 Region 0: Memory at d3005000 (32-bit, non-prefetchable) [size=256] Capabilities: [44] #0a [2098] Capabilities: [80] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:04.0 Multimedia audio controller: nVidia Corporation CK804 AC'97 Audio Controller (rev a2) Subsystem: ASUSTeK Computer Inc.: Unknown device 812a Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (500ns min, 1250ns max) Interrupt: pin A routed to IRQ 10 Region 0: I/O ports at dc00 [size=256] Region 1: I/O ports at e000 [size=256] Region 2: Memory at d3003000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:06.0 IDE interface: nVidia Corporation CK804 IDE (rev a2) (prog-if 8a [Master SecP PriP]) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Region 4: I/O ports at f000 [size=16] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:07.0 IDE interface: nVidia Corporation CK804 Serial ATA Controller (rev a3) (prog-if 85 [Master SecO PriO]) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 177 Region 0: I/O ports at 09f0 [size=8] Region 1: I/O ports at 0bf0 [size=4] Region 2: I/O ports at 0970 [size=8] Region 3: I/O ports at 0b70 [size=4] Region 4: I/O ports at d800 [size=16] Region 5: Memory at d3002000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:08.0 IDE interface: nVidia Corporation CK804 Serial ATA Controller (rev a3) (prog-if 85 [Master SecO PriO]) Subsystem: ASUSTeK Computer Inc.: Unknown device 815a Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (750ns min, 250ns max) Interrupt: pin A routed to IRQ 185 Region 0: I/O ports at 09e0 [size=8] Region 1: I/O ports at 0be0 [size=4] Region 2: I/O ports at 0960 [size=8] Region 3: I/O ports at 0b60 [size=4] Region 4: I/O ports at c400 [size=16] Region 5: Memory at d3001000 (32-bit, non-prefetchable) [size=4K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:09.0 PCI bridge: nVidia Corporation CK804 PCI Bridge (rev a2) (prog-if 01 [Subtractive decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap- 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 Bus: primary=00, secondary=05, subordinate=05, sec-latency=128 I/O behind bridge: 0000a000-0000afff Memory behind bridge: ce000000-d0ffffff Prefetchable memory behind bridge: c0000000-c7ffffff BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B- 0000:00:0a.0 Bridge: nVidia Corporation CK804 Ethernet Controller (rev a3) Subsystem: ASUSTeK Computer Inc.: Unknown device 8141 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0 (250ns min, 5000ns max) Interrupt: pin A routed to IRQ 193 Region 0: Memory at d3000000 (32-bit, non-prefetchable) [size=4K] Region 1: I/O ports at b000 [size=8] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:00:0b.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, cache line size 08 Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 I/O behind bridge: 00009000-00009fff Memory behind bridge: cc000000-cdffffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [58] #08 [a800] Capabilities: [80] #10 [0141] 0000:00:0c.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, cache line size 08 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 00008000-00008fff Memory behind bridge: ca000000-cbffffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [58] #08 [a800] Capabilities: [80] #10 [0141] 0000:00:0d.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, cache line size 08 Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 00007000-00007fff Memory behind bridge: c8000000-c9ffffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [58] #08 [a800] Capabilities: [80] #10 [0141] 0000:00:0e.0 PCI bridge: nVidia Corporation CK804 PCIE Bridge (rev a3) (prog-if 00 [Normal decode]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 0, cache line size 08 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 00006000-00006fff Memory behind bridge: d1000000-d2ffffff Prefetchable memory behind bridge: 00000000fff00000-0000000000000000 BridgeCtl: Parity- SERR+ NoISA- VGA- MAbort- >Reset- FastB2B- Capabilities: [40] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [58] #08 [a800] Capabilities: [80] #10 [0141] 0000:00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- Capabilities: [80] #08 [2101] 0000:00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 0000:00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 0000:00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- 0000:01:00.0 Ethernet controller: SysKonnect SK-9Exx 10/100/1000Base-T Adapter (rev 10) Subsystem: SysKonnect SK-9E21D 10/100/1000Base-T Adapter Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- Latency: 0, cache line size 08 Interrupt: pin A routed to IRQ 233 Region 0: Memory at d2000000 (64-bit, non-prefetchable) [size=16K] Region 2: I/O ports at 6000 [size=256] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data Capabilities: [5c] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [e0] #10 [0011] 0000:02:00.0 Ethernet controller: SysKonnect SK-9Exx 10/100/1000Base-T Adapter (rev 10) Subsystem: SysKonnect SK-9E21D 10/100/1000Base-T Adapter Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- Latency: 0, cache line size 08 Interrupt: pin A routed to IRQ 225 Region 0: Memory at c9000000 (64-bit, non-prefetchable) [size=16K] Region 2: I/O ports at 7000 [size=256] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data Capabilities: [5c] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [e0] #10 [0011] 0000:03:00.0 Ethernet controller: SysKonnect SK-9Exx 10/100/1000Base-T Adapter (rev 10) Subsystem: SysKonnect SK-9E21D 10/100/1000Base-T Adapter Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- Latency: 0, cache line size 08 Interrupt: pin A routed to IRQ 217 Region 0: Memory at cb000000 (64-bit, non-prefetchable) [size=16K] Region 2: I/O ports at 8000 [size=256] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data Capabilities: [5c] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [e0] #10 [0011] 0000:04:00.0 Ethernet controller: SysKonnect SK-9Exx 10/100/1000Base-T Adapter (rev 10) Subsystem: SysKonnect SK-9E21D 10/100/1000Base-T Adapter Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR+ <PERR- Latency: 0, cache line size 08 Interrupt: pin A routed to IRQ 209 Region 0: Memory at cd000000 (64-bit, non-prefetchable) [size=16K] Region 2: I/O ports at 9000 [size=256] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data Capabilities: [5c] Message Signalled Interrupts: 64bit+ Queue=0/1 Enable- Address: 0000000000000000 Data: 0000 Capabilities: [e0] #10 [0011] 0000:05:06.0 VGA compatible controller: nVidia Corporation NV18 [GeForce4 MX 4000 AGP 8x] (rev c1) (prog-if 00 [VGA]) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (1250ns min, 250ns max) Interrupt: pin A routed to IRQ 12 Region 0: Memory at ce000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at c0000000 (32-bit, prefetchable) [size=128M] Capabilities: [60] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:05:0b.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc.: Unknown device 808b Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (500ns min, 1000ns max), cache line size 08 Interrupt: pin A routed to IRQ 12 Region 0: Memory at d0008000 (32-bit, non-prefetchable) [size=2K] Region 1: Memory at d0000000 (32-bit, non-prefetchable) [size=16K] Capabilities: [44] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- 0000:05:0c.0 Ethernet controller: Marvell Technology Group Ltd. Gigabit Ethernet Controller (rev 13) Subsystem: ASUSTeK Computer Inc. Marvell 88E8001 Gigabit Ethernet Controller (Asus) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Latency: 32 (5750ns min, 7750ns max), cache line size 08 Interrupt: pin A routed to IRQ 209 Region 0: Memory at d0004000 (32-bit, non-prefetchable) [size=16K] Region 1: I/O ports at a000 [size=256] Capabilities: [48] Power Management version 2 Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+) Status: D0 PME-Enable- DSel=0 DScale=1 PME- Capabilities: [50] Vital Product Data The only references to something similar were a post archived at http://www.mail-archive.com/linuxbios@openbios.org/msg00792.html but the thread seemed to end inconclusive and another post at http://www.mail-archive.com/linuxbios@openbios.org/msg01023.html Is there any support for that nvidia northbridge underway? Regards, Carl-Daniel

3 9

[LinuxBIOS] Tyan s2891 working now
by Greg Johnson 19 Apr '06

19 Apr '06

The current (r2256) svn seems to be woriking fine for us with the Tyan s2891 boards. I think the recent changes to get the s2881 working fixed it. Thanks, Greg

1 0

[LinuxBIOS] Via Epia ML5000, LinuxBios, Filo -- 99 % there, need help with last 1%!
by Eric Poulsen 19 Apr '06

19 Apr '06

Hi all, I've gotten LinuxBIOS working without much of a hitch, but I'm trying to get the VGA console working. I've been looking through the email archives without much success, then I found this page: http://linuxbios.org/index.php/VGA_support I have a Via Epia ML5000 board. My question is specific to this part, found at the above URL: /If you want to use the onboard VGA chip, you have to do the following in additional to the CONFIG options described above. / /1. in MB Config.lb You need to specify for your onboard VGA / /device pci 9.0 on # PCI / / chip drivers/pci/onboard device pci 9.0 on end register "rom_address" = "0xfff80000" #512k image #register "rom_address" = "0xfff00000" #1M image end end/ Is PCI 9.0 the correct value for the Via Epia-M onboard CLE266 video? Is there a way to find out, such as lspci? What about the "rom_address" field -- Can someone explain what this is, and how to set it properly? Thanks -- Eric

3 2

[LinuxBIOS] compile problems s2881
by Ward Vandewege 18 Apr '06

18 Apr '06

Hi all, I just checked out a clean s2881 tree (2254), and built it. Along the way, I had to make a few changes to make it compile. 1. in targets/tyan/s2881/s2881/config.py, my machine required: - a '#!/usr/bin/env python' line at the start of the file - the file to be executable 2. compilation then failed as follows: # make ... Traceback (most recent call last): File "tyan/s2881/s2881/config.py", line 1541, in ? from yappsrt import * ImportError: No module named yappsrt make: *** [Makefile.settings] Error 1 I had to copy the yappsrt.py file from util/newconfig to the tyan/s2881/s2881 directory, and then everything worked fine. Note that I only saw those problems with a freshly checked out tree. Once I compiled successfully just once, I could erase tyan/s2881/s2881, redo the buildtarget step, and make would work just fine in tyan/2881/s2881 without these modifications. Not sure what's causing this - my solution is clearly just a workaround. Any ideas for a fix? I've observed these issues on a Debian testing/unstable system, as well as an Ubuntu Breezy one. Thanks, Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior System Administrator

4 4

Re: [LinuxBIOS] some more tyan/s2881 questions
by Lu, Yinghai 18 Apr '06

18 Apr '06

Without enabling the ACPI, the power off works? YH

2 1

Re: [LinuxBIOS] broadcom HT1000 SATA PHY initializing
by Lu, Yinghai 17 Apr '06

17 Apr '06

I will test that. Thanks YH -----Original Message----- From: Jia Jianwei [mailto:JJia@Fortinet.com] Sent: Monday, April 17, 2006 11:49 AM To: Lu, Yinghai; linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] broadcom HT1000 SATA PHY initializing Because my BIOS source is different with LinuxBIOS, so I think just replace sata_init() in bcm_5785_sata.c should be working. Do not need a soft_reset.In my BIOS source, I just do it after PCI device enumerate and resource allocation. Regards, Jianwei ----- Original Message ----- From: "Lu, Yinghai" <yinghai.lu(a)amd.com> To: "Jia Jianwei" <JJia(a)Fortinet.com>; <linuxbios(a)linuxbios.org> Sent: Monday, April 17, 2006 11:30 AM Subject: RE: [LinuxBIOS] broadcom HT1000 SATA PHY initializing > Good. > > Where to call it? Auto stage or called by hardwaremain driver? > > Need to be effective after soft_reset? > > YH > > -----Original Message----- > From: Jia Jianwei [mailto:JJia@Fortinet.com] > Sent: Monday, April 17, 2006 11:23 AM > To: Lu, Yinghai; linuxbios(a)linuxbios.org > Subject: Re: [LinuxBIOS] broadcom HT1000 SATA PHY initializing > > > Sata should be working with the following initializing code. (verified > on > two boards). Thanks! > > Jianwei > > > void HT1000_SATA_init( void ) > { > volatile unsigned int *mmio_reg; > unsigned int mmio_base,val32; > int i; > > pcibios_write_config_byte( 1, HT1000_SATA, 0x70, 0x18); > pcibios_write_config_byte( 1, HT1000_SATA, 0x78, 0x04); > > pcibios_read_config_dword (1, HT1000_SATA, 0x24, &mmio_base); > > mmio_base &= 0xfffffffc; > > mmio_reg = (unsigned int *)( mmio_base + 0x10f0 ); > > * mmio_reg = 0x40000001; > > mmio_reg = ( unsigned int *)( mmio_base + 0x8c ); > * mmio_reg = 0x00ff2007; > mdelay( 10 ); > * mmio_reg = 0x78592009; > mdelay( 10 ); > * mmio_reg = 0x00082004; > mdelay( 10 ); > * mmio_reg = 0x00002004; > mdelay( 10 ); > > for( i = 0; i < 4; i ++ ) > { > mmio_reg = ( unsigned int *)( mmio_base + 0x40 + i * 256 > ); > val32 = *mmio_reg ; > if( val32 & 0x4 ) > { > mmio_reg = ( unsigned int *)( mmio_base + 0x48 + > i * > 256); > val32 = *mmio_reg; > val32 |= 1; > *mmio_reg = val32; > mdelay( 10 ); > val32 &= ( ~1 ); > *mmio_reg = val32; > mdelay( 10 ); > } > } > > } > > > > > ----- Original Message ----- > From: "Lu, Yinghai" <yinghai.lu(a)amd.com> > To: "Jia Jianwei" <JJia(a)Fortinet.com>; <linuxbios(a)linuxbios.org> > Sent: Friday, March 31, 2006 11:40 AM > Subject: RE: [LinuxBIOS] broadcom HT1000 SATA PHY initializing > > > > You should be right. > > > > When I was testing that on Broadcom BLAST ref board: STAT and IDE > > doesn't work. > > > > But on another MB (serverworks HT1000 based), IDE is working. > > > > Maybe some magic bit in pci conf space need to set by option rom... > > > > You could compare the pci conf dump between system bios and > LinuxBIOS... > > > > BTW, Can drop your funny signature in LinuxBIOS? > > > > YH > > > > > > > > > > >

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Re: [LinuxBIOS] broadcom HT1000 SATA PHY initializing
by Lu, Yinghai 17 Apr '06

17 Apr '06

Good. Where to call it? Auto stage or called by hardwaremain driver? Need to be effective after soft_reset? YH -----Original Message----- From: Jia Jianwei [mailto:JJia@Fortinet.com] Sent: Monday, April 17, 2006 11:23 AM To: Lu, Yinghai; linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] broadcom HT1000 SATA PHY initializing Sata should be working with the following initializing code. (verified on two boards). Thanks! Jianwei void HT1000_SATA_init( void ) { volatile unsigned int *mmio_reg; unsigned int mmio_base,val32; int i; pcibios_write_config_byte( 1, HT1000_SATA, 0x70, 0x18); pcibios_write_config_byte( 1, HT1000_SATA, 0x78, 0x04); pcibios_read_config_dword (1, HT1000_SATA, 0x24, &mmio_base); mmio_base &= 0xfffffffc; mmio_reg = (unsigned int *)( mmio_base + 0x10f0 ); * mmio_reg = 0x40000001; mmio_reg = ( unsigned int *)( mmio_base + 0x8c ); * mmio_reg = 0x00ff2007; mdelay( 10 ); * mmio_reg = 0x78592009; mdelay( 10 ); * mmio_reg = 0x00082004; mdelay( 10 ); * mmio_reg = 0x00002004; mdelay( 10 ); for( i = 0; i < 4; i ++ ) { mmio_reg = ( unsigned int *)( mmio_base + 0x40 + i * 256 ); val32 = *mmio_reg ; if( val32 & 0x4 ) { mmio_reg = ( unsigned int *)( mmio_base + 0x48 + i * 256); val32 = *mmio_reg; val32 |= 1; *mmio_reg = val32; mdelay( 10 ); val32 &= ( ~1 ); *mmio_reg = val32; mdelay( 10 ); } } } ----- Original Message ----- From: "Lu, Yinghai" <yinghai.lu(a)amd.com> To: "Jia Jianwei" <JJia(a)Fortinet.com>; <linuxbios(a)linuxbios.org> Sent: Friday, March 31, 2006 11:40 AM Subject: RE: [LinuxBIOS] broadcom HT1000 SATA PHY initializing > You should be right. > > When I was testing that on Broadcom BLAST ref board: STAT and IDE > doesn't work. > > But on another MB (serverworks HT1000 based), IDE is working. > > Maybe some magic bit in pci conf space need to set by option rom... > > You could compare the pci conf dump between system bios and LinuxBIOS... > > BTW, Can drop your funny signature in LinuxBIOS? > > YH > > >

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Re: [LinuxBIOS] broadcom HT1000 SATA PHY initializing
by Lu, Yinghai 17 Apr '06

17 Apr '06

You should be right. When I was testing that on Broadcom BLAST ref board: STAT and IDE doesn't work. But on another MB (serverworks HT1000 based), IDE is working. Maybe some magic bit in pci conf space need to set by option rom... You could compare the pci conf dump between system bios and LinuxBIOS... BTW, Can drop your funny signature in LinuxBIOS? YH

2 2

[LinuxBIOS] Intel D865GLC motherboard support?
by Micael Beronius 15 Apr '06

15 Apr '06

Hi all, I have been reading up on Linuxbios, and with 2 motherboards from Intel that I'd like to use for this project, I feel it is time to start up. How complicated is it to adapt Linuxbios to these two boards? Has it been done (did not find any indicatons for this searching the list and reading the doc), and if not, what's missing. These boards uses the 865G chipset with gigabit ethernet through CSA and Intel specifies: 82801EB I/O Controller HUB (ICH5) 82802AB 4Mbit Firmware Hub 82865G Graphics and Memory Controller Hub Analog devices AD1985 Audio codec LPC Bus I/O Controller (both SMSC LPC47M172 and National Semiconductor PC87372 are listen) Gigabit ethernet using Intel 82547EI PLC (over CSA) All according to the documentation ftp://download.intel.com/design/motherbd/lc/C3263401.pdf lspci gives; helium micke # lspci 00:00.0 Host bridge: Intel Corporation 82865G/PE/P DRAM Controller/Host-Hub Interface (rev 02) 00:01.0 PCI bridge: Intel Corporation 82865G/PE/P PCI to AGP Controller (rev 02) 00:03.0 PCI bridge: Intel Corporation 82865G/PE/P PCI to CSA Bridge (rev 02) 00:1d.0 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #1 (rev 02) 00:1d.1 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #2 (rev 02) 00:1d.2 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #3 (rev 02) 00:1d.3 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB UHCI Controller #4 (rev 02) 00:1d.7 USB Controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) USB2 EHCI Controller (rev 02) 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev c2) 00:1f.0 ISA bridge: Intel Corporation 82801EB/ER (ICH5/ICH5R) LPC Interface Bridge (rev 02) 00:1f.1 IDE interface: Intel Corporation 82801EB/ER (ICH5/ICH5R) IDE Controller (rev 02) 00:1f.2 IDE interface: Intel Corporation 82801EB (ICH5) SATA Controller (rev 02) 00:1f.3 SMBus: Intel Corporation 82801EB/ER (ICH5/ICH5R) SMBus Controller (rev 02) 00:1f.5 Multimedia audio controller: Intel Corporation 82801EB/ER (ICH5/ICH5R) AC'97 Audio Controller (rev 02) 01:00.0 VGA compatible controller: nVidia Corporation GeForce 6200 (rev a1) 02:01.0 Ethernet controller: Intel Corporation 82547EI Gigabit Ethernet Controller (LOM) Thanks, - Micael

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Re: [LinuxBIOS] CONFIG_LB_MEM_TOPK (and a patch)
by Lu, Yinghai 15 Apr '06

15 Apr '06

Please try another switch In southbridge/amd/amd8111/amd8111_pci.c Line dword |= (1<<27) /* discard Timer */ ===> dword &= ~(1<<27); YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Ward Vandewege Sent: Monday, April 10, 2006 7:15 AM To: Alan Mimms Cc: linuxbios(a)linuxbios.org; Lu, Yinghai Subject: Re: [LinuxBIOS] CONFIG_LB_MEM_TOPK (and a patch) On Fri, Apr 07, 2006 at 04:00:28PM -0700, Alan Mimms wrote: > The code should be setting the 1<<4 bit (so as to clear one of the error > bits) instead of 1<<6 (the read only bit that signals end of HT bus > chain). > > After making this change, your board won't hang when the BIOS or Linux > detects a need to reboot due to some fatal error. > > This is a pretty trivial change to an error case that hardly ever occurs > but was crucial for us. I claim this change is safe and correct and > should be merged into the main line code. Yes, please merge that change! Our box now keeps rebooting itself instead of crashing - have a look at the attached boot log. Maybe this will be more of a clue as to what exactly is happening? Anyone got anymore ideas? Thanks, Alan!! Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior System Administrator

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