January 2023 - coreboot - mail.coreboot.org

cross-repo-cherrypick and re-writing Signed-off-by's
by Nico Huber Jan. 16, 2023

Jan. 16, 2023

Hi fellow coreboot developers, it was pointed out to me that I didn't do exactly what Chromium developers are used to (i.e. what util/scripts/cross-repo-cherrypick does) when picking patches to flashrom-stable. The major difference is that I didn't prepend Signed-off-by tags with an `Original-`. My reasoning was that it applies to the work in a patch and not the exact commit. We also don't change these tags when clicking Submit in Gerrit which also triggers a cherry- pick. Prepending the `Original-` to all the tags that are automatically added by Gerrit makes perfect sense to me, OTOH. So here's the question: Is there a particular reason that `cross-repo-cherrypick` prepends the Signed-off-by or is that just done because it treats all tags the same? Cheers, Nico

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[coreboot - Bug #314] (Rejected) Please disable 'administrator approval' on ticket.coreboot.org
by Martin Roth Jan. 15, 2023

Jan. 15, 2023

Issue #314 has been updated by Martin Roth. Status changed from New to Rejected Not a coreboot bug. closing ---------------------------------------- Bug #314: Please disable 'administrator approval' on ticket.coreboot.org https://ticket.coreboot.org/issues/314#change-1373 * Author: akjuxr3 akjuxr3 * Status: Rejected * Priority: Normal * Category: infrastructure * Start date: 2021-07-30 ---------------------------------------- Please disable this 'administrator approval' on ticket.coreboot.org. It feels like discrimination. Before i have written the first word on ticket.coreboot.org i have to be approved by someone by hand without this person knowing anything from me. I had to wait several days for this approval. Its completely unclear what is been tracked. Have the IP-address used for registration been tracked? Have the used email-address been tracked? E-mail-address-discrimination is illegal in many countries and this is completely breaking the freedom of choice! Username? Choosing (user)names is up to the user and making decision based on what names are 'allowed' to enter a platform is the most racist thing possible. Conclusion: This 'administrator approval' is sort of discrimination i have not seen for years on free projects! There is no data available at the registration process that could or should be used to decide who is allowed to report a bug in the coreboot project. Please disable this discrimination that is stopping people for days or even forever to report a coreboot issue. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #326] (Closed) raminit fails after 58188 review.coreboot.org
by Martin Roth Jan. 15, 2023

Jan. 15, 2023

Issue #326 has been updated by Martin Roth. Status changed from New to Closed No response to questions in the past year. Closing. ---------------------------------------- Bug #326: raminit fails after 58188 review.coreboot.org https://ticket.coreboot.org/issues/326#change-1372 * Author: xinhua wang * Status: Closed * Priority: Normal * Start date: 2021-12-30 ---------------------------------------- For this addition.. https://review.coreboot.org/c/coreboot/+/58188 What is the cause of this? ft232h log with raminit debug enabled https://pastebin.com/kHC0bXLs Read MPR training failed: 1, 2, 0 raminit failed ---- If I remove the patches in here (top of message) it boots fine ft232h log with raminit debug enabled https://pastebin.com/e8xhet1V Any ideas? Thx If I need more debugging options please tell me how to enable it, thx -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #335] (Closed) High prority bug causes bricking when tianocore and flash log console used together
by Martin Roth Jan. 15, 2023

Jan. 15, 2023

Issue #335 has been updated by Martin Roth. Status changed from New to Closed No response to comments asking for clarification in over a year. Closing. ---------------------------------------- Bug #335: High prority bug causes bricking when tianocore and flash log console used together https://ticket.coreboot.org/issues/335#change-1371 * Author: xinhua wang * Status: Closed * Priority: Normal * Start date: 2022-01-04 ---------------------------------------- With tianocore payload. spi flash console was working here is my log of where it hang BS: BS_DEV_INIT run times (exec / console): 209 / 87 ms FMAP: area SMMSTORE found @ 690000 (262144 bytes) smm store: 4 # blocks with size 0x10000 SMMSTORE: Setting up SMI handler BS: BS_DEV_INIT exit times (exec / console): 0 / 1 ms Finalize devices... PCI: 00:1f.0 final apm_control: Finalizing SMM. ÿ (then all yyyy) any ideas? Thx Maybe block spi flash console from being used when payload is tianocore before its resolved? It causes bricking of system for those who dont have ch341/soic clip/in circuit flashing/bios header to recover easily -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #392] (New) Coreboot 4.16 & 4.17 - SeaBios Windows 10 BSOD "ACPI Error"
by Pawel Radomychelski Jan. 15, 2023

Jan. 15, 2023

Issue #392 has been reported by Pawel Radomychelski. ---------------------------------------- Bug #392: Coreboot 4.16 & 4.17 - SeaBios Windows 10 BSOD "ACPI Error" https://ticket.coreboot.org/issues/392 * Author: Pawel Radomychelski * Status: New * Priority: High * Category: board support * Target version: 4.17 * Start date: 2022-06-18 * Affected versions: 4.16, 4.17, master * Affected hardware: Lenovo ThinkPad X230 Tablet * Affected OS: Windows 10 ---------------------------------------- Since CoreBoot 4.16 my Windows 10 cant boot from SeaBios, i get BSOD with "ACPI Error" very early. Don't know which commit exactly brakes ACPI, but i can say, that in my CoreBoot 4.15 Image from 11/09/2021 Windows 10 is booting just fine from SeaBIOS. Some time later under CoreBoot 4.16 i saw that windows is BSODing. Tried yesterday with CoreBoot 4.17 and its still broken. I think, since CB4.16 there is something broken in ACPI. As i read, the problem is, that ACPI reserves some memory area, which in Windows is reserved for the system. This [[https://ticket.coreboot.org/issues/327]] seems to be a similar problem, but the guy is using TianoCore instead of SeaBIOS. Changing the line OperationRegion (OPRG, SystemMemory, ASLS, 0x2000) to OperationRegion (OPRG, SystemMemory, ASLS, 0x1000) doesnt fix it for SeaBios, but fix it for TianoCore. ---Files-------------------------------- dmesg_cb415.txt (78.9 KB) dmesg_cb417.txt (79.9 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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coreboot 4.19 release next week
by coreboot org Jan. 15, 2023

Jan. 15, 2023

Hi everyone, The coreboot 4.19 release is scheduled to be tagged this coming weekend or next monday, barring any issues. If there are any commits that you want to be included in the release, please mark them with the `coreboot_release_4.19` hashtag. If you're not familiar with hashtags, you can set them by clicking the "show all" button at the top left of the screen in gerrit, then clicking the "hastags" edit icon. As always, please test your boards and let the release team know if there are any problems that need to be fixed before the release. We're using the irc channel #coreboot_release to coordinate our activities. Martin

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[coreboot - Bug #436] (New) Berknip doesn't want to boot with the built image
by Balazs Vinarz Jan. 15, 2023

Jan. 15, 2023

Issue #436 has been reported by Balazs Vinarz. ---------------------------------------- Bug #436: Berknip doesn't want to boot with the built image https://ticket.coreboot.org/issues/436 * Author: Balazs Vinarz * Status: New * Priority: Normal * Target version: none * Start date: 2022-11-01 * Affected hardware: Google Berknip (Zork) * Affected OS: NA ---------------------------------------- I was trying to flash the build 4.18 Coreboot image for my HP c645, as only RW_LEGACY image was available for this machine at MrChromebox. Now the machine, heat's the CPU if I plug in the USB-C adapter or the battery, but shows no image at all. I can manage to flash back the original image, I just wanted to highlight this. Build logs are added as attachments. I compared the CBFS regions side by side and it seems: * Google build only 1 microcode blob, while I have 3 and * the VBGFX.bin is missing at my build, however however the optionroms for the iGP is added. ``` diff apu/amdfw 0x5aafc0 raw 13155 | apu/amdfw 0x5aafc0 amdfw 12574 bootblock 0x77afc0 bootblock 655 | build_info 0x27e00 raw cbfs master header 0x0 cbfs header | cbfs_master_header 0x0 cbfs header config 0x2b840 raw 8 | config 0x27940 raw 4 cpu_microcode_blob.bin 0xd5c0 microcode 96 | cpu_microcode_8180.bin 0x7a80 microcode 32 (empty) 0x48280 null 33 | cpu_microcode_8181.bin 0x8740 microcode 32 (empty) 0x52d3c0 null 5150 | cpu_microcode_8201.bin 0x9400 microcode 32 (empty) 0x6ec300 null 5848 | (empty) 0x6de000 null 7085 fallback/dsdt.aml 0x2bf00 raw 157 | (empty) 0x81c00 null 54117 fallback/payload 0x511a00 simple elf 1129 | fallback/dsdt.aml 0x27ec0 raw 155 fallback/ramstage 0xfbc0 (unknown) 1136 | fallback/payload 0x6fac0 simple elf 718 fallback/romstage 0x80 (unknown) 545 | fallback/ramstage 0xa0c0 stage 1208 > fallback/romstage 0x80 stage 310 FMAP REGION: COREBOOT FMAP REGION: COREBOOT font.bin 0x4e4a80 raw 50 | fspm.bin 0x2bc00 fsp 996 fspm.bin 0x2fcc0 fsp 994 | fsps.bin 0x44180 fsp 697 fsps.bin 0x48fc0 fsp 692 | header_pointer 0x78afc0 cbfs header locale_ar.bin 0x46dcc0 raw 789 < locale_bg.bin 0x157d40 raw 1109 < locale_bn.bin 0x1185c0 raw 981 < locale_ca.bin 0x1d9e40 raw 969 < locale_cs.bin 0x42c980 raw 954 < locale_da.bin 0x1f1980 raw 938 < locale_de.bin 0x9e1c0 raw 1121 < locale_el.bin 0xf95c0 raw 1269 < locale_en.bin 0x4fd040 raw 843 < locale_es-419.bin 0x2b1200 raw 1058 < locale_es.bin 0x4145c0 raw 991 < locale_et.bin 0x269400 raw 858 < locale_fa.bin 0x4b0900 raw 787 < locale_fi.bin 0x2cb000 raw 902 < locale_fil.bin 0x1a8500 raw 1005 < locale_fr.bin 0x24ee40 raw 1078 < locale_gu.bin 0x3e8f40 raw 824 < locale_he.bin 0xd1340 raw 559 < locale_hi.bin 0x221780 raw 796 < locale_hr.bin 0x38a380 raw 970 < locale_hu.bin 0xdee00 raw 1084 < locale_id.bin 0x3a1f00 raw 924 < locale_it.bin 0x372a00 raw 965 < locale_ja.bin 0x297e40 raw 1032 < locale_kn.bin 0x33f1c0 raw 1190 < locale_ko.bin 0x443ec0 raw 646 < locale_lt.bin 0x3fd1c0 raw 951 < locale_lv.bin 0x4e5e40 raw 946 < locale_ml.bin 0x4c3d40 raw 1343 < locale_mr.bin 0x318700 raw 733 < locale_ms.bin 0x35c340 raw 917 < locale_nb.bin 0x747c0 raw 898 < locale_nl.bin 0x481140 raw 969 < locale_pl.bin 0x2e1100 raw 1092 < locale_pt-BR.bin 0x3d0580 raw 1006 < locale_pt-PT.bin 0x208840 raw 1021 < locale_ro.bin 0x498c40 raw 973 < locale_ru.bin 0x234f00 raw 1062 < locales 0x48180 raw 1 < locale_sk.bin 0x3b88c0 raw 974 < locale_sl.bin 0xb9840 raw 969 < locale_sr.bin 0x453bc0 raw 1066 < locale_sv.bin 0x172f40 raw 951 < locale_ta.bin 0x18a380 raw 1231 < locale_te.bin 0x27e3c0 raw 1049 < locale_th.bin 0x146d00 raw 695 < locale_tr.bin 0x302ec0 raw 880 < locale_uk.bin 0x1c0e40 raw 1023 < locale_vi.bin 0x130580 raw 919 < locale_zh-CN.bin 0x8a700 raw 804 < locale_zh-TW.bin 0x32a5c0 raw 849 < Name Offset Type Size Name Offset Type Size pci1002,15d8,c1.rom 0x59ec0 optionrom 542 | payload_config 0x81400 raw 16 pci1002,15dd,c4.rom 0x67340 optionrom 542 | payload_revision 0x81ac0 raw 2 revision 0x2bc00 raw 6 | pci1002,15d8,c1.rom 0x55240 optionrom 542 vbgfx.bin 0x2fbc00 raw 292 | pci1002,15dd,c4.rom 0x62680 optionrom 542 > revision 0x27b00 raw 7 ``` ---Files-------------------------------- build_berknip_20221031.log (58.6 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #445] (New) Thinkpad X200 wifi issue
by Masc Masc Jan. 15, 2023

Jan. 15, 2023

Issue #445 has been reported by Masc Masc. ---------------------------------------- Bug #445: Thinkpad X200 wifi issue https://ticket.coreboot.org/issues/445 * Author: Masc Masc * Status: New * Priority: Normal * Target version: none * Start date: 2023-01-06 * Affected versions: 4.18 ---------------------------------------- Compiled coreboot latest revision from source and built a coreboot rom image for X200 with SeaBIOS (also tried with Grub as a payload). The laptop beeps and the power LED flashes at startup and the wifi card does not work (cannot enable wifi in OS). The operating system is Debian Bullseye and the wifi card is an Atheros AR5B95. The OS boots normally, but no wifi is available. The wifi card has been tested and works fine with latest stable libreboot release. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #447] (New) X9SAE-V No Post
by Aaron Burton Jan. 15, 2023

Jan. 15, 2023

Issue #447 has been reported by Aaron Burton. ---------------------------------------- Bug #447: X9SAE-V No Post https://ticket.coreboot.org/issues/447 * Author: Aaron Burton * Status: New * Priority: Normal * Target version: 4.19 * Start date: 2023-01-09 ---------------------------------------- This one is a different story but may be related to my Optiplex 9010 issues. I recently updated coreboot on my X9SAE-V, using the same settings I had previously and after rebooting it doesn't seem to post. Previous build used SeaBIOS 1.15 (worked great), recent compile with SeaBIOS 1.16.1 and coreboot 4.19 causes no post. Did some research on the microchip used for flashing on this board but can't get it to flash externally using a Pomona 5250 w/ Raspberry pi. Guessing the pi either doesn't supply enough amperage on 3.3V for external flashing or the chip is in circuit with something on the board that requires the chip to be desoldered before reflashing externally. I have a copy of the stock bios and a working coreboot build, any suggestions for unbricking would be greatly appreciated before I try to source another board. -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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[coreboot - Bug #386] (New) ASUS P8Z77-V LX2 - Raminit issue at second boot with two 8GiB DIMMs - bootloop
by gzz5f gzz5f Jan. 15, 2023

Jan. 15, 2023

Issue #386 has been reported by gzz5f gzz5f. ---------------------------------------- Bug #386: ASUS P8Z77-V LX2 - Raminit issue at second boot with two 8GiB DIMMs - bootloop https://ticket.coreboot.org/issues/386 * Author: gzz5f gzz5f * Status: New * Priority: High * Category: board support * Target version: master * Start date: 2022-06-05 * Affected versions: master * Needs backport to: none * Affected hardware: ASUS P8Z77-V LX2 * Affected OS: all ---------------------------------------- I build coreboot today for the ASUS P8Z77-V LX2 and used the latest coreboot master code. The 2 8GiB DIMMs are working fine at first boot. You can start computer, install from a live media the OS and so on. But at the second boot it failes boot forever and its bootooping. It does not make a change if i boot for a second until SeaBIOS output and then turn off the computer or use the computer for longer time. The second boot is always broken. Workaround 1: Remove one of the two 8GiB DIMMs. Then the computer also starts fine after a reboot. Workaround 2: Install two 4GiB DIMMs instead of two 8GiB DIMMs. Then the computer also starts fine after reboot. Workaround 3: At every boot boot for a second with one DIMM. Turn off the computer, insert the second DIMM and start it again. kmalkki told me to rebuid the image with DEBUG_RAM_SETUP=y I then build a second image, with DEBUG_RAM_SETUP=y. The logfile contains the first successfull boot (created with Workaround 3), the poweroff and the poweron with the bootloop. I have let it bootloop few times before turned off the PSU. ---Files-------------------------------- coreboot_logfie.txt (197 KB) -- You have received this notification because you have either subscribed to it, or are involved in it. To change your notification preferences, please click here: https://ticket.coreboot.org/my/account

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