coreboot January 2023

coreboot@coreboot.org

28 participants
58 discussions

Re: coreboot Digest, Vol 215, Issue 1
by Gabriel Malaspina 08 Jan '23

08 Jan '23

Hi Peter, Thanks for your response. I followed steps in the tutorial to the letter up to the point where it started failing. My understanding is that /libpayload/ gets built automatically as a dependency to /coreinfo/, but don't trust me on this, as /make/ files are beyond my expertise. After running into this issue I tried to compile and install /libpayload/ manually, following instructions in the /readme/ file, but it kept failing. With a different error, though. It seemed to be able to build it but not install it due to not finding the objects just made. Something involving /AR/ probably. As I said before, tutorial worked flawlessly from an Ubuntu VM Thanks, Gabriel. On 04/01/2023 00:17, coreboot-request(a)coreboot.org wrote: > Send coreboot mailing list submissions to > coreboot(a)coreboot.org > > To subscribe or unsubscribe via email, send a message with subject or > body 'help' to > coreboot-request(a)coreboot.org > > You can reach the person managing the list at > coreboot-owner(a)coreboot.org > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of coreboot digest..." > > Today's Topics: > > 1. Re: Trouble building coreboot early stages (Peter Stuge) > 2. Status of maintained boards and policies? (Denis 'GNUtoo' Carikli) > 3. Poettering@MSFT on the future of secure booting Linux > (Peter Stuge) > 4. New Defects reported by Coverity Scan for coreboot > (scan-admin(a)coverity.com) > 5. Re: Status of maintained boards and policies? (Martin Roth) > 6. Re: Status of maintained boards and policies? > (Denis 'GNUtoo' Carikli) > > _______________________________________________ > coreboot mailing list --coreboot(a)coreboot.org > To unsubscribe send an email tocoreboot-leave(a)coreboot.org

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The 4.19 release is scheduled for 2023_01_16
by coreboot org 04 Jan '23

04 Jan '23

Hi everyone, This is our notification that we're looking at doing the coreboot 4.19 release in 2 weeks on Jan 16. Please let us know if there are any patches that need to make it into the release by setting the topic to “coreboot_release_4.19". As always, we'd appreciate any testing that can be done now before the release is done, but starting with this release, there's going to be a 1 week delay after the new version is tagged to allow for testing after the release. This will give us a chance to fix any issues that are found before making the release public. If you have any questions, please let the team know. We're using the irc channel #coreboot_release to coordinate our activities. Martin

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memcpy: detected field-spanning write (size 168) of single field "&device->entry" at drivers/firmware/google/coreboot_table.c:103 (size 8)
by Paul Menzel 03 Jan '23

03 Jan '23

Dear Linux folks, Running Linux v6.2-rc1+ on a motherboard using coreboot as firmware, the warning below is shown. ``` [ 1.630244] ------------[ cut here ]------------ [ 1.630249] memcpy: detected field-spanning write (size 168) of single field "&device->entry" at drivers/firmware/google/coreboot_table.c:103 (size 8) [ 1.630299] WARNING: CPU: 1 PID: 150 at drivers/firmware/google/coreboot_table.c:103 coreboot_table_probe+0x1ea/0x210 [coreboot_table] [ 1.630307] Modules linked in: coreboot_table(+) sg binfmt_misc fuse ipv6 autofs4 [ 1.630316] CPU: 1 PID: 150 Comm: systemd-udevd Not tainted 6.2.0-rc1-00097-gaebfba447cae #407 [ 1.630318] Hardware name: ASUS F2A85-M_PRO/F2A85-M_PRO, BIOS 4.18-4-gb3dd5af9c5 12/28/2022 [ 1.630320] RIP: 0010:coreboot_table_probe+0x1ea/0x210 [coreboot_table] [ 1.630326] Code: 08 00 00 00 4c 89 c6 4c 89 04 24 48 c7 c2 50 81 60 c0 48 c7 c7 98 81 60 c0 4c 89 4c 24 08 c6 05 ab 1e 00 00 01 e8 e1 ca 47 d3 <0f> 0b 4c 8b 4c 24 08 4c 8b 04 24 e9 35 ff ff ff 41 be ea ff ff ff [ 1.630329] RSP: 0018:ffffb409c046fc30 EFLAGS: 00010286 [ 1.630332] RAX: 0000000000000000 RBX: ffffb409c0175018 RCX: 0000000000000000 [ 1.630334] RDX: 0000000000000001 RSI: ffffffff94222bcd RDI: 00000000ffffffff [ 1.630336] RBP: ffff937a44a06c00 R08: 0000000000000000 R09: 00000000ffffdfff [ 1.630338] R10: ffffb409c046fad8 R11: ffffffff9452a948 R12: 0000000000000000 [ 1.630339] R13: ffffb409c0175000 R14: 0000000000000000 R15: ffff937a40beb410 [ 1.630341] FS: 0000000000000000(0000) GS:ffff937abb500000(0063) knlGS:00000000f7f43800 [ 1.630343] CS: 0010 DS: 002b ES: 002b CR0: 0000000080050033 [ 1.630345] CR2: 00000000f7e3c2cf CR3: 00000001046de000 CR4: 00000000000406e0 [ 1.630347] Call Trace: [ 1.630348] <TASK> [ 1.630351] platform_probe+0x3f/0xa0 [ 1.630357] really_probe+0xe1/0x390 [ 1.630361] ? pm_runtime_barrier+0x50/0x90 [ 1.630365] __driver_probe_device+0x78/0x180 [ 1.630369] driver_probe_device+0x1e/0x90 [ 1.630372] __driver_attach+0xd2/0x1c0 [ 1.630375] ? __pfx___driver_attach+0x10/0x10 [ 1.630378] bus_for_each_dev+0x78/0xc0 [ 1.630382] bus_add_driver+0x1a9/0x200 [ 1.630385] driver_register+0x8f/0xf0 [ 1.630387] ? __pfx_init_module+0x10/0x10 [coreboot_table] [ 1.630392] coreboot_table_driver_init+0x2d/0xff0 [coreboot_table] [ 1.630397] do_one_initcall+0x44/0x220 [ 1.630401] ? kmalloc_trace+0x25/0x90 [ 1.630405] do_init_module+0x4c/0x1f0 [ 1.630409] __do_sys_finit_module+0xb4/0x130 [ 1.630413] __do_fast_syscall_32+0x6f/0xf0 [ 1.630418] do_fast_syscall_32+0x2f/0x70 [ 1.630421] entry_SYSCALL_compat_after_hwframe+0x71/0x79 [ 1.630425] RIP: 0023:0xf7f49549 [ 1.630428] Code: 03 74 c0 01 10 05 03 74 b8 01 10 06 03 74 b4 01 10 07 03 74 b0 01 10 08 03 74 d8 01 00 00 00 00 00 51 52 55 89 cd 0f 05 cd 80 <5d> 5a 59 c3 90 90 90 90 8d b4 26 00 00 00 00 8d b4 26 00 00 00 00 [ 1.630430] RSP: 002b:00000000ffa7bbbc EFLAGS: 00200292 ORIG_RAX: 000000000000015e [ 1.630433] RAX: ffffffffffffffda RBX: 0000000000000010 RCX: 00000000f7f28e09 [ 1.630434] RDX: 0000000000000000 RSI: 00000000568cb4c0 RDI: 000000005689fc50 [ 1.630436] RBP: 0000000000000000 R08: 00000000ffa7bbbc R09: 0000000000000000 [ 1.630437] R10: 0000000000000000 R11: 0000000000200292 R12: 0000000000000000 [ 1.630439] R13: 0000000000000000 R14: 0000000000000000 R15: 0000000000000000 [ 1.630442] </TASK> [ 1.630443] ---[ end trace 0000000000000000 ]--- ``` Another user reported this with Linux 6.1.1 in the Arch Linux forum [1]. Kind regards, Paul [1]: https://bbs.archlinux.org/viewtopic.php?id=282245 "6.1.1-arch1-1 - dmesg"

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New Defects reported by Coverity Scan for coreboot
by scan-admin＠coverity.com 03 Jan '23

03 Jan '23

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 2 new defect(s) introduced to coreboot found with Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 2 of 2 defect(s) ** CID 1502248: (CHECKED_RETURN) /payloads/libpayload/build/tests/util/cmocka/CMakeFiles/CMakeScratch/TryCompile-F1Mpp0/CheckFunctionExists.c: 17 in main() /build/coverage/util/cmocka/CMakeFiles/CMakeScratch/TryCompile-f4hRas/CheckFunctionExists.c: 17 in main() ________________________________________________________________________________________________________ *** CID 1502248: (CHECKED_RETURN) /payloads/libpayload/build/tests/util/cmocka/CMakeFiles/CMakeScratch/TryCompile-F1Mpp0/CheckFunctionExists.c: 17 in main() 11 int ac; 12 char* av[]; 13 # else 14 int main(int ac, char* av[]) 15 { 16 # endif >>> CID 1502248: (CHECKED_RETURN) >>> Calling "strcmp" without checking return value (as is done elsewhere 5 out of 6 times). 17 CHECK_FUNCTION_EXISTS(); 18 if (ac > 1000) { 19 return *av[0]; 20 } 21 return 0; 22 } /build/coverage/util/cmocka/CMakeFiles/CMakeScratch/TryCompile-f4hRas/CheckFunctionExists.c: 17 in main() 11 int ac; 12 char* av[]; 13 # else 14 int main(int ac, char* av[]) 15 { 16 # endif >>> CID 1502248: (CHECKED_RETURN) >>> Calling "strcmp" without checking return value (as is done elsewhere 240 out of 244 times). 17 CHECK_FUNCTION_EXISTS(); 18 if (ac > 1000) { 19 return *av[0]; 20 } 21 return 0; 22 } ** CID 1502247: (PARSE_ERROR) /payloads/libpayload/build/tests/util/cmocka/CMakeFiles/CMakeScratch/TryCompile-4b1HwR/CheckIncludeFile.c: 1 in () /build/coverage/util/cmocka/CMakeFiles/CMakeScratch/TryCompile-4l7sqY/CheckIncludeFile.c: 1 in () ________________________________________________________________________________________________________ *** CID 1502247: (PARSE_ERROR) /payloads/libpayload/build/tests/util/cmocka/CMakeFiles/CMakeScratch/TryCompile-4b1HwR/CheckIncludeFile.c: 1 in () >>> CID 1502247: (PARSE_ERROR) >>> cannot open source file "io.h" 1 #include <io.h> 2 3 #ifdef __CLASSIC_C__ 4 int main() 5 { 6 return 0; /build/coverage/util/cmocka/CMakeFiles/CMakeScratch/TryCompile-4l7sqY/CheckIncludeFile.c: 1 in () >>> CID 1502247: (PARSE_ERROR) >>> cannot open source file "io.h" 1 #include <io.h> 2 3 #ifdef __CLASSIC_C__ 4 int main() 5 { 6 return 0; ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u15810271.ct.sendgrid.net/ls/click?upn=HRESupC-2F2Czv4BOaCWWCy7my0P…

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Poettering@MSFT on the future of secure booting Linux
by Peter Stuge 03 Jan '23

03 Jan '23

https://0pointer.net/blog/brave-new-trusted-boot-world.html "Proposed Construction Central to the proposed design is the concept of a Unified Kernel Image (UKI). These UKIs are the combination of a Linux kernel image, and initrd, a UEFI boot stub program (and further resources, see below) into one single UEFI PE file ... " Good bye grub, hello UEFI lock-in. //Peter

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Trouble building coreboot early stages
by Gabriel Malaspina 02 Jan '23

02 Jan '23

Hello, I'd like to build coreboot for HP Elitebook 8570w but I keep running into trouble. I'm trying to build /coreinfo/, following the 1st part of the tutorial <https://doc.coreboot.org/tutorial/part1.html> to the letter, but it simply doesn't work. Initially I'd get an error involving /libpayload/; I got it compiled and installed following instructions in /README/ and now I'm getting the following: ... ... AR /home/gabriel/coreboot/payloads/coreinfo/libpayload/libpayload.a CC arch/x86/head.head.o.o CP /home/gabriel/coreboot/payloads/coreinfo/libpayload/head.o LPGCC coreinfo.bin /home/gabriel/coreboot/util/crossgcc/xgcc/i386-elf/bin/ld.bfd: cannot find -lpayload /home/gabriel/coreboot/util/crossgcc/xgcc/i386-elf/bin/ld.bfd: cannot find libgcc.a: No such file or directory collect2: error: ld returned 1 exit status make: *** [../libpayload/Makefile.payload:93: build/coreinfo.bin] Error 1 make: Leaving directory '/home/gabriel/coreboot/payloads/coreinfo I'd guess it's a matter of unsatisfied dependencies but I don't understand /make/ files, as of yet at least. Anyone that could point me in any direction? Thanks, Gabriel.

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Re: Cisco Meraki use coreboot in some MX products and will not provide the source code
by Martin Roth 02 Jan '23

02 Jan '23

Also, I think I tracked down the commit that that tree was based on: 5d0601767f vendorcode/amd/agesa/fam10: Build as a static library (2014-12-08) Method: I believe that coreboot's most changed file is /Makefile.inc, so I checked out every revision of that file and compared it to their Makefile.inc. That narrowed it down to somewhere in this range: Commit ID: 5839635add, Lines Different: 35 Commit ID: a234f45601, Lines Different: 0 Commit ID: 24cca75b47, Lines Different: 4 Here's the command: ``` for commit in $(git log --pretty=%h 4.0..origin/master <http://4.0..origin/master> -- Makefile.inc); do git checkout $commit >/dev/null 2>&1; printf "Commit ID: %s, Lines Different: %s\n" "$commit" "$(diff Makefile.inc ../coreboot-mx84/Makefile.inc | wc -l)" ; done ``` Then taking the commit ids before and after the identical Makefile.inc, I did a diff of the entire tree to find the minimum: Commit ID: b713d93525, Lines Different: 1391 Commit ID: a3a722c5fc, Lines Different: 1382 Commit ID: 5d0601767f, Lines Different: 1366 Commit ID: fd1349bb49, Lines Different: 1945 Commit ID: 99a3bba171, Lines Different: 2882 And the command: ``` for commit in $(git log --pretty=%h 24cca75b47..5839635add); do git checkout $commit >/dev/null 2>&1; git reset HEAD --hard >/dev/null 2>&1; printf "Commit ID: %s, Lines Different: %s\n" "$commit" "$(diff -r /work/git/coreboot-https /work/git/coreboot-mx84 | wc -l)" ; done ``` Looking at what's contained in the repo on github, I'd probably delete crossgcc/xgcc and crossgcc/tarballs from git, but that's up to you. Hope this helps. Martin Dec 22, 2022, 14:10 by coreboot(a)coreboot.org: > Hi Hal, > Thanks for bringing this up. I've added it to the agenda of the next coreboot leadership meeting to discuss how we want to handle this. > > I'll reach out to the SFC again to see what we should expect in cases like this. > > Martin > > > Dec 22, 2022, 13:42 by hal.martin(a)gmail.com: > >> Hello, >> >> Meraki provided the coreboot source code for the MX84 on 2022-12-09. >> >> I have uploaded the MX84 coreboot source code provided by Meraki to >> GitHub: https://github.com/halmartin/coreboot-mx84 >> >> The coreboot source code for the MX250 still has not been provided. >> >> Kind regards, >> Hal >> >> On Thu, Jun 30, 2022 at 3:47 AM ron minnich <rminnich(a)gmail.com> wrote: >> >>> >>> I've asked the software freedom conservancy to take a look. >>> >>> On Wed, Jun 29, 2022, 2:48 PM Hal Martin <hal.martin(a)gmail.com> wrote: >>> >>>> >>>> Hello, >>>> >>>> Several Cisco Meraki products (MX84, MX250) are using the coreboot bootloader. Meraki are also distributing coreboot builds for these products via their update mechanism. >>>> >>>> In October 2021, I requested the corresponding coreboot source code for the MX84 from open-source(a)meraki.com. Another individual requested the coreboot source code for the MX250 around the same time. We own the devices in quesiton. >>>> >>>> To date, Meraki have not provided the source code or provided an explanation as to the delay in providing the source code. The last reply I received was in January, and they have not replied to any of my follow up requests. >>>> >>>> As coreboot is GPL licensed software, I wanted to inform the coreboot community that I believe Cisco Meraki are not acting in good faith and are, in my opinion, violating the GPL by not providing the coreboot source code upon request. >>>> >>>> Kind regards, >>>> Hal Martin >>>> _______________________________________________ >>>> coreboot mailing list -- coreboot(a)coreboot.org >>>> To unsubscribe send an email to coreboot-leave(a)coreboot.org >>>> >> _______________________________________________ >> coreboot mailing list -- coreboot(a)coreboot.org >> To unsubscribe send an email to coreboot-leave(a)coreboot.org >> > > _______________________________________________ > coreboot mailing list -- coreboot(a)coreboot.org > To unsubscribe send an email to coreboot-leave(a)coreboot.org >

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Possible modification ACPI uefi bios
by José Domingo Torres Montoya 02 Jan '23

02 Jan '23

Hi, thank you in advance for your excellent work on coreboot for chromebook computers, the UEFI version is working well, but now I need a modification to be able to manage ACPI, I need the computer to always be on, and what if it has Loss of current, when the power supply returns to the Computer, turn it on again without having to press the power button If this modification is possible or already exists, tell me the cost for the feature Thank you again in advance and I look forward to your prompt response. -- www.mrfichas.com <http://www.mrwisp.com> García, Nuevo León. Area metropolitana de Monterrey WhatsApp 8133815779

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coreboot January 2023