coreboot September 2018

coreboot@coreboot.org

59 participants
160 discussions

Re: [coreboot] Lenovo X230 + 32GB RAM ?
by Nico Huber 03 Sep '18

03 Sep '18

Hi David, On 03.09.2018 19:13, David Potocnik wrote: > Coreboot, or perhaps rule it out completely? it's impossible, unless you want to heavily mod the mainboard. Ivy Bridge supports 4 ranks per channel, max 4GiB per rank. SO-DIMMs have only 2 ranks. So with 2 SO-DIMM slots, there are physical connections missing to get to 32GiB. > Information on RAM frequencies is welcome as well: > > I've also heard reports of people running the RAM at 1866Mhz. A newer > version of the official BIOS reduced the original 1666Mhz, to 1333Mhz. I > believe there's a mod available that over-rides this: > http://x220.mcdonnelltech.com/resources/ > > > How is this currently on Coreboot? coreboot limits the frequency to whatever the board manufacturer con- figured the chipset to (using one-time programmable fuses). It can be configured, however, to ignore the fuses. Then it would use whatever the RAM supports up to the CPU's limit. This is overclocking so there is no guarantee that it would work on one X230 sample just because it works on another. And there is probably no real-world application that would benefit (2 x DDR3-800 is already quite fast compared to what Ivy bridge can do with the data). Hard to tell why Lenovo lowered the frequency late. Maybe because there was no performance impact but it saves power? Nico

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Lenovo X230 + 32GB RAM ?
by David Potocnik 03 Sep '18

03 Sep '18

Hi all, Please excuse this absolutely green question. But it crossed my mind a few times now, and I've seen mentions of it with people, as unqualified as I am, speculating about it here and there. So, the Lenovo X230 sports Ivy Bridge CPUs, which apparently support 32GB RAM. https://ark.intel.com/products/64893/Intel-Core-i7-3520M-Processor-4M-Cache… Even though the official Lenovo documentation says the max RAM supported is 16GB, the docs also claimed 8GB was max for X220. And many of us were happy to realize that wasn't true, running 16GB. I've heard (possibly uninformed) mentions that the 16GB limit in X230 is a BIOS limit. Could anyone think it would be possible to make this work with Coreboot, or perhaps rule it out completely? Information on RAM frequencies is welcome as well: I've also heard reports of people running the RAM at 1866Mhz. A newer version of the official BIOS reduced the original 1666Mhz, to 1333Mhz. I believe there's a mod available that over-rides this: http://x220.mcdonnelltech.com/resources/ How is this currently on Coreboot? Does anyone see any possible developments in these directions? Kind regards to anyone that would shed light on this. - David

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APIC and lspci
by Hilbert Tu(杜睿哲_Pegatron) 03 Sep '18

03 Sep '18

Hi, I have a customized Intel Denverton-NS platform similar like Harcuvar CRB. In dmesg, I can see following: [ 10.973387] ACPI: PCI Interrupt Link [LNKA] (IRQs 6 7 10 *11 12 14 15) [ 10.981587] ACPI: PCI Interrupt Link [LNKB] (IRQs 6 7 *10 11 12 14 15) [ 10.989776] ACPI: PCI Interrupt Link [LNKC] (IRQs *6 7 10 11 12 14 15) [ 10.997961] ACPI: PCI Interrupt Link [LNKD] (IRQs 6 *7 10 11 12 14 15) [ 11.006147] ACPI: PCI Interrupt Link [LNKE] (IRQs 6 7 10 11 *12 14 15) [ 11.014332] ACPI: PCI Interrupt Link [LNKF] (IRQs 6 7 10 11 12 *14 15) [ 11.022518] ACPI: PCI Interrupt Link [LNKG] (IRQs 6 7 10 11 12 14 *15) [ 11.030697] ACPI: PCI Interrupt Link [LNKH] (IRQs 6 7 10 11 12 14 *15) And by “lspci -s 00:14.0 -vv”, there is a message “Interrupt: pin A routed to IRQ 28”. Actually I know in the devicetree.cb, the device 14’s interrupt is configured by IR08 which routes INTA to PIRQE and LNKE is using IRQ12. This is the legacy interrupt mode as kernel message dumped. But in ACPI mode, why does lspci report IRQ28 and how to reconfigure it in Coreboot? Please help to clarify. Thanks. -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊，僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件，請立即回覆郵件通知寄件人，並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為，皆嚴格禁止。

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Re: [coreboot] how to change PCI device's PFA
by Hilbert Tu(杜睿哲_Pegatron) 03 Sep '18

03 Sep '18

Hi Lance, Got it. I’ll check that. Thanks. -Hilbert From: Lance Zhao [mailto:lance.zhao@gmail.com] Sent: Saturday, September 01, 2018 1:29 AM To: Hilbert Tu(杜睿哲_Pegatron) Cc: coreboot(a)coreboot.org Subject: Re: [coreboot] how to change PCI device's PFA Those devices have been fixed from chipset, I don't think any software side can change that. I will prefer to have a quick scan of PCI spec 2.2 first, which mentioned that clearly. On Thu, Aug 30, 2018 at 11:44 PM Hilbert Tu(杜睿哲_Pegatron) <Hilbert_Tu(a)pegatroncorp.com<mailto:Hilbert_Tu@pegatroncorp.com>> wrote: Hi, In my devicetree.cb of Intel Harcuvar CRB, I see the following PCI configuration: device pci 14.0 on end # SATA Controller 1 device pci 15.0 on end # XHCI USB Controller Can I change the device number for each different PCI device? For example, device pci 16.0 on end # SATA Controller 1 device pci 17.0 on end # XHCI USB Controller Is this PCI enumeration same in Coreboot and kernel? Or can I change it dynamically? Thanks. -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊，僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件，請立即回覆郵件通知寄件人，並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為，皆嚴格禁止。 -- coreboot mailing list: coreboot(a)coreboot.org<mailto:coreboot@coreboot.org> https://mail.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] coreboot on Thinkpad T420 : Ctrl and Fn key swap
by Angel Pons 02 Sep '18

02 Sep '18

Hello again, > Flashtool advertises against using it directly from a laptop, > do you know if it can cause issues with the T420 ? Or if, were > the bios bricked, I could unbrick it by flashing again externally ? At the end of the T420 wiki page, it says using flashrom's internal programmer is possible. The laptop warning does not apply to all laptops (depends on how hardware is connected), and the T420 is safe to use in this sense. If you happen to flash a non-booting coreboot, you can use an external programmer. I am not sure whether the flash chip is powered, though. Regards, Angel Pons

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Re: [coreboot] coreboot on Thinkpad T420 : Ctrl and Fn key swap
by Sacripan averti 02 Sep '18

02 Sep '18

Hello, thank you both, I successfuly modified the parameter using nvramtool. Unfortunately I did not keep wires attached to the laptop mainboard, so I will try to flash from the laptop or wait a bit (so I can have soldering tools). Flashtool advertises against using it directly from a laptop, do you know if it can cause issues with the T420 ? Or if, were the bios bricked, I could unbrick it by flashing again externally ? Thanks, Mathias On 9/1/18 11:20 PM, Angel Pons wrote: Hello Mathias, The prebuilt images are older than two years. My advice would be to build coreboot from source, from either master or 4.8.1 (4.8 is broken). To use the fn/ctrl swap, enabling "Use CMOS for configuration values" in Kconfig is needed. Note that using nvramtool as Evgeny stated should be possible with the old image though. Regards, Angel Pons On 9/1/18 8:43 PM, Evgeny wrote: Hi, There is a CMOS option called "fn_ctrl_swap", you can set it with nvramcui payload or with nvramtool.

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Re: [coreboot] coreboot on Thinkpad T420 : Ctrl and Fn key swap
by Evgeny 01 Sep '18

01 Sep '18

Hi, There is a CMOS option called "fn_ctrl_swap", you can set it with nvramcui payload or with nvramtool. On 09/01/2018 09:11 PM, Sacripan averti wrote: > Hello, > I just flashed the image "coreboot_snb_ivy_1.rom > <https://www.dropbox.com/sh/mq1e2a54vv030nz/AABwO3JGUuS_CUwwwO6YAbzea/corebo…>" > provided by the writer of the coreboot T420 wiki page, it went fine, > which is great :) > > I am writing to this list because on the T420 wiki page, it is > indicated that « Ctrl-Fn swap » has been tested, but I can't find > where I should activate it. I looked through the options in make > nconfig, but I couldn't find anything. > > So if anyone knows anything about this, I'd be glad to know as well ! > > Thanks a lot, > > Mathias > >

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Microcode Updates PSA (New users please read)
by Taiidan＠gmx.com 01 Sep '18

01 Sep '18

I am making this due to seeing many mis-informed users that are engaging in dangerous practices. Microcode updates should ALWAYS be installed unless you are an expert user and have repeatedly verified that your CPU doesn't require them and you are prepared for the risks which include for instance on the piledriver CPU's (opteron 63xx/43xx and the G505S's laptop cpus) a userland to root exploit, a broken IOMMU and a timer issue that means games and certain applications don't work properly. Unfortunately x86 is stuck with non owner controlled undocumented proprietary microcode updates and in the case of intel they are encrypted for some reason - AFAIK only POWER has owner controlled microcode. Despite this it is still a good idea to install them - I do on my coreboot computers and thus I don't ruin my security for no good reason. NOTE: For microcode embedding in coreboot to work you must check both the "generate microcode update from tree" option and the "use non-free blob repo" option - doing the first but not the second will result in a silent fail.

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8GB graphics cards work on coreboot - in case anyone is wondering
by Taiidan＠gmx.com 01 Sep '18

01 Sep '18

I was worried that it wouldn't work for some reason like due to lack of 64bit MMIO in coreboot but I just installed an AMD Raden RX580 8GB on my KGPE-D16 and it works great. I am playing the latest games on max settings in a VM with a GPU bottleneck at 1080p with my single 6328 CPU...it is nice to finally have good smooth gameplay with high fps.

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coreboot on Thinkpad T420 : Ctrl and Fn key swap
by Sacripan averti 01 Sep '18

01 Sep '18

Hello, I just flashed the image "coreboot_snb_ivy_1.rom <https://www.dropbox.com/sh/mq1e2a54vv030nz/AABwO3JGUuS_CUwwwO6YAbzea/corebo…>" provided by the writer of the coreboot T420 wiki page, it went fine, which is great :) I am writing to this list because on the T420 wiki page, it is indicated that « Ctrl-Fn swap » has been tested, but I can't find where I should activate it. I looked through the options in make nconfig, but I couldn't find anything. So if anyone knows anything about this, I'd be glad to know as well ! Thanks a lot, Mathias

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coreboot September 2018