coreboot August 2018

coreboot@coreboot.org

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110 discussions

8GB graphics cards work on coreboot - in case anyone is wondering
by Taiidan＠gmx.com 01 Sep '18

01 Sep '18

I was worried that it wouldn't work for some reason like due to lack of 64bit MMIO in coreboot but I just installed an AMD Raden RX580 8GB on my KGPE-D16 and it works great. I am playing the latest games on max settings in a VM with a GPU bottleneck at 1080p with my single 6328 CPU...it is nice to finally have good smooth gameplay with high fps.

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Re: [coreboot] how to change PCI device's PFA
by Lance Zhao 31 Aug '18

31 Aug '18

Those devices have been fixed from chipset, I don't think any software side can change that. I will prefer to have a quick scan of PCI spec 2.2 first, which mentioned that clearly. On Thu, Aug 30, 2018 at 11:44 PM Hilbert Tu(杜睿哲_Pegatron) < Hilbert_Tu(a)pegatroncorp.com> wrote: > Hi, > > In my devicetree.cb of Intel Harcuvar CRB, I see the following PCI > configuration: > device pci 14.0 on end # SATA Controller 1 > device pci 15.0 on end # XHCI USB Controller > > Can I change the device number for each different PCI device? For example, > device pci 16.0 on end # SATA Controller 1 > device pci 17.0 on end # XHCI USB Controller > > Is this PCI enumeration same in Coreboot and kernel? Or can I change it > dynamically? > > Thanks. > -Hilbert > This e-mail and its attachment may contain information that is > confidential or privileged, and are solely for the use of the individual to > whom this e-mail is addressed. If you are not the intended recipient or > have received it accidentally, please immediately notify the sender by > reply e-mail and destroy all copies of this email and its attachment. > Please be advised that any unauthorized use, disclosure, distribution or > copying of this email or its attachment is strictly prohibited. > > 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊，僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件，請立即回覆郵件通知寄件人，並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為，皆嚴格禁止。 > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot

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New Defects reported by Coverity Scan for coreboot
by scan-admin＠coverity.com 31 Aug '18

31 Aug '18

Hi, Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan. 5 new defect(s) introduced to coreboot found with Coverity Scan. 1 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan. New defect(s) Reported-by: Coverity Scan Showing 5 of 5 defect(s) ** CID 1395334: (BAD_SHIFT) /src/lib/gpio.c: 150 in _gpio_base3_value() /src/lib/gpio.c: 147 in _gpio_base3_value() /src/lib/gpio.c: 150 in _gpio_base3_value() /src/lib/gpio.c: 150 in _gpio_base3_value() ________________________________________________________________________________________________________ *** CID 1395334: (BAD_SHIFT) /src/lib/gpio.c: 150 in _gpio_base3_value() 144 case 0: /* Ignore '0' digits. */ 145 break; 146 case 1: /* Account for binaries 0 to 2^index - 1. */ 147 binary_below += 1 << index; 148 break; 149 case 2: /* Account for binaries 0 to 2^(index+1) - 1. */ >>> CID 1395334: (BAD_SHIFT) >>> In expression "1 << index + 1", left shifting by more than 31 bits has undefined behavior. The shift amount, "index + 1", is at least 32. 150 binary_below += 1 << (index + 1); 151 has_z = 1; 152 } 153 } 154 } 155 /src/lib/gpio.c: 147 in _gpio_base3_value() 141 */ 142 if (binary_first && !has_z) { 143 switch (temp) { 144 case 0: /* Ignore '0' digits. */ 145 break; 146 case 1: /* Account for binaries 0 to 2^index - 1. */ >>> CID 1395334: (BAD_SHIFT) >>> In expression "1 << index", left shifting by more than 31 bits has undefined behavior. The shift amount, "index", is at least 32. 147 binary_below += 1 << index; 148 break; 149 case 2: /* Account for binaries 0 to 2^(index+1) - 1. */ 150 binary_below += 1 << (index + 1); 151 has_z = 1; 152 } /src/lib/gpio.c: 150 in _gpio_base3_value() 144 case 0: /* Ignore '0' digits. */ 145 break; 146 case 1: /* Account for binaries 0 to 2^index - 1. */ 147 binary_below += 1 << index; 148 break; 149 case 2: /* Account for binaries 0 to 2^(index+1) - 1. */ >>> CID 1395334: (BAD_SHIFT) >>> In expression "1 << index + 1", left shifting by more than 31 bits has undefined behavior. The shift amount, "index + 1", is at least 33. 150 binary_below += 1 << (index + 1); 151 has_z = 1; 152 } 153 } 154 } 155 /src/lib/gpio.c: 150 in _gpio_base3_value() 144 case 0: /* Ignore '0' digits. */ 145 break; 146 case 1: /* Account for binaries 0 to 2^index - 1. */ 147 binary_below += 1 << index; 148 break; 149 case 2: /* Account for binaries 0 to 2^(index+1) - 1. */ >>> CID 1395334: (BAD_SHIFT) >>> In expression "1 << index + 1", left shifting by more than 31 bits has undefined behavior. The shift amount, "index + 1", is as much as 32. 150 binary_below += 1 << (index + 1); 151 has_z = 1; 152 } 153 } 154 } 155 ** CID 1395333: Memory - illegal accesses (OVERRUN) /src/lib/gpio.c: 117 in _gpio_base3_value() ________________________________________________________________________________________________________ *** CID 1395333: Memory - illegal accesses (OVERRUN) /src/lib/gpio.c: 117 in _gpio_base3_value() 111 * 1: pull up 112 * 2: floating 113 */ 114 printk(BIOS_DEBUG, "Reading tristate GPIOs: "); 115 for (index = num_gpio - 1; index >= 0; --index) { 116 temp = gpio_get(gpio[index]); >>> CID 1395333: Memory - illegal accesses (OVERRUN) >>> Overrunning array "value" of 32 bytes at byte offset 32 using index "index" (which evaluates to 32). 117 temp |= ((value[index] ^ temp) << 1); 118 printk(BIOS_DEBUG, "%c ", tristate_char[temp]); 119 result = (result * 3) + temp; 120 121 /* 122 * For binary_first we keep track of the normal ternary result ** CID 1395332: Integer handling issues (BAD_SHIFT) /src/lib/gpio.c: 158 in _gpio_base3_value() ________________________________________________________________________________________________________ *** CID 1395332: Integer handling issues (BAD_SHIFT) /src/lib/gpio.c: 158 in _gpio_base3_value() 152 } 153 } 154 } 155 156 if (binary_first) { 157 if (has_z) >>> CID 1395332: Integer handling issues (BAD_SHIFT) >>> In expression "1 << num_gpio", left shifting by more than 31 bits has undefined behavior. The shift amount, "num_gpio", is at least 33. 158 result = result + (1 << num_gpio) - binary_below; 159 else /* binary_below is normal binary system value if !has_z. */ 160 result = binary_below; 161 } 162 163 printk(BIOS_DEBUG, "= %d (%s base3 number system)\n", result, ** CID 1395331: Uninitialized variables (UNINIT) /src/soc/intel/cannonlake/cnl_memcfg_init.c: 116 in cannonlake_memcfg_init() ________________________________________________________________________________________________________ *** CID 1395331: Uninitialized variables (UNINIT) /src/soc/intel/cannonlake/cnl_memcfg_init.c: 116 in cannonlake_memcfg_init() 110 if (spd->spd_smbus_address[i] != 0) { 111 mem_cfg->SpdAddressTable[i] = spd->spd_smbus_address[i]; 112 OnModuleSpd = 1; 113 } 114 } 115 >>> CID 1395331: Uninitialized variables (UNINIT) >>> Using uninitialized value "OnModuleSpd". 116 if (!OnModuleSpd) { 117 if (spd->spd_by_index) { 118 meminit_cbfs_spd_index(mem_cfg, cnl_cfg, 119 spd->spd_spec.spd_index); 120 } else { 121 meminit_spd_data(mem_cfg, cnl_cfg, ** CID 1395330: Null pointer dereferences (FORWARD_NULL) /util/romcc/romcc.c: 1988 in new_occurrence() ________________________________________________________________________________________________________ *** CID 1395330: Null pointer dereferences (FORWARD_NULL) /util/romcc/romcc.c: 1988 in new_occurrence() 1982 col = get_col(state->file); 1983 } 1984 if (state->function) { 1985 function = state->function; 1986 } 1987 last = state->last_occurrence; >>> CID 1395330: Null pointer dereferences (FORWARD_NULL) >>> Passing null pointer "filename" to "strcmp", which dereferences it. [Note: The source code implementation of the function has been overridden by a builtin model.] 1988 if (last && 1989 (last->col == col) && 1990 (last->line == line) && 1991 (last->function == function) && 1992 ((last->filename == filename) || 1993 (strcmp(last->filename, filename) == 0))) ________________________________________________________________________________________________________ To view the defects in Coverity Scan visit, https://u2389337.ct.sendgrid.net/wf/click?upn=08onrYu34A-2BWcWUl-2F-2BfV0V0…

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how to change PCI device's PFA
by Hilbert Tu(杜睿哲_Pegatron) 31 Aug '18

31 Aug '18

Hi, In my devicetree.cb of Intel Harcuvar CRB, I see the following PCI configuration: device pci 14.0 on end # SATA Controller 1 device pci 15.0 on end # XHCI USB Controller Can I change the device number for each different PCI device? For example, device pci 16.0 on end # SATA Controller 1 device pci 17.0 on end # XHCI USB Controller Is this PCI enumeration same in Coreboot and kernel? Or can I change it dynamically? Thanks. -Hilbert This e-mail and its attachment may contain information that is confidential or privileged, and are solely for the use of the individual to whom this e-mail is addressed. If you are not the intended recipient or have received it accidentally, please immediately notify the sender by reply e-mail and destroy all copies of this email and its attachment. Please be advised that any unauthorized use, disclosure, distribution or copying of this email or its attachment is strictly prohibited. 本電子郵件及其附件可能含有機密或依法受特殊管制之資訊，僅供本電子郵件之受文者使用。台端如非本電子郵件之受文者或誤收本電子郵件，請立即回覆郵件通知寄件人，並銷毀本電子郵件之所有複本及附件。任何未經授權而使用、揭露、散佈或複製本電子郵件或其附件之行為，皆嚴格禁止。

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Re: [coreboot] T450S + Coreboot
by Angel Pons 31 Aug '18

31 Aug '18

Hello again, > Sorry, I'm going to read the documentation more and make this a > personal goal by the end of 2019. I didn't want to stir up so much > drama. Time and money are not constraints on this particular > problem. One way or another by January 22, 2019 I will have either > figured it out or I will pay to figure it out. I have used Linux since > college. I have no kids. I have no girlfriend. I have tons of free time. Pardon my understanding, or its lack thereof: What will you have figured out or will have paid to figure out? If you are referring about Intel Boot Guard, only Intel and/or Lenovo have the information to bypass it, and I don't believe neither of them will be willing to give away control over Boot Guard, since it is a security "feature" (defective by design IMHO). Disclosing information such as keys or bypass methods would imply knowingly creating a backdoor, which can be severely damaging to either business' reputation should this backdoor be made public. I would not expect neither Intel nor Lenovo to release any material. If you want some personal goals, I have some recommendations: Get something that is easy to get coreboot on such as a mainboard that is already supported, or one with supported chips but not supported by coreboot yet. If getting the latter option, I feel the easiest boards to port to coreboot are Ivy/Sandybridge desktop boards. If the mainboard's SuperIO is supported as well, porting such a board is easy. I have ported two boards like that, and it is in fact easy. > according to cpubenchmark's passmark I find it rather puzzling that you are using the performance scores provided by such a thing, and at the same time complaining about the openness of the ME. > I might be saying wrong things here but aren't ALL cpus affected by > meltdown? Not all, IIRC Meltdown (CVE-2017-5754) affects mainly Intel and ARM chips. And on Intel CPUs, the newer the CPU is, the lower the performance impact is because of better hardware mechanisms (PCID I think?). Regarding AMD, I recall reading Meltdown is not an issue and Spectre Variant 2 (CVE-2017-5715) is ineffective compared to Intel, but I am not sure of the latter claim since I barely read about this topic. > Most CPU's require microcode updates as there are critical errors in > manufacturing microcode. Spectre Variant 3a (CVE-2018-3640) seems to be fixed by microcode updates only, accoring to Intel. And this is not the only error that has been found in microcode. >> Actually it might be a good idea for Purism to at least consider the >> switch to AMD Ryzen CPUs. > Absolutely not. > If anything they should leave x86 Suggesting Ryzen as an alternative to Intel for Purism is, in my view, rather unsound. There is nothing done for Ryzen in coreboot, and even if there was (probably lots of money are needed to accomplish this), what do you do about: - The PSP? The ME was one of the reasons to drop Intel, but Ryzen has something similar. This is, in fact, the most meaningless issue. - Memory/silicon init? Would AMD cooperate and release source code/full datasheets, or would they distribute a blob like the FSP, if they release anything at all? This is the biggest issue. - The VBIOS? Most Intel iGPUs can light up using libgfxinit (or NGI), but what about AMD? Right now the only reasonable option is the VBIOS (I don't see any progress being made by AtomDis). - The XHCI blob? Considered an "optional" blob by some, but is it optional? There is a ML thread regarding an Intel Denverton board which seems to lack EHCI controllers. If EHCI disappears from AMD too, what happens with USB support without that "optional" blob? Should a PCIe card be used instead? Not an option on laptops! IMHO these issues make Ryzen for Purism stay as a dream, at least in the foreseeable future. I am not an economist, but I strogly consider leaving x86 is a losing move (if things don't change much). There are far more people locked on x86 for various reasons than people willing to switch to POWER or RISC-V. I am not saying such a laptop is a bad idea, but would be met with little profit (large investment, low return). If x86 starts losing power to POWER (no pun intended) or RISC-V, then a non-x86 laptop (or any type of computer) may gain traction and sound more reasonable. > Ivy/sandy = can nerf to BUP > post ivy/sandy = kernel still runs > I would argue there is a big difference there I thought the large ME change was in Skylake with ME version 11, according to this: [1] >> This makes me feel I should recall what Nico told you earlier: >> "please don't spread FUD on this list." > It isn't exactly "FUD" to believe that there are undocumented ME > functions I feel like the important point in Nico's message is not the "FUD" itself, but rather "don't spread ... on this list". It does not matter what you believe in if you keep it for yourself. Spreading your beliefs as if they were objective information is what starts fires. > After all ME/PSP was something that no one really asked for The ME on business computers provides rather useful features for a company (anti-theft, remote management...), even though the implementation seems to me defective by design. Probably big companies pushed forward, maybe Intel wanted it for their own usage... Regarding PSP, I am afraid I am uninformed. > My suggestion: pick a laptop or system you like, for whatever reason you like it. And work on it. And produce and upstream code. > If you do that, and you create more code, you are moving us all to a better place. The more knowledge we can put into source code form, the better. > And, if you are one of those people moving us to a better place (and you all are, since you are here), please support the others of us who are also trying to do the right thing, maybe in a different way. > We're all trying to do the right thing. We're all dealing with the compromises that arise from our particular set of decisions. We don't always agree on those choices. I think we should be able to agree that increasing our knowledge and skills as > we have in this project is good for all. Ron, those are a true wise man's words. Thank you for reminding what we should strive for. I feel that is much more productive than arguing. I realized how pleasing it is to contribute code and feel something is being produced. Best regards, Angel Pons [1]: https://github.com/corna/me_cleaner/wiki/How-does-it-work%3F

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Re: [coreboot] T450S + Coreboot
by Taiidan＠gmx.com 30 Aug '18

30 Aug '18

On 08/30/2018 11:47 AM, Nico Huber wrote: >> Actually it might be a good idea for Purism to at least consider the >> switch to AMD Ryzen CPUs. Absolutely not. If anything they should leave x86 not simply waste money going to another blobbed never-owner-controlled platform with a now unfriendly vendor (such a shame AMD used to be really cool with coreboot) and having to spend even more to create hardware initiation code etc. Creating a POWER laptop is technically possible thanks to the low power consumption of POWER9 - and tim said raptor will make one if sales of the TALOS 2 are good. The bottom line is that "jailbreaking" is rolling a boulder up a hill that gets steeper at every rise you get to - you are supporting the development of further anti-features if you buy new intel/amd hardware no matter if you manage to make a hack to "free" it or not. x86 is dead freedomwise - bottom line. On 08/28/2018 01:50 PM, Th3Fanbus . wrote: > Taiidan, > >> I doubt those guys have the skill to do so but for those who do - you'd >> spend tens of thousands in order to have a port for an old machine that >> still is stuck with ME and hardware init done entirely by binary blobs. > > It is not about the skill or money involved in the process, it is about the > *possibility* of even running coreboot on said machine, which is most > likely zer>> >> I would save your money and instead buy an ivy/sandybridge thinkpad (can >> nerf the ME - but not disable which is impossible) > > AFAIK, you can still run me_cleaner on a Broadwell laptop. I don't think the > ME is the main reason to get a XX20/XX30 Thinkpad over newer models. Ivy/sandy = can nerf to BUP post ivy/sandy = kernel still runs I would argue there is a big difference there > Mike, > >> microcode - is optional > > I assume you refer to microcode *updates*, not the microcode that is > hard-coded inside the CPU. Still, I fail to understand why there is so much > worry about microcode updates, as if they were going to open a backdoor > of some sorts. To me, the only gain of not updating the microcode is in the > number of bugs. Mike as I said before too with piledriver cpus you need microcode updates or you are very easily rooted via the NMI>root exploit. > I do understand temporarily delaying the updates of known unstable > microcode versions while awaiting for a fix, though. > >> as far as I know its impossible to completely replace ME, only to trim >> its' firmware as much as possible and hope for the best that it >> doesn't have some undocumented "backdoor restore" mechanism that could >> restore the original uncut blob under some conditions. Undoubtedly, >> Intel ME is a backdoor, e.g. because it contains some antitheft >> features which could be used to control your computer remotely: shut >> it down, wipe or retrieve data from it, etc > > This makes me feel I should recall what Nico told you earlier: > "please don't spread FUD on this list." It isn't exactly "FUD" to believe that there are undocumented ME functions - lots of hardware has undocumented functions or problems that were later patched out such as the many cisco router rooting functions "accidently" left in again and again or the recent VIA C3 issue. I agree that ME isn't really a "backdoor" since being a remote access is its primary use but in this case a backdoor would be an undocumented function that persists after one has set remote access to off or used me cleaner. I can't understand why some people here think it a conspiracy theory of the fringe that there just might be an undocumented backdoor in every computer something I imagine many organizations around the globe are currently working on if they don't already have one. After all ME/PSP was something that no one really asked for, IBM has a supervisor processor with equivilant power (hehe power) however it is open source and owner controlled no reason they couldn't have done that here and have the hollywood DRM junk as an addon module so in a way satisfying everyone.

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Re: [coreboot] T450S + Coreboot
by Youness Alaoui 30 Aug '18

30 Aug '18

On Thu, Aug 30, 2018 at 9:51 AM Mike Banon <mikebdp2(a)gmail.com> wrote: > > Hi Youness, > > > The fact that it's closed source and not user-controlled (Even if you had > > the sources, you can't modify them and update it to your custom ME > > version) is where the problem actually is. There *might* be a backdoor > > hidden somewhere in there, or maybe there isn't, nobody knows. > > I agree with your statement above. But, please look on this question > from the end user's perspective, who might be not a software > developer. Imagine that you have a choice between two > similar-by-performance coreboot-supported laptops: according to > cpubenchmark's passmark, Lenovo G505S's AMD A10-5750M = 3342 points > (from 886 samples) while Librem 15's Intel i7-6500U = 4429 points > (from 3345 samples), so the CPU performance difference is just 1/3 ( > and at the fresh test results there might be little to none, since the > Intel-only Meltdown vulnerability requires a patch which eats up to > 30% performance depending on the workload, and there are also some > other Intel-specific "performance-eating" vulnerabilities, the most > serious of which - TLBleed / T1TF - may soon require the disabling of > HyperThreading at all the Intel CPUs, see [1] and [2] ) > I might be saying wrong things here but aren't ALL cpus affected by meltdown? so the 30% performance drop would affect the G505S as well? Also, when I buy a laptop, I don't look at a benchmark and chose the one with the higher 'points', there are many many other variables to consider (the design, the other features, the linux compatibility, the reputation of the company, the build quality, the keyboard/mouse feel, the price, etc..) and yes, the G505s might come from a reputable company who builds quality laptops with a good keyboard and it might be cheap, but maybe I'll find it too old/obsolete, or maybe I'll want to support a smaller company that is trying its hardest to improve linux/freedom support, or maybe I won't care. My point is, that's not how people chose their next laptop, there are countless variables and if you decide the G505s is the better solution for your needs, then great, buy/use that, if it's another model or brand, then chose that. Freedom also comes from being free to chose what we want, there isn't one single solution that will fit everybody. Regardless, I have no idea why, when I say that you spread FUD about the ME with no backing, and state rumors as facts, your answer is "but the G505s is better than the Librem".. I actually don't even see what the Librem has to do with any of this.... > The essential power user features like 16GB RAM support and Xen-level > hardware virtualization technologies ( IOMMU / AMD-V RVI / NPT/SLAT ) > - are also well supported by G505S. But, one laptop has a creepy > management engine (could be creepy enough to a user who didn't study > the tons of Intel documentation) where there *might* be a backdoor, is > not user-controlled (currently) and has a closed-source firmware > (currently). While another laptop does not contain any hardware > management engine at all, neither ME nor PSP. Which laptop you would > have chosen - as a user, not as an employee of Purism - company which > for some unknown-to-me-reasons is hard-tied to Intel CPUs? Even if we > wouldn't be considering the significant price difference between G505S > and Librem 15 - which more than compensates the possible performance > advantage (if it would still exist after patching those Intel-specific > vulnerabilities) as well as lack of some nice features like > kill-switches (unless a user would DIY them), at least to me the > choice is obvious: The laptop I use is a T440s, that's the one I bought when I became a contractor some 5 years ago and that's the one I still use today. Its CPU is probably outdated, It only has 8GB of RAM, it probably has an ME in it (I never even checked if AMT is enabled or not, I never bother to neutralize the ME, etc..). I have some 10 librems here, but I only use them for testing, not for actual work. Why? because to me, I give more value to the machine that I spent weeks researching and customizing and which I paid a high price for while I was still unemployed, and I'm used to its crappy screen and used to its keyboard, etc.. so it has more value to me than one of the newer librems that are sitting on my desk unused. So no, the choice is not obvious because each person has different views, values, preferences, but you keep giving your own opinion as a fact. So again, my point is : I know very very well what the ME is, but I'm not worried about it because while I don't *know* for sure, I do *trust* that it's not and that it doesn't have a backdoor. So I don't care about it. If you tell me that you found a deliberate backdoor feature in the ME which can only be accessed by some 3rd party, and there is no way to disable it, then it's another story, but that's not the case, all you're saying is that "It's there, for sure, trust me, because my own fear is proof enough" And again, I still have no idea what "this brand/model" vs "this other brand/model" has to do with your tendency to state opinions as fact. > > no management engine = one less potential problem, one less headache > to deal with... > Yeah, sure, I'll agree with that 100%, because you're saying it's a "potential problem". Actually, I'd even say that the ME is a problem, but because it's closed sourced and not user-replaceable, but I don't consider it a problem because it's a CIA backdoor. Otherwise every single proprietary code would be considered as such... > > Your comparison of saying the ME is a backdoor is like saying that a > > webcam is a spying device because it can capture images of you! [...] > > The fact that the webcam schematics isn't open means that it could > > still have a small wifi or GSM chip embedded inside > > Yes, but I could easily put a tape over that webcam, disconnect and > remove a webcam module from the laptop's case (or even make a custom > DIY kill-switch). Same for a microphone - could be easily desoldered > (and maybe soldered back but through a kill-switch). And for the > speakers: according to the recent researches the speakers could act as > a microphone - see [3] - so Librem 15 should have a kill-switch for > the speakers as well. Meanwhile you can't throw away ME the same easy > way. > I don't see your point, I gave you an analogy to show how ridiculous your statement was. Sure, you can tape the webcam and microphone, but it becomes a "taped webcam" not a "disabled spying drone for the US military". You're completely ignoring my point though.. if you agree with what I said or have no valid counter argument, then why insist on replying besides the point? > > you yourself said earlier, when talking about the AtomBIOS > > that "it could be disassembled quite well with AtomDis - > > https://github.com/mikebdp2/AtomDis - reducing any security concerns > > regarding this blob to a minimum.", well, the ME can be disassembled > > with any x86 disassembler, so why can't you also say that "reduces any > > security concerns regarding the ME to a minimum". > > Actually this AtomBIOS blob is not required to run this laptop, only > to initialize its' display. It is possible to turn this laptop into a > miniPC/server and still use its' hardware without this blob, although > it wouldn't be exactly a laptop after that. But if we would consider > this blob as required: here is a quality of disassembly I'm getting > with AtomDis - https://pastebin.com/xKW9FV58 . All the command tables > and data tables are named and in many cases it could be understood > what some particular piece of code is doing even after a quick glance. > Are you sure that your ME blob x86 disassembly is providing a similar > or higher level of transparency? Perhaps it is this level of > transparency which allowed to 95% complete the development of the > opensource AtomBIOS alternative called OpenAtom ( I think the > development efforts have stopped partially because no-one have noticed > any backdoors after completing the 95% and it became much less > interesting to complete the remaining 5% , [4] ) > Again, that's beside the point, the fact that it was disassembled and people read its assembly and figured out what it did has nothing to do with your statement of "you can disassemble it, reducing any security concerns regarding this blob to a minimum" which is, again, ridiculous, as it can be applied to the ME just as well. As for your pastebin, I don't know what you mean by "it could be understood even after a quick glance" cause that's most certainly not true. > > We're about to get full control back of the ME. I've been working for > > the past few weeks on reproducing the PTResearch buffer overflow > > exploit on the ME, and yesterday they released a PoC for Apollolake > > (in case you missed it : https://github.com/ptresearch/IntelTXE-PoC), > > so with the progress I made and with that, I should be able to soon > > port it to skylake (and write docs on how to port to other platforms > > as well) which will at least give us the ability to gain back the > > 'user-controlled' aspect of it as we'd have code execution on it. > > Indeed, the things might change if you will find a way to get full > control back of the ME. If you will discover a way to completely > "unlock" it and run your own code on it, this Intel Quark CPU core (on > which Librem 15 Skylake's ME is based) could be really useful - and > not necessarily for the remote management purposes, perhaps there are > infinite possibilities of what you could do with this core. So it > could be turned into the competitive advantage which will be valid > even from a paranoid point of view. It will be really nice to see it > happen. But it didn't happen yet - and I am worried that Intel's > hostile actions might prevent the completion of your benevolent > research or at least prevent it from going public. Because I remember > how they took down your "FSP Reverse Engineering" articles as well as > the source code associated with it. What will prevent them from doing > it again? And if they can't DMCA your work because the reverse > engineering is legal at many countries including USA, they could just > threaten to stop supplying Librem laptops with their CPUs (like they > probably did) and it's all over now. Even if I do finish this, the ME wouldn't be "open" because there would still be code executing from the ROM all the way to the moment the exploit happens, so it's not a magical solution, but it is better than nothing and it would give us user-control of the CPU. Also, Intel didn't "take down" my article, and it had nothing to do with the DMCA or whatever. It was not a cease&desist letter, it was not an Intel lawyer contacting us, or anything of the sort. It was a software manager who sent a nice and respectful email, asking us to remove the article because the license of the FSP prevents reverse engineering. I believe we are in the right, and there are plenty of responses we could have given, but I think it was better to simply remove it instead of fighting it, no harm done. > > Actually it might be a good idea for Purism to at least consider the > switch to AMD Ryzen CPUs. Yes, unlike the 15h/early16h gen AMD CPUs, > their new Ryzen CPUs contain the PSP, Platform Security Processor - > which is also a management engine. But it is significantly younger > than Intel ME (Skylake's ME is already generation 11), so PSP should > have less sophisticated protections and it should be easier to > "jailbreak" this "young PSP" rather than "modern ME". Early ME > implementations were also weak, after all, and I expect "young PSP" to > be weak also. Also, those AMD CPUs do not suffer from the > recently-discovered Intel-specific vulnerabilities and their > performance-degrading patches will not be required. Finally, AMD had a > good collaboration history with coreboot (although this collaboration > is not active currently, it might be renewed if there will be enough > mutual interest) - and I believe AMD at least will not be as hostile > towards your opensource/reverse-engineering efforts as Intel is > currently. If any of these statements seems reasonable to you, please > think of trying to make your Purism company to at least consider this > AMD switch. > That's a very weak argument. The PSP isn't "less sophisticated" than the ME because it's younger.. that's just not how software works. Maybe the PSP is smaller/simpler, and therefore less likely to have bugs that can be exploited, maybe the QA team at AMD is better than the one at Intel, or that they have additional tests/steps in their validation. As for "I believe AMD at least will not be as hostile".. why do you believe that? what makes you believe that? why would you suggest AMD, a corporation, would be less likely to try and defend what it considers to be its rights? That being said, future hardware is not exclusively Intel, all avenues are explored. If AMD is indeed better, then AMD might be chosen, but that decision won't be based on "the PSP will be easier to crack because it's younger" nor will it be based on "for some unknown reason, AMD will be fine with us reverse engineering it". Besides, my understanding is that coreboot does not support ryzen CPUs, so a huge amount of work would be required if we went that way, no ? > Best regards, > Mike > > "disable Intel hyperthreading" : > [1] - https://news.ycombinator.com/item?id=17829790 > [2] - https://marc.info/?l=openbsd-tech&m=153504937925732&w=2 > speaker as a microphone: > [3] - https://security.stackexchange.com/questions/154343/can-a-speaker-be-used-a… > [4] - https://mail.coreboot.org/pipermail/coreboot/2018-January/085979.html > On Thu, Aug 30, 2018 at 12:41 AM Youness Alaoui > <kakaroto(a)kakaroto.homelinux.net> wrote: > > > > Wow, Mike, seriously, I am going to side 100% with Nico, you are > > spreading FUD, making your own personal opinions (which are themselves > > derived from other people's FUD) and stating them as the universal > > law. > > The ME is not known to be a backdoor. It doesn't mean that it's not a > > backdoor, it simply means that it's not known to be a backdoor. The > > fact that it's closed source and not user-controlled (Even if you had > > the sources, you can't modify them and update it to your custom ME > > version) is where the problem actually is. There *might* be a backdoor > > hidden somewhere in there, or maybe there isn't, nobody knows, but > > there has been a lot of research done on the ME and so far, none have > > been found as far as I know. > > > > Your worry about what the ME does, how it can give someone control > > over the PC, etc.. are NOT what qualifies it as a "backdoor", but like > > Nico said, it's a frontdoor, it's not a "hidden access", it's a > > "promoted access" to the PC, it's the main ME functionality which is > > well documented. You don't have to use some "only known to some secret > > person" trick to access the ME, you just need to point your web > > browser to the right port on localhost. > > Your comparison of saying the ME is a backdoor is like saying that a > > webcam is a spying device because it can capture images of you! Yeah, > > sure, that's technically true, it can capture images of you, but only > > after you plug it in and open an image capture software, and you still > > have control of those images. The fact that the webcam schematics > > isn't open means that it could still have a small wifi or GSM chip > > embedded inside which makes it send the images to the CIA, but it's > > not a guarantee that it does. So, yes, you can complain that the > > webcam isn't open hardware so you can't technically trust what it > > does, but you can't just come out and say with absolute certainty that > > any and all webcams in the world are spying devices for the CIA, > > that's just ridiculous. > > > > So, back to the ME, we know exactly what it does, it's all extremely > > well documented and explained, the fact that it allows remote control > > of the PC is actually the reason for its existence and it's a very > > very valid reason in the corporate context and the fact that those > > features also 'coincidentally' resemble the features of an actual > > 'trojan horse' virus, doesn't mean that the ME itself is a virus.. > > otherwise the 'rm' linux command would be considered a virus since it > > deletes files and there are some viruses that can delete your files as > > well.... > > Now the problem is that it's closed source, and not user controlled > > (remote control features *are* user controlled, I'm talking about > > being able to replace the firmware with your own), so yes, it can't be > > audited by the larger open source community, but that also doesn't > > guarantee any security necessarily (how many open source programs > > still have security bugs?). > > > > Either way, you yourself said earlier, when talking about the AtomBIOS > > that "it could be disassembled quite well with AtomDis - > > https://github.com/mikebdp2/AtomDis - reducing any security concerns > > regarding this blob to a minimum.", well, the ME can be disassembled > > with any x86 disassembler, so why can't you also say that "reduces any > > security concerns regarding the ME to a minimum". > > > > We're about to get full control back of the ME. I've been working for > > the past few weeks on reproducing the PTResearch buffer overflow > > exploit on the ME, and yesterday they released a PoC for Apollolake > > (in case you missed it : https://github.com/ptresearch/IntelTXE-PoC), > > so with the progress I made and with that, I should be able to soon > > port it to skylake (and write docs on how to port to other platforms > > as well) which will at least give us the ability to gain back the > > 'user-controlled' aspect of it as we'd have code execution on it. > > Which by the way, also means that BootGuard can be disabled (since the > > ME is the one checking for the boot guard signatures), which should > > enable the ability to port coreboot to a lot more machines (including > > the T450S that this thread is supposed to be about). Hopefully.... > > > > On Wed, Aug 29, 2018 at 5:50 AM Mike Banon <mikebdp2(a)gmail.com> wrote: > > > > > > > What suspicious activities? I know, for many people the Intel ME firmware > > > > contains unwanted features. But these features are documented. > > > > In your world, a device becomes backdoored because somebody > > > > didn't read the manual?!? > > > > > > Somewhere I've seen a report about Intel ME suspicious network > > > activities (if I remember correctly they were using Wireshark on a PC > > > placed between a computer with ME and the outside network) which has > > > affected my personal opinion. Although it could be argued that its > > > just some OEM has set up their ME in such a way, maybe even in a > > > documented way (although a way undesirable to the end user), still it > > > didn't look good to me. In addition, regarding all those Intel ME > > > vulnerabilities recently discovered: one could assume that at least > > > some of these "vulnerabilities" @ were actually the backdoors which > > > have been patched just because they have been discovered by someone > > > else than the american intelligence agencies who always knew them @ . > > > Now Intel has patched these "vulnerabilities", but we do not know if > > > some other "vulnerabilities" have been left unnoticed by the outsiders > > > or if some new "vulnerabilities" have been added. And we the open > > > source enthusiasts can't even verify that personally, because the > > > source code of Intel ME firmware is closed. I cannot understand, how > > > such a high level professional open source developer as you, Nico, > > > finds it okay to just trust Intel ME despite its' deeply proprietary > > > nature. Management engine with a closed source proprietary firmware - > > > it even sounds awful..... I totally agree with Richard Stallman when > > > he calls Intel ME a backdoor - https://stallman.org/intel.html > > > > > > > Please read [1] and [2] very carefully, I hope even you will spot > > > > technical differences. [...] You cannot just take somebody's words > > > > and give them a different meaning just because somebody else used > > > > them in a different context. [...] You did it again, btw., stating something > > > > (definition of frontdoor) and making it look like the generally accepted definition. > > > > > > Before receiving your message I knew only one definition of a > > > "frontdoor" computing term which I described in my previous message. > > > Although I don't know which definition is more popular, sorry for > > > misunderstanding you. > > > > > > Mike > > > > > > > > > On Wed, Aug 29, 2018 at 12:24 AM Nico Huber <nico.h(a)gmx.de> wrote: > > > > > > > > *sigh*, > > > > > > > > On 28.08.2018 22:00, Mike Banon wrote: > > > > > You are right, my choice of words has been far from ideal. I apologize > > > > > for that. However, to be confident that Intel ME is a backdoor > > > > > (personal opinion) - one does not have to be its' creator. > > > > > > > > sorry I meant the creator of us (God) not the ME. I doubt the creator > > > > of the ME knows everybody's opinion either. Which is what I was talking > > > > about. A good practice is to quote and answer below that quote, this way > > > > you can easily check if what you write makes sense in the given context. > > > > > > > > > I think > > > > > there are enough documents describing its' functionality and enough > > > > > evidence gathered by the independent security researchers about the > > > > > suspicious activities of this hardware module. If it looks like a > > > > > duck, swims like a duck, and quacks like a duck, then it probably is a > > > > > duck? > > > > > > > > WTF again? what suspicious activities? I know, for many people the ME > > > > firmware contains unwanted features. But these features are documented. > > > > In your world, a device becomes backdoored because somebody didn't read > > > > the manual?!? > > > > > > > > > There are no technical differences between the 'backdoor', and > > > > > 'frontdoor'. > > > > > > > > Please read [1] and [2] very carefully, I hope even you will spot tech- > > > > nical differences. > > > > > > > > > Like a 'conspiracy theorist', 'frontdoor' is a term > > > > > coming from the american 3-letter-agencies. 'Frontdoor' is their term > > > > > for a 'backdoor' to which only they (currently) have an access. This > > > > > article summarizes it well: > > > > > https://www.justsecurity.org/16503/security-front-doors-vs-back-doors-disti… > > > > > . 'Backdoor' term has a negative reputation, so they would like to > > > > > push this 'frontdoor' term forward. > > > > > > > > This is very infantile. You cannot just take somebody's words and give > > > > them a different meaning just because somebody else used them in a dif- > > > > ferent context. When I say frontdoor, I mean a door at a front where > > > > everyone can see it. A backdoor implies something hidden, the ME fea- > > > > tures were never hidden (AFAIK, a stupid OEM may prove me wrong, but I > > > > don't know any instance). > > > > > > > > You did it again, btw., stating something (definition of frontdoor) and > > > > making it look like the generally accepted definition. > > > > > > > > Nico > > > > > > > > [1] https://en.wiktionary.org/wiki/back_door > > > > [2] https://en.wiktionary.org/wiki/front_door

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Re: [coreboot] T450S + Coreboot
by Taiidan＠gmx.com 30 Aug '18

30 Aug '18

I agree that the G505S is a superior choice vs the ivy/sandy thinkpads as it has no ME/PSP thus making it the newest and last owner controlled x86 laptop but everyone be aware that it NEEDS a microcode update or you are very easily rooted due to the piledriver+ NMI CPU exploit additionally without the microcode the IOMMU won't work (and thus no qubes) Most CPU's require microcode updates as there are critical errors in manufacturing microcode.

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Re: [coreboot] T450S + Coreboot
by Youness Alaoui 30 Aug '18

30 Aug '18

On Thu, Aug 30, 2018 at 2:15 AM Brian Herman <bherman.aconspart(a)gmail.com> wrote: > > Sorry, I'm going to read the documentation more and make this a personal goal by the end of 2019. I didn't want to stir up so much drama. Time and money are not constraints on this particular problem. One way or another by January 22, 2019 I will have either figured it out or I will pay to figure it out. I have used Linux since college. I have no kids. I have no girlfriend. I have tons of free time. > Sorry to see your thread going off-topic. I don't know if it will help you but I've wirtten detailed blog posts on my experience in getting coreboot to work on the broadwell and skylake librems. It's not a "guide how to port to coreboot" but it explains some of the problems I've had and it might help you save some time. You can go to https://puri.sm/coreboot/timeline/ and search for "Youness" to see my blog posts in chronological order on the right side bar. Good luck with your project! > Make It So, > Brian Herman > > > > > > > > > > > > So you have made it to the end...... > Thanks for reading! > > On Wed, Aug 29, 2018 at 4:42 PM Youness Alaoui <kakaroto(a)kakaroto.homelinux.net> wrote: >> >> Wow, Mike, seriously, I am going to side 100% with Nico, you are >> spreading FUD, making your own personal opinions (which are themselves >> derived from other people's FUD) and stating them as the universal >> law. >> The ME is not known to be a backdoor. It doesn't mean that it's not a >> backdoor, it simply means that it's not known to be a backdoor. The >> fact that it's closed source and not user-controlled (Even if you had >> the sources, you can't modify them and update it to your custom ME >> version) is where the problem actually is. There *might* be a backdoor >> hidden somewhere in there, or maybe there isn't, nobody knows, but >> there has been a lot of research done on the ME and so far, none have >> been found as far as I know. >> >> Your worry about what the ME does, how it can give someone control >> over the PC, etc.. are NOT what qualifies it as a "backdoor", but like >> Nico said, it's a frontdoor, it's not a "hidden access", it's a >> "promoted access" to the PC, it's the main ME functionality which is >> well documented. You don't have to use some "only known to some secret >> person" trick to access the ME, you just need to point your web >> browser to the right port on localhost. >> Your comparison of saying the ME is a backdoor is like saying that a >> webcam is a spying device because it can capture images of you! Yeah, >> sure, that's technically true, it can capture images of you, but only >> after you plug it in and open an image capture software, and you still >> have control of those images. The fact that the webcam schematics >> isn't open means that it could still have a small wifi or GSM chip >> embedded inside which makes it send the images to the CIA, but it's >> not a guarantee that it does. So, yes, you can complain that the >> webcam isn't open hardware so you can't technically trust what it >> does, but you can't just come out and say with absolute certainty that >> any and all webcams in the world are spying devices for the CIA, >> that's just ridiculous. >> >> So, back to the ME, we know exactly what it does, it's all extremely >> well documented and explained, the fact that it allows remote control >> of the PC is actually the reason for its existence and it's a very >> very valid reason in the corporate context and the fact that those >> features also 'coincidentally' resemble the features of an actual >> 'trojan horse' virus, doesn't mean that the ME itself is a virus.. >> otherwise the 'rm' linux command would be considered a virus since it >> deletes files and there are some viruses that can delete your files as >> well.... >> Now the problem is that it's closed source, and not user controlled >> (remote control features *are* user controlled, I'm talking about >> being able to replace the firmware with your own), so yes, it can't be >> audited by the larger open source community, but that also doesn't >> guarantee any security necessarily (how many open source programs >> still have security bugs?). >> >> Either way, you yourself said earlier, when talking about the AtomBIOS >> that "it could be disassembled quite well with AtomDis - >> https://github.com/mikebdp2/AtomDis - reducing any security concerns >> regarding this blob to a minimum.", well, the ME can be disassembled >> with any x86 disassembler, so why can't you also say that "reduces any >> security concerns regarding the ME to a minimum". >> >> We're about to get full control back of the ME. I've been working for >> the past few weeks on reproducing the PTResearch buffer overflow >> exploit on the ME, and yesterday they released a PoC for Apollolake >> (in case you missed it : https://github.com/ptresearch/IntelTXE-PoC), >> so with the progress I made and with that, I should be able to soon >> port it to skylake (and write docs on how to port to other platforms >> as well) which will at least give us the ability to gain back the >> 'user-controlled' aspect of it as we'd have code execution on it. >> Which by the way, also means that BootGuard can be disabled (since the >> ME is the one checking for the boot guard signatures), which should >> enable the ability to port coreboot to a lot more machines (including >> the T450S that this thread is supposed to be about). Hopefully.... >> >> On Wed, Aug 29, 2018 at 5:50 AM Mike Banon <mikebdp2(a)gmail.com> wrote: >> > >> > > What suspicious activities? I know, for many people the Intel ME firmware >> > > contains unwanted features. But these features are documented. >> > > In your world, a device becomes backdoored because somebody >> > > didn't read the manual?!? >> > >> > Somewhere I've seen a report about Intel ME suspicious network >> > activities (if I remember correctly they were using Wireshark on a PC >> > placed between a computer with ME and the outside network) which has >> > affected my personal opinion. Although it could be argued that its >> > just some OEM has set up their ME in such a way, maybe even in a >> > documented way (although a way undesirable to the end user), still it >> > didn't look good to me. In addition, regarding all those Intel ME >> > vulnerabilities recently discovered: one could assume that at least >> > some of these "vulnerabilities" @ were actually the backdoors which >> > have been patched just because they have been discovered by someone >> > else than the american intelligence agencies who always knew them @ . >> > Now Intel has patched these "vulnerabilities", but we do not know if >> > some other "vulnerabilities" have been left unnoticed by the outsiders >> > or if some new "vulnerabilities" have been added. And we the open >> > source enthusiasts can't even verify that personally, because the >> > source code of Intel ME firmware is closed. I cannot understand, how >> > such a high level professional open source developer as you, Nico, >> > finds it okay to just trust Intel ME despite its' deeply proprietary >> > nature. Management engine with a closed source proprietary firmware - >> > it even sounds awful..... I totally agree with Richard Stallman when >> > he calls Intel ME a backdoor - https://stallman.org/intel.html >> > >> > > Please read [1] and [2] very carefully, I hope even you will spot >> > > technical differences. [...] You cannot just take somebody's words >> > > and give them a different meaning just because somebody else used >> > > them in a different context. [...] You did it again, btw., stating something >> > > (definition of frontdoor) and making it look like the generally accepted definition. >> > >> > Before receiving your message I knew only one definition of a >> > "frontdoor" computing term which I described in my previous message. >> > Although I don't know which definition is more popular, sorry for >> > misunderstanding you. >> > >> > Mike >> > >> > >> > On Wed, Aug 29, 2018 at 12:24 AM Nico Huber <nico.h(a)gmx.de> wrote: >> > > >> > > *sigh*, >> > > >> > > On 28.08.2018 22:00, Mike Banon wrote: >> > > > You are right, my choice of words has been far from ideal. I apologize >> > > > for that. However, to be confident that Intel ME is a backdoor >> > > > (personal opinion) - one does not have to be its' creator. >> > > >> > > sorry I meant the creator of us (God) not the ME. I doubt the creator >> > > of the ME knows everybody's opinion either. Which is what I was talking >> > > about. A good practice is to quote and answer below that quote, this way >> > > you can easily check if what you write makes sense in the given context. >> > > >> > > > I think >> > > > there are enough documents describing its' functionality and enough >> > > > evidence gathered by the independent security researchers about the >> > > > suspicious activities of this hardware module. If it looks like a >> > > > duck, swims like a duck, and quacks like a duck, then it probably is a >> > > > duck? >> > > >> > > WTF again? what suspicious activities? I know, for many people the ME >> > > firmware contains unwanted features. But these features are documented. >> > > In your world, a device becomes backdoored because somebody didn't read >> > > the manual?!? >> > > >> > > > There are no technical differences between the 'backdoor', and >> > > > 'frontdoor'. >> > > >> > > Please read [1] and [2] very carefully, I hope even you will spot tech- >> > > nical differences. >> > > >> > > > Like a 'conspiracy theorist', 'frontdoor' is a term >> > > > coming from the american 3-letter-agencies. 'Frontdoor' is their term >> > > > for a 'backdoor' to which only they (currently) have an access. This >> > > > article summarizes it well: >> > > > https://www.justsecurity.org/16503/security-front-doors-vs-back-doors-disti… >> > > > . 'Backdoor' term has a negative reputation, so they would like to >> > > > push this 'frontdoor' term forward. >> > > >> > > This is very infantile. You cannot just take somebody's words and give >> > > them a different meaning just because somebody else used them in a dif- >> > > ferent context. When I say frontdoor, I mean a door at a front where >> > > everyone can see it. A backdoor implies something hidden, the ME fea- >> > > tures were never hidden (AFAIK, a stupid OEM may prove me wrong, but I >> > > don't know any instance). >> > > >> > > You did it again, btw., stating something (definition of frontdoor) and >> > > making it look like the generally accepted definition. >> > > >> > > Nico >> > > >> > > [1] https://en.wiktionary.org/wiki/back_door >> > > [2] https://en.wiktionary.org/wiki/front_door >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot

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Re: [coreboot] REG : GOP Driver
by Matt DeVillier 30 Aug '18

30 Aug '18

On Thu, Aug 30, 2018 at 11:41 AM nagaraj a <nagarajnn(a)gmail.com> wrote: > Hi DeVillier, > > Thanks a lot for the kind response. > > << > Windows is fine as long as valid VBT data has been loaded into the Intel > ACPI OpRegion, and the OpRegion is valid/has been fully populated. > >> > > For the above note this holds good for already installed OS. > > In case if we are trying to install windows OS for the first time and GOP > driver is not loaded for the Intel iGPU in that case I understand there > will be blank out. > I'd have to test to be sure, but that sounds correct. I know the Windows installer uses a basic driver of some sort, and likely assumes a working framebuffer exists > > Correct me if I'm wrong. > > //BR > Nagaraj A > > > On Thu, 30 Aug 2018, 8:57 pm Matt DeVillier, <matt.devillier(a)gmail.com> > wrote: > >> with Intel iGPUs and using Tianocore UEFI payload, Linux is fine >> regardless if the display is initialized or not by GOP driver. Windows is >> fine as long as valid VBT data has been loaded into the Intel ACPI >> OpRegion, and the OpRegion is valid/has been fully populated. >> >> On Thu, Aug 30, 2018 at 7:57 AM nagaraj a <nagarajnn(a)gmail.com> wrote: >> >>> All, >>> >>> I have query regarding GOP driver in UEFI. Here is query details. >>> >>> If BIOS don't load UEFI GOP driver for GPU and system boots into OS. >>> Will latest windows /linux OS will be up with display or the display >>> will be blank out. >>> >>> //BR >>> Nagaraj A >>> >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> https://mail.coreboot.org/mailman/listinfo/coreboot >> >>

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coreboot August 2018