coreboot March 2018

coreboot@coreboot.org

62 participants
103 discussions

Coreboot on Intel Sklylake
by roman perepelitsin 21 Mar '18

21 Mar '18

Hi! I'm trying to run Coreboot on intel Core i5-6600 CPU with DDR4 Got some problem with FSP 2.0 at notify phase - system go down to reboot w/o any messages (I think - from FSP binary). Can somebody give me advice for solving this problem? Coreboot logs and config included. -- regards, Perepelitsin Roman

1 0

Re: [coreboot] Real name policy
by David Hendricks 20 Mar '18

20 Mar '18

On Sat, Mar 17, 2018 at 10:46 PM, Alex G. <mr.nuke.me(a)gmail.com> wrote: > On 03/14/2018 11:39 PM, David Hendricks wrote: > >> >> >> On Mon, Mar 12, 2018 at 12:26 PM, Taiidan(a)gmx.com <mailto:Taiidan@gmx.com> >> <Taiidan(a)gmx.com <mailto:Taiidan@gmx.com>> wrote: >> >> On 03/11/2018 09:42 PM, Tom Li via coreboot wrote: >> >> 2. Even if all developers are registered with their IDs >> >> And you actually have to meet them in person for this due to >> photoshop existing. >> >> I have always thought it hilarious when a company asks for a scan of >> a passport or identification card. >> >> >> There still seems to be some confusion. As Alberto alluded to this isn't >> about verifying your identity. What matters is protecting coreboot along >> with its adopters and contributors (including companies who sell >> coreboot-based products) from legal threats. That is far more valuable than >> any bug fixes you might have to offer. >> > > Oh come on. Pseudonyms are perfectly acceptable ways of identifying > oneself for copyright reasons. See what the copyright office has to say: > This isn't really relevant and just muddies the waters in this discussion. Licensing and copyright are separate things, the DCO ( https://developercertificate.org/) addresses the former. > Unless I'm reading this policy wrong and "legal name" allows pseudonyms. ...in copyright, but even then you need to register the fictitious name (e.g. a business name) to be sure the pseudonym is used appropriately. Otherwise how would a court know that a troll who claims ownership of a work isn't the real copyright holder? For licensing the person who contributes a patch to an open source project must have legal authority to do so in the first place and the DCO is an affirmation of their "due diligence" (some legal term) to do so. Pretty much the whole SCO thing was about IBM's license to distribute derivative works of Unix under the GPL - Check out T.mike's slides (12-14 are particularly relevant) for a nice summary. Long story short is that in order to protect coreboot there needs to be some credible way for courts to trace origins of code should a dispute over copyright or licensing ever come up.

1 0

Re: [coreboot] Out of MTRRs
by Jay Talbott 19 Mar '18

19 Mar '18

See below… - Jay Jay Talbott Principal Consulting Engineer SysPro Consulting, LLC 3057 E. Muirfield St. Gilbert, AZ 85298 (480) 704-8045 (480) 445-9895 (FAX) JayTalbott(a)sysproconsulting.com http://www.sysproconsulting.com [Mon Mar 19 09:41:50.354 2018] [Mon Mar 19 09:41:50.354 2018] [Mon Mar 19 09:41:50.354 2018] coreboot-4.6-2536-g3441292-dirty Fri Jan 12 00:57:00 UTC 2018 bootblock starting... [Mon Mar 19 09:41:50.354 2018] CPU: Intel(R) Core(TM) i3-6100U CPU @ 2.30GHz [Mon Mar 19 09:41:50.354 2018] CPU: ID 406e3, Skylake D0, ucode: 000000c1 [Mon Mar 19 09:41:50.354 2018] CPU: AES supported, TXT NOT supported, VT supported [Mon Mar 19 09:41:50.354 2018] MCH: device id 1904 (rev 08) is Skylake-U [Mon Mar 19 09:41:50.354 2018] PCH: device id 9d48 (rev 21) is Skylake-U Premium [Mon Mar 19 09:41:50.354 2018] IGD: device id 1916 (rev 07) is Skylake ULT GT2 [Mon Mar 19 09:41:50.354 2018] CBFS: 'Master Header Locator' located CBFS at [e00100:ffffc0) [Mon Mar 19 09:41:50.354 2018] CBFS: Locating 'fallback/romstage' [Mon Mar 19 09:41:50.354 2018] CBFS: Found @ offset 80 size 9e4c [Mon Mar 19 09:41:50.440 2018] [Mon Mar 19 09:41:50.440 2018] [Mon Mar 19 09:41:50.440 2018] coreboot-4.6-2536-g3441292-dirty Fri Jan 12 00:57:00 UTC 2018 romstage starting... [Mon Mar 19 09:41:50.440 2018] pm1_sts: 0100 pm1_en: 0000 pm1_cnt: 00000000 [Mon Mar 19 09:41:50.440 2018] gpe0_sts[0]: 00000000 gpe0_en[0]: 00000000 [Mon Mar 19 09:41:50.440 2018] gpe0_sts[1]: 00000000 gpe0_en[1]: 00000000 [Mon Mar 19 09:41:50.440 2018] gpe0_sts[2]: 00000000 gpe0_en[2]: 00000000 [Mon Mar 19 09:41:50.440 2018] gpe0_sts[3]: 00000000 gpe0_en[3]: 00000000 [Mon Mar 19 09:41:50.440 2018] TCO_STS: 0000 0000 [Mon Mar 19 09:41:50.440 2018] GEN_PMCON: a0240200 00004206 [Mon Mar 19 09:41:50.440 2018] GBLRST_CAUSE: 00000000 00000000 [Mon Mar 19 09:41:50.440 2018] prev_sleep_state 5 [Mon Mar 19 09:41:50.440 2018] CBFS: 'Master Header Locator' located CBFS at [e00100:ffffc0) [Mon Mar 19 09:41:50.440 2018] CBFS: Locating 'fspm.bin' [Mon Mar 19 09:41:50.440 2018] CBFS: Found @ offset 65ec0 size 5f000 [Mon Mar 19 09:41:50.440 2018] FMAP: Found "FLASH" version 1.1 at e00000. [Mon Mar 19 09:41:50.440 2018] FMAP: base = ff000000 size = 1000000 #areas = 3 [Mon Mar 19 09:41:50.440 2018] MRC: no data in 'RW_MRC_CACHE' [Mon Mar 19 09:41:50.440 2018] bootmode is set to :0 [Mon Mar 19 09:41:50.646 2018] No memory dimm at address 00 [Mon Mar 19 09:41:50.926 2018] No memory dimm at address 00 [Mon Mar 19 09:41:50.926 2018] SPD @ 0x50 [Mon Mar 19 09:41:50.926 2018] SPD: module type is DDR4 [Mon Mar 19 09:41:50.926 2018] SPD: module part is F4-2133C15-8GRS [Mon Mar 19 09:41:50.926 2018] SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb [Mon Mar 19 09:41:50.926 2018] SPD: device width 8 bits, bus width 64 bits [Mon Mar 19 09:41:50.926 2018] SPD: module size is 8192 MB (per channel) [Mon Mar 19 09:41:50.926 2018] SPD @ 0x52 [Mon Mar 19 09:41:50.926 2018] SPD: module type is DDR4 [Mon Mar 19 09:41:50.926 2018] SPD: module part is F4-2133C15-8GRS [Mon Mar 19 09:41:50.926 2018] SPD: banks 8, ranks 1, rows 16, columns 10, density 8192 Mb [Mon Mar 19 09:41:50.926 2018] SPD: device width 8 bits, bus width 64 bits [Mon Mar 19 09:41:50.926 2018] SPD: module size is 8192 MB (per channel) [Mon Mar 19 09:41:50.926 2018] Calling FspMemoryInit: 0xffe661c8 [Mon Mar 19 09:41:50.926 2018] 0xfef03858: raminit_upd [Mon Mar 19 09:41:50.926 2018] 0xfef04e14: &hob_list_ptr [Mon Mar 19 09:41:59.674 2018] FspMemoryInit returned 0x00000000 [Mon Mar 19 09:41:59.840 2018] CBMEM: [Mon Mar 19 09:41:59.840 2018] IMD: root @ 7affe000 254 entries. [Mon Mar 19 09:41:59.840 2018] IMD: root @ 7affdc00 62 entries. [Mon Mar 19 09:41:59.840 2018] External stage cache: [Mon Mar 19 09:41:59.840 2018] IMD: root @ 7b3ff000 254 entries. [Mon Mar 19 09:41:59.840 2018] IMD: root @ 7b3fec00 62 entries. [Mon Mar 19 09:41:59.840 2018] 0 DIMMs found [Mon Mar 19 09:41:59.840 2018] top_of_ram = 0x7afff000 [Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=79fff000 End=7a000000 (Size 1000) [Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=7a000000 End=7a800000 (Size 800000) [Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=7a800000 End=7ac00000 (Size 400000) [Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=7ac00000 End=7ae00000 (Size 200000) [Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=7ae00000 End=7af00000 (Size 100000) [Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=7af00000 End=7af80000 (Size 80000) [Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=7af80000 End=7afc0000 (Size 40000) [Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=7afc0000 End=7afe0000 (Size 20000) [Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=7afe0000 End=7aff0000 (Size 10000) [Mon Mar 19 09:41:59.840 2018] MTRR Range: Start=7aff0000 End=7aff8000 (Size 8000) [Mon Mar 19 09:41:59.840 2018] No more variable MTRRs: 10 [Mon Mar 19 09:41:59.840 2018] No more variable MTRRs: 10 [Mon Mar 19 09:41:59.840 2018] No more variable MTRRs: 10 [Mon Mar 19 09:41:59.840 2018] CBFS: 'Master Header Locator' located CBFS at [e00100:ffffc0) [Mon Mar 19 09:41:59.840 2018] CBFS: Locating 'fallback/postcar' [Mon Mar 19 09:41:59.840 2018] CBFS: Found @ offset 1050c0 size 3e10 [Mon Mar 19 09:41:59.840 2018] Decompressing stage fallback/postcar @ 0x7abd0fc0 (32528 bytes) [Mon Mar 19 09:41:59.843 2018] Loading module at 7abd1000 with entry 7abd1000. filesize: 0x3c10 memsize: 0x7ed0 [Mon Mar 19 09:41:59.843 2018] Processing 105 relocs. Offset value of 0x78bd1000 [Mon Mar 19 09:41:59.843 2018] [Mon Mar 19 09:41:59.843 2018] [Mon Mar 19 09:41:59.843 2018] coreboot-4.6-2536-g3441292-dirty Fri Jan 12 00:57:00 UTC 2018 postcar starting... [Mon Mar 19 09:41:59.843 2018] CBFS: 'Master Header Locator' located CBFS at [e00100:ffffc0) [Mon Mar 19 09:41:59.843 2018] CBFS: Locating 'fallback/ramstage' [Mon Mar 19 09:41:59.843 2018] CBFS: Found @ offset 52400 size 12d19 [Mon Mar 19 09:41:59.843 2018] Decompressing stage fallback/ramstage @ 0x7ab1afc0 (739440 bytes) [Mon Mar 19 09:41:59.867 2018] Loading module at 7ab1b000 with entry 7ab1b000. filesize: 0x26b00 memsize: 0xb4830 [Mon Mar 19 09:41:59.956 2018] Processing 2534 relocs. Offset value of 0x7aa1b000 [Mon Mar 19 09:41:59.956 2018] [Mon Mar 19 09:41:59.956 2018] [Mon Mar 19 09:41:59.956 2018] coreboot-4.6-2536-g3441292-dirty Fri Jan 12 00:57:00 UTC 2018 ramstage starting... [Mon Mar 19 09:41:59.956 2018] Normal boot. [Mon Mar 19 09:41:59.956 2018] BS: BS_PRE_DEVICE times (us): entry 0 run 2 exit 0 [Mon Mar 19 09:41:59.956 2018] CBFS: 'Master Header Locator' located CBFS at [e00100:ffffc0) [Mon Mar 19 09:41:59.956 2018] CBFS: Locating 'cpu_microcode_blob.bin' [Mon Mar 19 09:41:59.956 2018] CBFS: Found @ offset 9f40 size 48440 [Mon Mar 19 09:41:59.956 2018] microcode: sig=0x406e3 pf=0x80 revision=0xc1 [Mon Mar 19 09:41:59.956 2018] Skip microcode update [Mon Mar 19 09:41:59.956 2018] CBFS: 'Master Header Locator' located CBFS at [e00100:ffffc0) [Mon Mar 19 09:41:59.956 2018] CBFS: Locating 'fsps.bin' [Mon Mar 19 09:41:59.956 2018] CBFS: Found @ offset c5ec0 size 2e000 [Mon Mar 19 09:42:00.016 2018] Detected 2 core, 4 thread CPU. [Mon Mar 19 09:42:00.063 2018] Setting up SMI for CPU [Mon Mar 19 09:42:00.063 2018] IED base = 0x7b400000 [Mon Mar 19 09:42:00.063 2018] IED size = 0x00400000 [Mon Mar 19 09:42:00.063 2018] Will perform SMM setup. [Mon Mar 19 09:42:00.063 2018] CPU: Intel(R) Core(TM) i3-6100U CPU @ 2.30GHz. [Mon Mar 19 09:42:00.063 2018] Loading module at 00030000 with entry 00030000. filesize: 0x170 memsize: 0x170 [Mon Mar 19 09:42:00.063 2018] Processing 16 relocs. Offset value of 0x00030000 [Mon Mar 19 09:42:00.063 2018] Attempting to start 3 APs [Mon Mar 19 09:42:00.063 2018] Waiting for 10ms after sending INIT. [Mon Mar 19 09:42:00.063 2018] Waiting for 1st SIPI to complete...done. [Mon Mar 19 09:42:00.341 2018] AP: slot 1 apic_id 2. [Mon Mar 19 09:42:00.341 2018] AP: slot 3 apic_id 3. [Mon Mar 19 09:42:00.341 2018] Waiting for 2nd SIPI to complete...done. [Mon Mar 19 09:42:00.341 2018] AP: slot 2 apic_id 1. [Mon Mar 19 09:42:00.341 2018] Loading module at 00038000 with entry 00038000. filesize: 0x1a8 memsize: 0x1a8 [Mon Mar 19 09:42:00.341 2018] Processing 12 relocs. Offset value of 0x00038000 [Mon Mar 19 09:42:00.341 2018] SMM Module: stub loaded at 00038000. Will call 7ab2e993(00000000) [Mon Mar 19 09:42:00.341 2018] Installing SMM handler to 0x7b000000 [Mon Mar 19 09:42:00.341 2018] Loading module at 7b010000 with entry 7b010092. filesize: 0xd88 memsize: 0x4da0 [Mon Mar 19 09:42:00.341 2018] Processing 97 relocs. Offset value of 0x7b010000 [Mon Mar 19 09:42:00.341 2018] Loading module at 7b008000 with entry 7b008000. filesize: 0x1a8 memsize: 0x1a8 [Mon Mar 19 09:42:00.341 2018] Processing 12 relocs. Offset value of 0x7b008000 [Mon Mar 19 09:42:00.341 2018] SMM Module: placing jmp sequence at 7b007c00 rel16 0x03fd [Mon Mar 19 09:42:00.341 2018] SMM Module: placing jmp sequence at 7b007800 rel16 0x07fd [Mon Mar 19 09:42:00.341 2018] SMM Module: placing jmp sequence at 7b007400 rel16 0x0bfd [Mon Mar 19 09:42:00.341 2018] SMM Module: stub loaded at 7b008000. Will call 7b010092(00000000) [Mon Mar 19 09:42:00.341 2018] Clearing SMI status registers [Mon Mar 19 09:42:00.341 2018] SMI_STS: PM1 [Mon Mar 19 09:42:00.341 2018] PM1_STS: PWRBTN TMROF [Mon Mar 19 09:42:00.341 2018] TCO_STS: BOOT SECOND_TO [Mon Mar 19 09:42:00.341 2018] New SMBASE 0x7b000000 [Mon Mar 19 09:42:00.341 2018] In relocation handler: CPU 0 [Mon Mar 19 09:42:00.349 2018] New SMBASE=0x7b000000 IEDBASE=0x7b400000 [Mon Mar 19 09:42:00.349 2018] Writing SMRR. base = 0x7b000006, mask=0xff800800 [Mon Mar 19 09:42:00.349 2018] Relocation complete. [Mon Mar 19 09:42:00.349 2018] New SMBASE 0x7afff800 [Mon Mar 19 09:42:00.349 2018] In relocation handler: CPU 2 [Mon Mar 19 09:42:00.349 2018] New SMBASE=0x7afff800 IEDBASE=0x7b400000 [Mon Mar 19 09:42:00.349 2018] Writing SMRR. base = 0x7b000006, mask=0xff800800 [Mon Mar 19 09:42:00.349 2018] Relocation complete. [Mon Mar 19 09:42:00.349 2018] New SMBASE 0x7afff400 [Mon Mar 19 09:42:00.349 2018] In relocation handler: CPU 3 [Mon Mar 19 09:42:00.349 2018] New SMBASE=0x7afff400 IEDBASE=0x7b400000 [Mon Mar 19 09:42:00.349 2018] Writing SMRR. base = 0x7b000006, mask=0xff800800 [Mon Mar 19 09:42:00.349 2018] Relocation complete. [Mon Mar 19 09:42:00.349 2018] New SMBASE 0x7afffc00 [Mon Mar 19 09:42:00.349 2018] In relocation handler: CPU 1 [Mon Mar 19 09:42:00.349 2018] New SMBASE=0x7afffc00 IEDBASE=0x7b400000 [Mon Mar 19 09:42:00.349 2018] Writing SMRR. base = 0x7b000006, mask=0xff800800 [Mon Mar 19 09:42:00.349 2018] Relocation complete. [Mon Mar 19 09:42:00.349 2018] Initializing CPU #0 [Mon Mar 19 09:42:00.349 2018] CPU: vendor Intel device 406e3 [Mon Mar 19 09:42:00.349 2018] CPU: family 06, model 4e, stepping 03 [Mon Mar 19 09:42:00.349 2018] Setting up local APIC... apic_id: 0x00 done. [Mon Mar 19 09:42:00.349 2018] Turbo is available but hidden [Mon Mar 19 09:42:00.349 2018] Turbo has been enabled [Mon Mar 19 09:42:00.349 2018] SGX : param.enable = 0 [Mon Mar 19 09:42:00.349 2018] Skip microcode update [Mon Mar 19 09:42:00.349 2018] CPU #0 initialized [Mon Mar 19 09:42:00.349 2018] Initializing CPU #2 [Mon Mar 19 09:42:00.349 2018] Initializing CPU #3 [Mon Mar 19 09:42:00.349 2018] Initializing CPU #1 [Mon Mar 19 09:42:00.349 2018] CPU: vendor Intel device 406e3 [Mon Mar 19 09:42:00.349 2018] CPU: family 06, model 4e, stepping 03 [Mon Mar 19 09:42:00.356 2018] CPU: vendor Intel device 406e3 [Mon Mar 19 09:42:00.356 2018] CPU: family 06, model 4e, stepping 03 [Mon Mar 19 09:42:00.356 2018] Setting up local APIC...CPU: vendor Intel device 406e3 [Mon Mar 19 09:42:00.356 2018] CPU: family 06, model 4e, stepping 03 [Mon Mar 19 09:42:00.356 2018] Setting up local APIC...Setting up local APIC... apic_id: 0x02 done. [Mon Mar 19 09:42:00.356 2018] apic_id: 0x03 done. [Mon Mar 19 09:42:00.356 2018] Skip microcode update [Mon Mar 19 09:42:00.356 2018] CPU #1 initialized [Mon Mar 19 09:42:00.356 2018] Skip microcode update [Mon Mar 19 09:42:00.356 2018] CPU #3 initialized [Mon Mar 19 09:42:00.356 2018] apic_id: 0x01 done. [Mon Mar 19 09:42:00.356 2018] Skip microcode update [Mon Mar 19 09:42:00.356 2018] CPU #2 initialized [Mon Mar 19 09:42:00.356 2018] CPU: frequency set to 2300 MHz [Mon Mar 19 09:42:00.356 2018] Enabling SMIs. [Mon Mar 19 09:42:00.356 2018] Locking SMM. [Mon Mar 19 09:42:00.356 2018] SGX: pre-conditions not met [Mon Mar 19 09:42:00.356 2018] SGX: pre-conditions not met [Mon Mar 19 09:42:00.356 2018] Not passing VBT to GOP [Mon Mar 19 09:42:00.356 2018] SGX: pre-conditions not met [Mon Mar 19 09:42:00.356 2018] SGX: pre-conditions not met [Mon Mar 19 09:42:00.356 2018] Calling FspSiliconInit: 0x7aaec1ca [Mon Mar 19 09:42:00.356 2018] 0x7ab49348: upd [Mon Mar 19 09:42:01.470 2018] FspSiliconInit returned 0x00000000 [Mon Mar 19 09:42:01.470 2018] BS: BS_DEV_INIT_CHIPS times (us): entry 406417 run 773500 exit 0 [Mon Mar 19 09:42:01.470 2018] Enumerating buses... [Mon Mar 19 09:42:01.470 2018] Show all devs... Before device enumeration. [Mon Mar 19 09:42:01.470 2018] Root Device: enabled 1 [Mon Mar 19 09:42:01.470 2018] CPU_CLUSTER: 0: enabled 1 [Mon Mar 19 09:42:01.470 2018] APIC: 00: enabled 1 [Mon Mar 19 09:42:01.470 2018] DOMAIN: 0000: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:00.0: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:02.0: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:14.0: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:14.1: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:14.2: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:15.0: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:15.1: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:15.2: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:15.3: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:16.0: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:16.1: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:16.2: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:16.3: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:16.4: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:17.0: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:19.0: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:19.1: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:19.2: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1c.0: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1c.1: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1c.2: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1c.3: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1c.4: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1c.5: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1c.6: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1c.7: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1d.0: enabled 1 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1d.1: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1d.2: enabled 0 [Mon Mar 19 09:42:01.470 2018] PCI: 00:1d.3: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1e.0: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1e.1: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1e.2: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1e.3: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1e.4: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1e.5: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1e.6: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1f.0: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1f.1: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1f.2: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1f.3: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1f.4: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1f.5: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:1f.6: enabled 1 [Mon Mar 19 09:42:01.479 2018] APIC: 02: enabled 1 [Mon Mar 19 09:42:01.479 2018] APIC: 01: enabled 1 [Mon Mar 19 09:42:01.479 2018] APIC: 03: enabled 1 [Mon Mar 19 09:42:01.479 2018] Compare with tree... [Mon Mar 19 09:42:01.479 2018] Root Device: enabled 1 [Mon Mar 19 09:42:01.479 2018] CPU_CLUSTER: 0: enabled 1 [Mon Mar 19 09:42:01.479 2018] APIC: 00: enabled 1 [Mon Mar 19 09:42:01.479 2018] APIC: 02: enabled 1 [Mon Mar 19 09:42:01.479 2018] APIC: 01: enabled 1 [Mon Mar 19 09:42:01.479 2018] APIC: 03: enabled 1 [Mon Mar 19 09:42:01.479 2018] DOMAIN: 0000: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:00.0: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:02.0: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:14.0: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:14.1: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:14.2: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:15.0: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:15.1: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:15.2: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:15.3: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:16.0: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:16.1: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:16.2: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:16.3: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:16.4: enabled 0 [Mon Mar 19 09:42:01.479 2018] PCI: 00:17.0: enabled 1 [Mon Mar 19 09:42:01.479 2018] PCI: 00:19.0: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:19.1: enabled 0 [Mon Mar 19 09:42:01.488 2018] PCI: 00:19.2: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1c.0: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1c.1: enabled 0 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1c.2: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1c.3: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1c.4: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1c.5: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1c.6: enabled 0 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1c.7: enabled 0 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1d.0: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1d.1: enabled 0 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1d.2: enabled 0 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1d.3: enabled 0 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1e.0: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1e.1: enabled 0 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1e.2: enabled 0 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1e.3: enabled 0 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1e.4: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1e.5: enabled 0 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1e.6: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1f.0: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1f.1: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1f.2: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1f.3: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1f.4: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1f.5: enabled 1 [Mon Mar 19 09:42:01.488 2018] PCI: 00:1f.6: enabled 1 [Mon Mar 19 09:42:01.488 2018] Root Device scanning... [Mon Mar 19 09:42:01.488 2018] root_dev_scan_bus for Root Device [Mon Mar 19 09:42:01.488 2018] CPU_CLUSTER: 0 enabled [Mon Mar 19 09:42:01.488 2018] DOMAIN: 0000 enabled [Mon Mar 19 09:42:01.488 2018] DOMAIN: 0000 scanning... [Mon Mar 19 09:42:01.488 2018] PCI: pci_scan_bus for bus 00 [Mon Mar 19 09:42:01.488 2018] PCI: 00:00.0 [8086/0000] ops [Mon Mar 19 09:42:01.488 2018] PCI: 00:00.0 [8086/1904] enabled [Mon Mar 19 09:42:01.488 2018] PCI: 00:02.0 [8086/0000] ops [Mon Mar 19 09:42:01.495 2018] PCI: 00:02.0 [8086/1916] enabled [Mon Mar 19 09:42:01.495 2018] PCI: 00:04.0 [8086/1903] enabled [Mon Mar 19 09:42:01.495 2018] PCI: 00:08.0 [8086/1911] enabled [Mon Mar 19 09:42:01.495 2018] PCI: 00:14.0 [8086/0000] ops [Mon Mar 19 09:42:01.495 2018] PCI: 00:14.0 [8086/9d2f] enabled [Mon Mar 19 09:42:01.495 2018] PCI: 00:14.2 [8086/9d31] enabled [Mon Mar 19 09:42:01.495 2018] PCI: 00:15.0 [8086/0000] bus ops [Mon Mar 19 09:42:01.495 2018] PCI: 00:15.0 [8086/9d60] enabled [Mon Mar 19 09:42:01.495 2018] PCI: 00:15.1 [8086/0000] bus ops [Mon Mar 19 09:42:01.495 2018] PCI: 00:15.1 [8086/9d61] enabled [Mon Mar 19 09:42:01.495 2018] PCI: 00:16.0 [8086/0000] ops [Mon Mar 19 09:42:01.495 2018] PCI: 00:16.0 [8086/9d3a] enabled [Mon Mar 19 09:42:01.495 2018] PCI: 00:17.0 [8086/0000] ops [Mon Mar 19 09:42:01.495 2018] PCI: 00:17.0 [8086/9d03] enabled [Mon Mar 19 09:42:01.495 2018] PCI: 00:19.0 [8086/0000] ops [Mon Mar 19 09:42:01.495 2018] PCI: 00:19.0 [8086/9d66] enabled [Mon Mar 19 09:42:01.495 2018] PCI: 00:19.2 [8086/0000] bus ops [Mon Mar 19 09:42:01.495 2018] PCI: 00:19.2 [8086/9d64] enabled [Mon Mar 19 09:42:01.495 2018] PCI: 00:1c.0 [8086/0000] bus ops [Mon Mar 19 09:42:01.495 2018] PCI: 00:1c.0 [8086/9d14] enabled [Mon Mar 19 09:42:01.495 2018] PCI: Static device PCI: 00:1c.2 not found, disabling it. [Mon Mar 19 09:42:01.495 2018] PCI: Static device PCI: 00:1c.3 not found, disabling it. [Mon Mar 19 09:42:01.495 2018] PCI: Static device PCI: 00:1c.4 not found, disabling it. [Mon Mar 19 09:42:01.495 2018] PCI: Static device PCI: 00:1c.5 not found, disabling it. [Mon Mar 19 09:42:01.495 2018] PCI: Static device PCI: 00:1d.0 not found, disabling it. [Mon Mar 19 09:42:01.751 2018] PCI: 00:1e.0 [8086/0000] ops [Mon Mar 19 09:42:01.751 2018] PCI: 00:1e.0 [8086/9d27] enabled [Mon Mar 19 09:42:01.751 2018] PCI: 00:1e.4 [8086/9d2b] enabled [Mon Mar 19 09:42:01.751 2018] PCI: 00:1e.6 [8086/0000] ops [Mon Mar 19 09:42:01.751 2018] PCI: 00:1e.6 [8086/9d2d] enabled [Mon Mar 19 09:42:01.751 2018] PCI: 00:1f.0 [8086/0000] bus ops [Mon Mar 19 09:42:01.751 2018] PCI: 00:1f.0 [8086/9d48] enabled [Mon Mar 19 09:42:01.751 2018] PCI: Static device PCI: 00:1f.1 not found, disabling it. [Mon Mar 19 09:42:01.751 2018] PCI: 00:1f.2 [8086/0000] bus ops [Mon Mar 19 09:42:01.751 2018] PCI: 00:1f.2 [8086/9d21] enabled [Mon Mar 19 09:42:01.751 2018] PCI: Static device PCI: 00:1f.3 not found, disabling it. [Mon Mar 19 09:42:01.751 2018] PCI: 00:1f.4 [8086/0000] bus ops [Mon Mar 19 09:42:01.751 2018] PCI: 00:1f.4 [8086/9d23] enabled [Mon Mar 19 09:42:01.751 2018] PCI: 00:1f.5 [8086/0000] bus ops [Mon Mar 19 09:42:01.751 2018] PCI: 00:1f.5 [8086/9d24] enabled [Mon Mar 19 09:42:01.751 2018] PCI: 00:1f.6 [8086/1570] enabled [Mon Mar 19 09:42:01.751 2018] PCI: 00:15.0 scanning... [Mon Mar 19 09:42:01.751 2018] scan_generic_bus for PCI: 00:15.0 [Mon Mar 19 09:42:01.751 2018] scan_generic_bus for PCI: 00:15.0 done [Mon Mar 19 09:42:01.751 2018] scan_bus: scanning of bus PCI: 00:15.0 took 9837 usecs [Mon Mar 19 09:42:01.751 2018] PCI: 00:15.1 scanning... [Mon Mar 19 09:42:01.751 2018] scan_generic_bus for PCI: 00:15.1 [Mon Mar 19 09:42:01.751 2018] scan_generic_bus for PCI: 00:15.1 done [Mon Mar 19 09:42:01.751 2018] scan_bus: scanning of bus PCI: 00:15.1 took 9837 usecs [Mon Mar 19 09:42:01.751 2018] PCI: 00:19.2 scanning... [Mon Mar 19 09:42:01.751 2018] scan_generic_bus for PCI: 00:19.2 [Mon Mar 19 09:42:01.751 2018] scan_generic_bus for PCI: 00:19.2 done [Mon Mar 19 09:42:01.759 2018] scan_bus: scanning of bus PCI: 00:19.2 took 9836 usecs [Mon Mar 19 09:42:01.759 2018] PCI: 00:1c.0 scanning... [Mon Mar 19 09:42:01.759 2018] do_pci_scan_bridge for PCI: 00:1c.0 [Mon Mar 19 09:42:01.759 2018] PCI: pci_scan_bus for bus 01 [Mon Mar 19 09:42:01.759 2018] PCI: 01:00.0 [8086/24f3] enabled [Mon Mar 19 09:42:01.759 2018] Capability: type 0x01 @ 0xc8 [Mon Mar 19 09:42:01.759 2018] Capability: type 0x05 @ 0xd0 [Mon Mar 19 09:42:01.759 2018] Capability: type 0x10 @ 0x40 [Mon Mar 19 09:42:01.759 2018] Capability: type 0x10 @ 0x40 [Mon Mar 19 09:42:01.759 2018] Enabling Common Clock Configuration [Mon Mar 19 09:42:01.759 2018] L1 Sub-State supported from root port 28 [Mon Mar 19 09:42:01.759 2018] L1 Sub-State Support = 0xf [Mon Mar 19 09:42:01.759 2018] CommonModeRestoreTime = 0x28 [Mon Mar 19 09:42:01.759 2018] Power On Value = 0x16, Power On Scale = 0x0 [Mon Mar 19 09:42:01.759 2018] ASPM: Enabled L1 [Mon Mar 19 09:42:01.759 2018] Capability: type 0x01 @ 0xc8 [Mon Mar 19 09:42:01.759 2018] Capability: type 0x05 @ 0xd0 [Mon Mar 19 09:42:01.759 2018] Capability: type 0x10 @ 0x40 [Mon Mar 19 09:42:01.759 2018] scan_bus: scanning of bus PCI: 00:1c.0 took 52589 usecs [Mon Mar 19 09:42:01.759 2018] PCI: 00:1f.0 scanning... [Mon Mar 19 09:42:01.759 2018] scan_lpc_bus for PCI: 00:1f.0 [Mon Mar 19 09:42:01.759 2018] scan_lpc_bus for PCI: 00:1f.0 done [Mon Mar 19 09:42:01.759 2018] scan_bus: scanning of bus PCI: 00:1f.0 took 9057 usecs [Mon Mar 19 09:42:01.759 2018] PCI: 00:1f.2 scanning... [Mon Mar 19 09:42:01.759 2018] scan_lpc_bus for PCI: 00:1f.2 [Mon Mar 19 09:42:01.759 2018] scan_lpc_bus for PCI: 00:1f.2 done [Mon Mar 19 09:42:01.759 2018] scan_bus: scanning of bus PCI: 00:1f.2 took 9060 usecs [Mon Mar 19 09:42:01.759 2018] PCI: 00:1f.4 scanning... [Mon Mar 19 09:42:01.759 2018] scan_generic_bus for PCI: 00:1f.4 [Mon Mar 19 09:42:01.765 2018] scan_generic_bus for PCI: 00:1f.4 done [Mon Mar 19 09:42:01.765 2018] scan_bus: scanning of bus PCI: 00:1f.4 took 9837 usecs [Mon Mar 19 09:42:01.765 2018] PCI: 00:1f.5 scanning... [Mon Mar 19 09:42:01.765 2018] scan_generic_bus for PCI: 00:1f.5 [Mon Mar 19 09:42:01.765 2018] scan_generic_bus for PCI: 00:1f.5 done [Mon Mar 19 09:42:01.765 2018] scan_bus: scanning of bus PCI: 00:1f.5 took 9840 usecs [Mon Mar 19 09:42:01.765 2018] scan_bus: scanning of bus DOMAIN: 0000 took 328246 usecs [Mon Mar 19 09:42:01.765 2018] root_dev_scan_bus for Root Device done [Mon Mar 19 09:42:01.765 2018] scan_bus: scanning of bus Root Device took 348114 usecs [Mon Mar 19 09:42:01.765 2018] done [Mon Mar 19 09:42:01.765 2018] FMAP: Found "FLASH" version 1.1 at e00000. [Mon Mar 19 09:42:01.765 2018] FMAP: base = ff000000 size = 1000000 #areas = 3 [Mon Mar 19 09:42:01.765 2018] MRC: Checking cached data update for 'RW_MRC_CACHE'. [Mon Mar 19 09:42:01.765 2018] SF: Detected FAST_SPI Hardware Sequencer with sector size 0x1000, total 0x1000000 [Mon Mar 19 09:42:01.765 2018] MRC: no data in 'RW_MRC_CACHE' [Mon Mar 19 09:42:01.765 2018] MRC: cache data 'RW_MRC_CACHE' needs update. [Mon Mar 19 09:42:02.138 2018] MRC: NOT enabling PRR for 'UNIFIED_MRC_CACHE'. [Mon Mar 19 09:42:02.138 2018] BS: BS_DEV_ENUMERATE times (us): entry 0 run 618015 exit 42296 [Mon Mar 19 09:42:02.138 2018] found VGA at PCI: 00:02.0 [Mon Mar 19 09:42:02.138 2018] Setting up VGA for PCI: 00:02.0 [Mon Mar 19 09:42:02.138 2018] Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000 [Mon Mar 19 09:42:02.138 2018] Setting PCI_BRIDGE_CTL_VGA for bridge Root Device [Mon Mar 19 09:42:02.138 2018] Allocating resources... [Mon Mar 19 09:42:02.138 2018] Reading resources... [Mon Mar 19 09:42:02.138 2018] Root Device read_resources bus 0 link: 0 [Mon Mar 19 09:42:02.138 2018] CPU_CLUSTER: 0 read_resources bus 0 link: 0 [Mon Mar 19 09:42:02.138 2018] CPU_CLUSTER: 0 read_resources bus 0 link: 0 done [Mon Mar 19 09:42:02.138 2018] DOMAIN: 0000 read_resources bus 0 link: 0 [Mon Mar 19 09:42:02.138 2018] PCI: 00:1c.0 read_resources bus 1 link: 0 [Mon Mar 19 09:42:02.138 2018] PCI: 00:1c.0 read_resources bus 1 link: 0 done [Mon Mar 19 09:42:02.138 2018] DOMAIN: 0000 read_resources bus 0 link: 0 done [Mon Mar 19 09:42:02.138 2018] Root Device read_resources bus 0 link: 0 done [Mon Mar 19 09:42:02.138 2018] Done reading resources. [Mon Mar 19 09:42:02.138 2018] Show resources in subtree (Root Device)...After reading. [Mon Mar 19 09:42:02.138 2018] Root Device child on link 0 CPU_CLUSTER: 0 [Mon Mar 19 09:42:02.138 2018] CPU_CLUSTER: 0 child on link 0 APIC: 00 [Mon Mar 19 09:42:02.139 2018] APIC: 00 [Mon Mar 19 09:42:02.139 2018] APIC: 02 [Mon Mar 19 09:42:02.139 2018] APIC: 01 [Mon Mar 19 09:42:02.139 2018] APIC: 03 [Mon Mar 19 09:42:02.139 2018] DOMAIN: 0000 child on link 0 PCI: 00:00.0 [Mon Mar 19 09:42:02.139 2018] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000 [Mon Mar 19 09:42:02.145 2018] DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100 [Mon Mar 19 09:42:02.145 2018] PCI: 00:00.0 [Mon Mar 19 09:42:02.145 2018] PCI: 00:00.0 resource base e0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 0 [Mon Mar 19 09:42:02.145 2018] PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1 [Mon Mar 19 09:42:02.145 2018] PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2 [Mon Mar 19 09:42:02.145 2018] PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3 [Mon Mar 19 09:42:02.145 2018] PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4 [Mon Mar 19 09:42:02.145 2018] PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5 [Mon Mar 19 09:42:02.145 2018] PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 6 [Mon Mar 19 09:42:02.145 2018] PCI: 00:00.0 resource base c0000 size 7af3f000 align 0 gran 0 limit 0 flags e0004200 index 7 [Mon Mar 19 09:42:02.145 2018] PCI: 00:00.0 resource base 7afff000 size 801000 align 0 gran 0 limit 0 flags f0004200 index 9 [Mon Mar 19 09:42:02.152 2018] PCI: 00:00.0 resource base 7b800000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index a [Mon Mar 19 09:42:02.152 2018] PCI: 00:00.0 resource base 100000000 size 37f000000 align 0 gran 0 limit 0 flags e0004200 index b [Mon Mar 19 09:42:02.152 2018] PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index c [Mon Mar 19 09:42:02.152 2018] PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index d [Mon Mar 19 09:42:02.152 2018] PCI: 00:02.0 [Mon Mar 19 09:42:02.152 2018] PCI: 00:02.0 resource base 0 size 1000000 align 24 gran 24 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.152 2018] PCI: 00:02.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffffffffffff flags 1201 index 18 [Mon Mar 19 09:42:02.152 2018] PCI: 00:02.0 resource base 0 size 40 align 6 gran 6 limit ffff flags 100 index 20 [Mon Mar 19 09:42:02.152 2018] PCI: 00:04.0 [Mon Mar 19 09:42:02.152 2018] PCI: 00:04.0 resource base 0 size 8000 align 15 gran 15 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.152 2018] PCI: 00:08.0 [Mon Mar 19 09:42:02.152 2018] PCI: 00:08.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.152 2018] PCI: 00:14.0 [Mon Mar 19 09:42:02.152 2018] PCI: 00:14.0 resource base 0 size 10000 align 16 gran 16 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.159 2018] PCI: 00:14.1 [Mon Mar 19 09:42:02.159 2018] PCI: 00:14.2 [Mon Mar 19 09:42:02.159 2018] PCI: 00:14.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.159 2018] PCI: 00:15.0 [Mon Mar 19 09:42:02.159 2018] PCI: 00:15.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.159 2018] PCI: 00:15.1 [Mon Mar 19 09:42:02.159 2018] PCI: 00:15.1 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.159 2018] PCI: 00:15.2 [Mon Mar 19 09:42:02.159 2018] PCI: 00:15.3 [Mon Mar 19 09:42:02.159 2018] PCI: 00:16.0 [Mon Mar 19 09:42:02.159 2018] PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.159 2018] PCI: 00:16.1 [Mon Mar 19 09:42:02.159 2018] PCI: 00:16.2 [Mon Mar 19 09:42:02.159 2018] PCI: 00:16.3 [Mon Mar 19 09:42:02.159 2018] PCI: 00:16.4 [Mon Mar 19 09:42:02.159 2018] PCI: 00:17.0 [Mon Mar 19 09:42:02.159 2018] PCI: 00:17.0 resource base 0 size 2000 align 13 gran 13 limit ffffffff flags 200 index 10 [Mon Mar 19 09:42:02.159 2018] PCI: 00:17.0 resource base 0 size 100 align 12 gran 8 limit ffffffff flags 200 index 14 [Mon Mar 19 09:42:02.159 2018] PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18 [Mon Mar 19 09:42:02.525 2018] PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c [Mon Mar 19 09:42:02.525 2018] PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20 [Mon Mar 19 09:42:02.525 2018] PCI: 00:17.0 resource base 0 size 800 align 12 gran 11 limit ffffffff flags 200 index 24 [Mon Mar 19 09:42:02.525 2018] PCI: 00:19.0 [Mon Mar 19 09:42:02.525 2018] PCI: 00:19.0 resource base fe034000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10 [Mon Mar 19 09:42:02.525 2018] PCI: 00:19.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 18 [Mon Mar 19 09:42:02.525 2018] PCI: 00:19.1 [Mon Mar 19 09:42:02.525 2018] PCI: 00:19.2 [Mon Mar 19 09:42:02.525 2018] PCI: 00:19.2 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.525 2018] PCI: 00:1c.0 child on link 0 PCI: 01:00.0 [Mon Mar 19 09:42:02.525 2018] PCI: 00:1c.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c [Mon Mar 19 09:42:02.525 2018] PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffffffffffff flags 81202 index 24 [Mon Mar 19 09:42:02.525 2018] PCI: 00:1c.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20 [Mon Mar 19 09:42:02.525 2018] PCI: 01:00.0 [Mon Mar 19 09:42:02.525 2018] PCI: 01:00.0 resource base 0 size 2000 align 13 gran 13 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1c.1 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1c.2 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1c.3 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1c.4 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1c.5 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1c.6 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1c.7 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1d.0 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1d.1 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1d.2 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1d.3 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1e.0 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1e.0 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1e.1 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1e.2 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1e.3 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1e.4 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1e.4 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1e.5 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1e.6 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1e.6 resource base 0 size 1000 align 12 gran 12 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1f.0 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1f.1 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1f.2 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1f.2 resource base 0 size 4000 align 14 gran 14 limit ffffffff flags 200 index 10 [Mon Mar 19 09:42:02.533 2018] PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 48 [Mon Mar 19 09:42:02.540 2018] PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 40 [Mon Mar 19 09:42:02.540 2018] PCI: 00:1f.3 [Mon Mar 19 09:42:02.540 2018] PCI: 00:1f.4 [Mon Mar 19 09:42:02.540 2018] PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20 [Mon Mar 19 09:42:02.540 2018] PCI: 00:1f.4 resource base 0 size 100 align 12 gran 8 limit ffffffffffffffff flags 201 index 10 [Mon Mar 19 09:42:02.540 2018] PCI: 00:1f.5 [Mon Mar 19 09:42:02.540 2018] PCI: 00:1f.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10 [Mon Mar 19 09:42:02.540 2018] PCI: 00:1f.6 [Mon Mar 19 09:42:02.540 2018] PCI: 00:1f.6 resource base 0 size 20000 align 17 gran 17 limit ffffffff flags 200 index 10 [Mon Mar 19 09:42:02.540 2018] DOMAIN: 0000 io: base: 0 size: 0 align: 0 gran: 0 limit: ffff [Mon Mar 19 09:42:02.540 2018] PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff [Mon Mar 19 09:42:02.540 2018] PCI: 00:1c.0 io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done [Mon Mar 19 09:42:02.540 2018] PCI: 00:02.0 20 * [0x0 - 0x3f] io [Mon Mar 19 09:42:02.540 2018] PCI: 00:17.0 20 * [0x40 - 0x5f] io [Mon Mar 19 09:42:02.540 2018] PCI: 00:17.0 18 * [0x60 - 0x67] io [Mon Mar 19 09:42:02.540 2018] PCI: 00:17.0 1c * [0x68 - 0x6b] io [Mon Mar 19 09:42:02.540 2018] DOMAIN: 0000 io: base: 6c size: 6c align: 6 gran: 0 limit: ffff done [Mon Mar 19 09:42:02.540 2018] DOMAIN: 0000 mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff [Mon Mar 19 09:42:02.545 2018] PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff [Mon Mar 19 09:42:02.545 2018] PCI: 00:1c.0 prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffffffffff done [Mon Mar 19 09:42:02.545 2018] PCI: 00:1c.0 mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff [Mon Mar 19 09:42:02.545 2018] PCI: 01:00.0 10 * [0x0 - 0x1fff] mem [Mon Mar 19 09:42:02.545 2018] PCI: 00:1c.0 mem: base: 2000 size: 100000 align: 20 gran: 20 limit: ffffffff done [Mon Mar 19 09:42:02.545 2018] PCI: 00:02.0 18 * [0x0 - 0xfffffff] prefmem [Mon Mar 19 09:42:02.545 2018] PCI: 00:02.0 10 * [0x10000000 - 0x10ffffff] mem [Mon Mar 19 09:42:02.545 2018] PCI: 00:1c.0 20 * [0x11000000 - 0x110fffff] mem [Mon Mar 19 09:42:02.545 2018] PCI: 00:1f.6 10 * [0x11100000 - 0x1111ffff] mem [Mon Mar 19 09:42:02.545 2018] PCI: 00:14.0 10 * [0x11120000 - 0x1112ffff] mem [Mon Mar 19 09:42:02.545 2018] PCI: 00:04.0 10 * [0x11130000 - 0x11137fff] mem [Mon Mar 19 09:42:02.545 2018] PCI: 00:1f.2 10 * [0x11138000 - 0x1113bfff] mem [Mon Mar 19 09:42:02.545 2018] PCI: 00:17.0 10 * [0x1113c000 - 0x1113dfff] mem [Mon Mar 19 09:42:02.545 2018] PCI: 00:08.0 10 * [0x1113e000 - 0x1113efff] mem [Mon Mar 19 09:42:02.545 2018] PCI: 00:14.2 10 * [0x1113f000 - 0x1113ffff] mem [Mon Mar 19 09:42:02.545 2018] PCI: 00:15.0 10 * [0x11140000 - 0x11140fff] mem [Mon Mar 19 09:42:02.909 2018] PCI: 00:15.1 10 * [0x11141000 - 0x11141fff] mem [Mon Mar 19 09:42:02.909 2018] PCI: 00:16.0 10 * [0x11142000 - 0x11142fff] mem [Mon Mar 19 09:42:02.909 2018] PCI: 00:19.0 18 * [0x11143000 - 0x11143fff] mem [Mon Mar 19 09:42:02.909 2018] PCI: 00:19.2 10 * [0x11144000 - 0x11144fff] mem [Mon Mar 19 09:42:02.909 2018] PCI: 00:1e.0 10 * [0x11145000 - 0x11145fff] mem [Mon Mar 19 09:42:02.909 2018] PCI: 00:1e.4 10 * [0x11146000 - 0x11146fff] mem [Mon Mar 19 09:42:02.909 2018] PCI: 00:1e.6 10 * [0x11147000 - 0x11147fff] mem [Mon Mar 19 09:42:02.909 2018] PCI: 00:1f.5 10 * [0x11148000 - 0x11148fff] mem [Mon Mar 19 09:42:02.909 2018] PCI: 00:17.0 24 * [0x11149000 - 0x111497ff] mem [Mon Mar 19 09:42:02.909 2018] PCI: 00:17.0 14 * [0x1114a000 - 0x1114a0ff] mem [Mon Mar 19 09:42:02.909 2018] PCI: 00:1f.4 10 * [0x1114b000 - 0x1114b0ff] mem [Mon Mar 19 09:42:02.909 2018] DOMAIN: 0000 mem: base: 1114b100 size: 1114b100 align: 28 gran: 0 limit: ffffffff done [Mon Mar 19 09:42:02.909 2018] avoid_fixed_resources: DOMAIN: 0000 [Mon Mar 19 09:42:02.909 2018] avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff [Mon Mar 19 09:42:02.909 2018] avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff [Mon Mar 19 09:42:02.909 2018] constrain_resources: PCI: 00:00.0 00 base e0000000 limit e3ffffff mem (fixed) [Mon Mar 19 09:42:02.909 2018] constrain_resources: PCI: 00:00.0 06 base 00000000 limit 0009ffff mem (fixed) [Mon Mar 19 09:42:02.909 2018] constrain_resources: PCI: 00:00.0 07 base 000c0000 limit 7affefff mem (fixed) [Mon Mar 19 09:42:02.916 2018] constrain_resources: PCI: 00:00.0 09 base 7afff000 limit 7b7fffff mem (fixed) [Mon Mar 19 09:42:02.916 2018] constrain_resources: PCI: 00:00.0 0a base 7b800000 limit 7fffffff mem (fixed) [Mon Mar 19 09:42:02.916 2018] constrain_resources: PCI: 00:1f.0 00 base 00000000 limit 00000fff io (fixed) [Mon Mar 19 09:42:02.916 2018] constrain_resources: PCI: 00:1f.2 40 base 00001800 limit 000018ff io (fixed) [Mon Mar 19 09:42:02.916 2018] constrain_resources: PCI: 00:1f.4 20 base 0000efa0 limit 0000efbf io (fixed) [Mon Mar 19 09:42:02.916 2018] avoid_fixed_resources:@DOMAIN: 0000 10000000 base 00001900 limit 0000ef9f [Mon Mar 19 09:42:02.916 2018] avoid_fixed_resources:@DOMAIN: 0000 10000100 base c0000000 limit dfffffff [Mon Mar 19 09:42:02.916 2018] Setting resources... [Mon Mar 19 09:42:02.916 2018] DOMAIN: 0000 io: base:1900 size:6c align:6 gran:0 limit:ef9f [Mon Mar 19 09:42:02.916 2018] PCI: 00:02.0 20 * [0x1c00 - 0x1c3f] io [Mon Mar 19 09:42:02.916 2018] PCI: 00:17.0 20 * [0x1c40 - 0x1c5f] io [Mon Mar 19 09:42:02.916 2018] PCI: 00:17.0 18 * [0x1c60 - 0x1c67] io [Mon Mar 19 09:42:02.916 2018] PCI: 00:17.0 1c * [0x1c68 - 0x1c6b] io [Mon Mar 19 09:42:02.916 2018] DOMAIN: 0000 io: next_base: 1c6c size: 6c align: 6 gran: 0 done [Mon Mar 19 09:42:02.916 2018] PCI: 00:1c.0 io: base:ef9f size:0 align:12 gran:12 limit:ef9f [Mon Mar 19 09:42:02.916 2018] PCI: 00:1c.0 io: next_base: ef9f size: 0 align: 12 gran: 12 done [Mon Mar 19 09:42:02.916 2018] DOMAIN: 0000 mem: base:c0000000 size:1114b100 align:28 gran:0 limit:dfffffff [Mon Mar 19 09:42:02.923 2018] PCI: 00:02.0 18 * [0xc0000000 - 0xcfffffff] prefmem [Mon Mar 19 09:42:02.923 2018] PCI: 00:02.0 10 * [0xd0000000 - 0xd0ffffff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:1c.0 20 * [0xd1000000 - 0xd10fffff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:1f.6 10 * [0xd1100000 - 0xd111ffff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:14.0 10 * [0xd1120000 - 0xd112ffff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:04.0 10 * [0xd1130000 - 0xd1137fff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:1f.2 10 * [0xd1138000 - 0xd113bfff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:17.0 10 * [0xd113c000 - 0xd113dfff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:08.0 10 * [0xd113e000 - 0xd113efff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:14.2 10 * [0xd113f000 - 0xd113ffff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:15.0 10 * [0xd1140000 - 0xd1140fff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:15.1 10 * [0xd1141000 - 0xd1141fff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:16.0 10 * [0xd1142000 - 0xd1142fff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:19.0 18 * [0xd1143000 - 0xd1143fff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:19.2 10 * [0xd1144000 - 0xd1144fff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:1e.0 10 * [0xd1145000 - 0xd1145fff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:1e.4 10 * [0xd1146000 - 0xd1146fff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:1e.6 10 * [0xd1147000 - 0xd1147fff] mem [Mon Mar 19 09:42:02.923 2018] PCI: 00:1f.5 10 * [0xd1148000 - 0xd1148fff] mem [Mon Mar 19 09:42:02.929 2018] PCI: 00:17.0 24 * [0xd1149000 - 0xd11497ff] mem [Mon Mar 19 09:42:02.929 2018] PCI: 00:17.0 14 * [0xd114a000 - 0xd114a0ff] mem [Mon Mar 19 09:42:02.929 2018] PCI: 00:1f.4 10 * [0xd114b000 - 0xd114b0ff] mem [Mon Mar 19 09:42:02.929 2018] DOMAIN: 0000 mem: next_base: d114b100 size: 1114b100 align: 28 gran: 0 done [Mon Mar 19 09:42:02.929 2018] PCI: 00:1c.0 prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff [Mon Mar 19 09:42:02.929 2018] PCI: 00:1c.0 prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done [Mon Mar 19 09:42:02.929 2018] PCI: 00:1c.0 mem: base:d1000000 size:100000 align:20 gran:20 limit:d10fffff [Mon Mar 19 09:42:02.929 2018] PCI: 01:00.0 10 * [0xd1000000 - 0xd1001fff] mem [Mon Mar 19 09:42:02.929 2018] PCI: 00:1c.0 mem: next_base: d1002000 size: 100000 align: 20 gran: 20 done [Mon Mar 19 09:42:02.929 2018] Root Device assign_resources, bus 0 link: 0 [Mon Mar 19 09:42:02.929 2018] DOMAIN: 0000 assign_resources, bus 0 link: 0 [Mon Mar 19 09:42:02.929 2018] PCI: 00:02.0 10 <- [0x00d0000000 - 0x00d0ffffff] size 0x01000000 gran 0x18 mem64 [Mon Mar 19 09:42:02.929 2018] PCI: 00:02.0 18 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000 gran 0x1c prefmem64 [Mon Mar 19 09:42:02.929 2018] PCI: 00:02.0 20 <- [0x0000001c00 - 0x0000001c3f] size 0x00000040 gran 0x06 io [Mon Mar 19 09:42:03.296 2018] PCI: 00:04.0 10 <- [0x00d1130000 - 0x00d1137fff] size 0x00008000 gran 0x0f mem64 [Mon Mar 19 09:42:03.296 2018] PCI: 00:08.0 10 <- [0x00d113e000 - 0x00d113efff] size 0x00001000 gran 0x0c mem64 [Mon Mar 19 09:42:03.296 2018] PCI: 00:14.0 10 <- [0x00d1120000 - 0x00d112ffff] size 0x00010000 gran 0x10 mem64 [Mon Mar 19 09:42:03.296 2018] PCI: 00:14.2 10 <- [0x00d113f000 - 0x00d113ffff] size 0x00001000 gran 0x0c mem64 [Mon Mar 19 09:42:03.296 2018] PCI: 00:15.0 10 <- [0x00d1140000 - 0x00d1140fff] size 0x00001000 gran 0x0c mem64 [Mon Mar 19 09:42:03.296 2018] PCI: 00:15.1 10 <- [0x00d1141000 - 0x00d1141fff] size 0x00001000 gran 0x0c mem64 [Mon Mar 19 09:42:03.296 2018] PCI: 00:16.0 10 <- [0x00d1142000 - 0x00d1142fff] size 0x00001000 gran 0x0c mem64 [Mon Mar 19 09:42:03.296 2018] PCI: 00:17.0 10 <- [0x00d113c000 - 0x00d113dfff] size 0x00002000 gran 0x0d mem [Mon Mar 19 09:42:03.296 2018] PCI: 00:17.0 14 <- [0x00d114a000 - 0x00d114a0ff] size 0x00000100 gran 0x08 mem [Mon Mar 19 09:42:03.296 2018] PCI: 00:17.0 18 <- [0x0000001c60 - 0x0000001c67] size 0x00000008 gran 0x03 io [Mon Mar 19 09:42:03.296 2018] PCI: 00:17.0 1c <- [0x0000001c68 - 0x0000001c6b] size 0x00000004 gran 0x02 io [Mon Mar 19 09:42:03.296 2018] PCI: 00:17.0 20 <- [0x0000001c40 - 0x0000001c5f] size 0x00000020 gran 0x05 io [Mon Mar 19 09:42:03.296 2018] PCI: 00:17.0 24 <- [0x00d1149000 - 0x00d11497ff] size 0x00000800 gran 0x0b mem [Mon Mar 19 09:42:03.302 2018] PCI: 00:19.0 18 <- [0x00d1143000 - 0x00d1143fff] size 0x00001000 gran 0x0c mem64 [Mon Mar 19 09:42:03.302 2018] PCI: 00:19.2 10 <- [0x00d1144000 - 0x00d1144fff] size 0x00001000 gran 0x0c mem64 [Mon Mar 19 09:42:03.302 2018] PCI: 00:1c.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000 gran 0x0c bus 01 io [Mon Mar 19 09:42:03.302 2018] PCI: 00:1c.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem [Mon Mar 19 09:42:03.302 2018] PCI: 00:1c.0 20 <- [0x00d1000000 - 0x00d10fffff] size 0x00100000 gran 0x14 bus 01 mem [Mon Mar 19 09:42:03.302 2018] PCI: 00:1c.0 assign_resources, bus 1 link: 0 [Mon Mar 19 09:42:03.302 2018] PCI: 01:00.0 10 <- [0x00d1000000 - 0x00d1001fff] size 0x00002000 gran 0x0d mem64 [Mon Mar 19 09:42:03.302 2018] PCI: 00:1c.0 assign_resources, bus 1 link: 0 [Mon Mar 19 09:42:03.302 2018] PCI: 00:1e.0 10 <- [0x00d1145000 - 0x00d1145fff] size 0x00001000 gran 0x0c mem64 [Mon Mar 19 09:42:03.302 2018] PCI: 00:1e.4 10 <- [0x00d1146000 - 0x00d1146fff] size 0x00001000 gran 0x0c mem64 [Mon Mar 19 09:42:03.302 2018] PCI: 00:1e.6 10 <- [0x00d1147000 - 0x00d1147fff] size 0x00001000 gran 0x0c mem64 [Mon Mar 19 09:42:03.302 2018] PCI: 00:1f.2 10 <- [0x00d1138000 - 0x00d113bfff] size 0x00004000 gran 0x0e mem [Mon Mar 19 09:42:03.302 2018] PCI: 00:1f.4 10 <- [0x00d114b000 - 0x00d114b0ff] size 0x00000100 gran 0x08 mem64 [Mon Mar 19 09:42:03.309 2018] PCI: 00:1f.5 10 <- [0x00d1148000 - 0x00d1148fff] size 0x00001000 gran 0x0c mem [Mon Mar 19 09:42:03.309 2018] PCI: 00:1f.6 10 <- [0x00d1100000 - 0x00d111ffff] size 0x00020000 gran 0x11 mem [Mon Mar 19 09:42:03.309 2018] DOMAIN: 0000 assign_resources, bus 0 link: 0 [Mon Mar 19 09:42:03.309 2018] Root Device assign_resources, bus 0 link: 0 [Mon Mar 19 09:42:03.309 2018] Done setting resources. [Mon Mar 19 09:42:03.309 2018] Show resources in subtree (Root Device)...After assigning values. [Mon Mar 19 09:42:03.309 2018] Root Device child on link 0 CPU_CLUSTER: 0 [Mon Mar 19 09:42:03.309 2018] CPU_CLUSTER: 0 child on link 0 APIC: 00 [Mon Mar 19 09:42:03.309 2018] APIC: 00 [Mon Mar 19 09:42:03.309 2018] APIC: 02 [Mon Mar 19 09:42:03.309 2018] APIC: 01 [Mon Mar 19 09:42:03.309 2018] APIC: 03 [Mon Mar 19 09:42:03.309 2018] DOMAIN: 0000 child on link 0 PCI: 00:00.0 [Mon Mar 19 09:42:03.309 2018] DOMAIN: 0000 resource base 1900 size 6c align 6 gran 0 limit ef9f flags 40040100 index 10000000 [Mon Mar 19 09:42:03.309 2018] DOMAIN: 0000 resource base c0000000 size 1114b100 align 28 gran 0 limit dfffffff flags 40040200 index 10000100 [Mon Mar 19 09:42:03.309 2018] PCI: 00:00.0 [Mon Mar 19 09:42:03.309 2018] PCI: 00:00.0 resource base e0000000 size 4000000 align 0 gran 0 limit 0 flags f0000200 index 0 [Mon Mar 19 09:42:03.309 2018] PCI: 00:00.0 resource base fed10000 size 8000 align 0 gran 0 limit 0 flags f0000200 index 1 [Mon Mar 19 09:42:03.309 2018] PCI: 00:00.0 resource base fed18000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 2 [Mon Mar 19 09:42:03.315 2018] PCI: 00:00.0 resource base fed19000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 3 [Mon Mar 19 09:42:03.315 2018] PCI: 00:00.0 resource base fed84000 size 1000 align 0 gran 0 limit 0 flags f0000200 index 4 [Mon Mar 19 09:42:03.315 2018] PCI: 00:00.0 resource base fed80000 size 4000 align 0 gran 0 limit 0 flags f0000200 index 5 [Mon Mar 19 09:42:03.315 2018] PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 6 [Mon Mar 19 09:42:03.315 2018] PCI: 00:00.0 resource base c0000 size 7af3f000 align 0 gran 0 limit 0 flags e0004200 index 7 [Mon Mar 19 09:42:03.315 2018] PCI: 00:00.0 resource base 7afff000 size 801000 align 0 gran 0 limit 0 flags f0004200 index 9 [Mon Mar 19 09:42:03.315 2018] PCI: 00:00.0 resource base 7b800000 size 4800000 align 0 gran 0 limit 0 flags f0000200 index a [Mon Mar 19 09:42:03.315 2018] PCI: 00:00.0 resource base 100000000 size 37f000000 align 0 gran 0 limit 0 flags e0004200 index b [Mon Mar 19 09:42:03.315 2018] PCI: 00:00.0 resource base a0000 size 20000 align 0 gran 0 limit 0 flags f0000200 index c [Mon Mar 19 09:42:03.682 2018] PCI: 00:00.0 resource base c0000 size 40000 align 0 gran 0 limit 0 flags f0004200 index d [Mon Mar 19 09:42:03.682 2018] PCI: 00:02.0 [Mon Mar 19 09:42:03.682 2018] PCI: 00:02.0 resource base d0000000 size 1000000 align 24 gran 24 limit d0ffffff flags 60000201 index 10 [Mon Mar 19 09:42:03.682 2018] PCI: 00:02.0 resource base c0000000 size 10000000 align 28 gran 28 limit cfffffff flags 60001201 index 18 [Mon Mar 19 09:42:03.682 2018] PCI: 00:02.0 resource base 1c00 size 40 align 6 gran 6 limit 1c3f flags 60000100 index 20 [Mon Mar 19 09:42:03.682 2018] PCI: 00:04.0 [Mon Mar 19 09:42:03.682 2018] PCI: 00:04.0 resource base d1130000 size 8000 align 15 gran 15 limit d1137fff flags 60000201 index 10 [Mon Mar 19 09:42:03.682 2018] PCI: 00:08.0 [Mon Mar 19 09:42:03.682 2018] PCI: 00:08.0 resource base d113e000 size 1000 align 12 gran 12 limit d113efff flags 60000201 index 10 [Mon Mar 19 09:42:03.682 2018] PCI: 00:14.0 [Mon Mar 19 09:42:03.682 2018] PCI: 00:14.0 resource base d1120000 size 10000 align 16 gran 16 limit d112ffff flags 60000201 index 10 [Mon Mar 19 09:42:03.682 2018] PCI: 00:14.1 [Mon Mar 19 09:42:03.682 2018] PCI: 00:14.2 [Mon Mar 19 09:42:03.682 2018] PCI: 00:14.2 resource base d113f000 size 1000 align 12 gran 12 limit d113ffff flags 60000201 index 10 [Mon Mar 19 09:42:03.682 2018] PCI: 00:15.0 [Mon Mar 19 09:42:03.682 2018] PCI: 00:15.0 resource base d1140000 size 1000 align 12 gran 12 limit d1140fff flags 60000201 index 10 [Mon Mar 19 09:42:03.690 2018] PCI: 00:15.1 [Mon Mar 19 09:42:03.690 2018] PCI: 00:15.1 resource base d1141000 size 1000 align 12 gran 12 limit d1141fff flags 60000201 index 10 [Mon Mar 19 09:42:03.690 2018] PCI: 00:15.2 [Mon Mar 19 09:42:03.690 2018] PCI: 00:15.3 [Mon Mar 19 09:42:03.690 2018] PCI: 00:16.0 [Mon Mar 19 09:42:03.690 2018] PCI: 00:16.0 resource base d1142000 size 1000 align 12 gran 12 limit d1142fff flags 60000201 index 10 [Mon Mar 19 09:42:03.690 2018] PCI: 00:16.1 [Mon Mar 19 09:42:03.690 2018] PCI: 00:16.2 [Mon Mar 19 09:42:03.690 2018] PCI: 00:16.3 [Mon Mar 19 09:42:03.690 2018] PCI: 00:16.4 [Mon Mar 19 09:42:03.690 2018] PCI: 00:17.0 [Mon Mar 19 09:42:03.690 2018] PCI: 00:17.0 resource base d113c000 size 2000 align 13 gran 13 limit d113dfff flags 60000200 index 10 [Mon Mar 19 09:42:03.690 2018] PCI: 00:17.0 resource base d114a000 size 100 align 12 gran 8 limit d114a0ff flags 60000200 index 14 [Mon Mar 19 09:42:03.690 2018] PCI: 00:17.0 resource base 1c60 size 8 align 3 gran 3 limit 1c67 flags 60000100 index 18 [Mon Mar 19 09:42:03.690 2018] PCI: 00:17.0 resource base 1c68 size 4 align 2 gran 2 limit 1c6b flags 60000100 index 1c [Mon Mar 19 09:42:03.690 2018] PCI: 00:17.0 resource base 1c40 size 20 align 5 gran 5 limit 1c5f flags 60000100 index 20 [Mon Mar 19 09:42:03.690 2018] PCI: 00:17.0 resource base d1149000 size 800 align 12 gran 11 limit d11497ff flags 60000200 index 24 [Mon Mar 19 09:42:03.697 2018] PCI: 00:19.0 [Mon Mar 19 09:42:03.697 2018] PCI: 00:19.0 resource base fe034000 size 1000 align 12 gran 12 limit ffffffffffffffff flags c0000200 index 10 [Mon Mar 19 09:42:03.697 2018] PCI: 00:19.0 resource base d1143000 size 1000 align 12 gran 12 limit d1143fff flags 60000201 index 18 [Mon Mar 19 09:42:03.697 2018] PCI: 00:19.1 [Mon Mar 19 09:42:03.697 2018] PCI: 00:19.2 [Mon Mar 19 09:42:03.697 2018] PCI: 00:19.2 resource base d1144000 size 1000 align 12 gran 12 limit d1144fff flags 60000201 index 10 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1c.0 child on link 0 PCI: 01:00.0 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1c.0 resource base ef9f size 0 align 12 gran 12 limit ef9f flags 60080102 index 1c [Mon Mar 19 09:42:03.697 2018] PCI: 00:1c.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1c.0 resource base d1000000 size 100000 align 20 gran 20 limit d10fffff flags 60080202 index 20 [Mon Mar 19 09:42:03.697 2018] PCI: 01:00.0 [Mon Mar 19 09:42:03.697 2018] PCI: 01:00.0 resource base d1000000 size 2000 align 13 gran 13 limit d1001fff flags 60000201 index 10 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1c.1 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1c.2 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1c.3 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1c.4 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1c.5 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1c.6 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1c.7 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1d.0 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1d.1 [Mon Mar 19 09:42:03.697 2018] PCI: 00:1d.2 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1d.3 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1e.0 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1e.0 resource base d1145000 size 1000 align 12 gran 12 limit d1145fff flags 60000201 index 10 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1e.1 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1e.2 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1e.3 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1e.4 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1e.4 resource base d1146000 size 1000 align 12 gran 12 limit d1146fff flags 60000201 index 10 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1e.5 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1e.6 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1e.6 resource base d1147000 size 1000 align 12 gran 12 limit d1147fff flags 60000201 index 10 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1f.0 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0 flags c0000100 index 0 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1f.1 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1f.2 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1f.2 resource base d1138000 size 4000 align 14 gran 14 limit d113bfff flags 60000200 index 10 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1f.2 resource base fe000000 size 10000 align 0 gran 0 limit 0 flags d0000200 index 48 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1f.2 resource base 1800 size 100 align 0 gran 0 limit 0 flags c0000100 index 40 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1f.3 [Mon Mar 19 09:42:03.704 2018] PCI: 00:1f.4 [Mon Mar 19 09:42:04.078 2018] PCI: 00:1f.4 resource base efa0 size 20 align 0 gran 0 limit efbf flags f0000100 index 20 [Mon Mar 19 09:42:04.078 2018] PCI: 00:1f.4 resource base d114b000 size 100 align 12 gran 8 limit d114b0ff flags 60000201 index 10 [Mon Mar 19 09:42:04.078 2018] PCI: 00:1f.5 [Mon Mar 19 09:42:04.078 2018] PCI: 00:1f.5 resource base d1148000 size 1000 align 12 gran 12 limit d1148fff flags 60000200 index 10 [Mon Mar 19 09:42:04.078 2018] PCI: 00:1f.6 [Mon Mar 19 09:42:04.078 2018] PCI: 00:1f.6 resource base d1100000 size 20000 align 17 gran 17 limit d111ffff flags 60000200 index 10 [Mon Mar 19 09:42:04.078 2018] Done allocating resources. [Mon Mar 19 09:42:04.078 2018] BS: BS_DEV_RESOURCES times (us): entry 0 run 1969336 exit 29 [Mon Mar 19 09:42:04.078 2018] 0x00000020: notify_params->phase [Mon Mar 19 09:42:04.078 2018] Calling FspNotify: 0x7aaec1c0 [Mon Mar 19 09:42:04.078 2018] 0x7ab49f7c: notify_params [Mon Mar 19 09:42:04.078 2018] FspNotify returned 0x00000000 [Mon Mar 19 09:42:04.078 2018] Enabling resources... [Mon Mar 19 09:42:04.078 2018] PCI: 00:00.0 subsystem <- 8086/1904 [Mon Mar 19 09:42:04.078 2018] PCI: 00:00.0 cmd <- 06 [Mon Mar 19 09:42:04.078 2018] PCI: 00:02.0 subsystem <- 8086/1916 [Mon Mar 19 09:42:04.078 2018] PCI: 00:02.0 cmd <- 03 [Mon Mar 19 09:42:04.078 2018] PCI: 00:04.0 cmd <- 02 [Mon Mar 19 09:42:04.078 2018] PCI: 00:08.0 cmd <- 06 [Mon Mar 19 09:42:04.078 2018] PCI: 00:14.0 subsystem <- 8086/9d2f [Mon Mar 19 09:42:04.078 2018] PCI: 00:14.0 cmd <- 02 [Mon Mar 19 09:42:04.078 2018] PCI: 00:14.2 subsystem <- 8086/9d31 [Mon Mar 19 09:42:04.078 2018] PCI: 00:14.2 cmd <- 02 [Mon Mar 19 09:42:04.078 2018] PCI: 00:15.0 subsystem <- 8086/9d60 [Mon Mar 19 09:42:04.086 2018] PCI: 00:15.0 cmd <- 06 [Mon Mar 19 09:42:04.086 2018] PCI: 00:15.1 subsystem <- 8086/9d61 [Mon Mar 19 09:42:04.086 2018] PCI: 00:15.1 cmd <- 06 [Mon Mar 19 09:42:04.086 2018] PCI: 00:16.0 subsystem <- 8086/9d3a [Mon Mar 19 09:42:04.086 2018] PCI: 00:16.0 cmd <- 06 [Mon Mar 19 09:42:04.086 2018] PCI: 00:17.0 subsystem <- 8086/9d03 [Mon Mar 19 09:42:04.086 2018] PCI: 00:17.0 cmd <- 03 [Mon Mar 19 09:42:04.086 2018] PCI: 00:19.0 subsystem <- 8086/9d66 [Mon Mar 19 09:42:04.086 2018] PCI: 00:19.0 cmd <- 06 [Mon Mar 19 09:42:04.086 2018] PCI: 00:19.2 subsystem <- 8086/9d64 [Mon Mar 19 09:42:04.086 2018] PCI: 00:19.2 cmd <- 06 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1c.0 bridge ctrl <- 0003 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1c.0 subsystem <- 8086/9d14 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1c.0 cmd <- 06 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1e.0 subsystem <- 8086/9d27 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1e.0 cmd <- 06 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1e.4 subsystem <- 8086/9d2b [Mon Mar 19 09:42:04.086 2018] PCI: 00:1e.4 cmd <- 06 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1e.6 subsystem <- 8086/9d2d [Mon Mar 19 09:42:04.086 2018] PCI: 00:1e.6 cmd <- 06 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1f.0 subsystem <- 8086/9d48 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1f.0 cmd <- 07 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1f.2 subsystem <- 8086/9d21 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1f.2 cmd <- 02 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1f.4 subsystem <- 8086/9d23 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1f.4 cmd <- 03 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1f.5 subsystem <- 8086/9d24 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1f.5 cmd <- 406 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1f.6 subsystem <- 8086/1570 [Mon Mar 19 09:42:04.086 2018] PCI: 00:1f.6 cmd <- 02 [Mon Mar 19 09:42:04.086 2018] PCI: 01:00.0 cmd <- 02 [Mon Mar 19 09:42:04.086 2018] done. [Mon Mar 19 09:42:04.086 2018] BS: BS_DEV_ENABLE times (us): entry 18871 run 126732 exit 0 [Mon Mar 19 09:42:04.086 2018] Initializing devices... [Mon Mar 19 09:42:04.094 2018] Root Device init ... [Mon Mar 19 09:42:04.094 2018] Root Device init finished in 2144 usecs [Mon Mar 19 09:42:04.094 2018] CPU_CLUSTER: 0 init ... [Mon Mar 19 09:42:04.094 2018] CPU_CLUSTER: 0 init finished in 2434 usecs [Mon Mar 19 09:42:04.094 2018] PCI: 00:00.0 init ... [Mon Mar 19 09:42:04.094 2018] CPU TDP: 15 Watts [Mon Mar 19 09:42:04.094 2018] CPU PL2 = 18 Watts [Mon Mar 19 09:42:04.094 2018] PCI: 00:00.0 init finished in 7050 usecs [Mon Mar 19 09:42:04.094 2018] PCI: 00:02.0 init ... [Mon Mar 19 09:42:04.094 2018] PCI: 00:02.0 init finished in 2247 usecs [Mon Mar 19 09:42:04.094 2018] PCI: 00:04.0 init ... [Mon Mar 19 09:42:04.094 2018] PCI: 00:04.0 init finished in 2242 usecs [Mon Mar 19 09:42:04.094 2018] PCI: 00:08.0 init ... [Mon Mar 19 09:42:04.094 2018] PCI: 00:08.0 init finished in 2241 usecs [Mon Mar 19 09:42:04.094 2018] PCI: 00:14.0 init ... [Mon Mar 19 09:42:04.094 2018] PCI: 00:14.0 init finished in 2241 usecs [Mon Mar 19 09:42:04.094 2018] PCI: 00:14.2 init ... [Mon Mar 19 09:42:04.094 2018] PCI: 00:14.2 init finished in 2240 usecs [Mon Mar 19 09:42:04.094 2018] PCI: 00:15.0 init ... [Mon Mar 19 09:42:04.094 2018] DW I2C bus 0 at 0xd1140000 (400 KHz) [Mon Mar 19 09:42:04.094 2018] PCI: 00:15.0 init finished in 5944 usecs [Mon Mar 19 09:42:04.094 2018] PCI: 00:15.1 init ... [Mon Mar 19 09:42:04.094 2018] DW I2C bus 1 at 0xd1141000 (400 KHz) [Mon Mar 19 09:42:04.094 2018] PCI: 00:15.1 init finished in 5943 usecs [Mon Mar 19 09:42:04.094 2018] PCI: 00:16.0 init ... [Mon Mar 19 09:42:04.094 2018] PCI: 00:16.0 init finished in 2241 usecs [Mon Mar 19 09:42:04.094 2018] PCI: 00:19.2 init ... [Mon Mar 19 09:42:04.094 2018] DW I2C bus 4 at 0xd1144000 (400 KHz) [Mon Mar 19 09:42:04.094 2018] PCI: 00:19.2 init finished in 5945 usecs [Mon Mar 19 09:42:04.094 2018] PCI: 00:1c.0 init ... [Mon Mar 19 09:42:04.094 2018] Initializing PCH PCIe bridge. [Mon Mar 19 09:42:04.094 2018] PCI: 00:1c.0 init finished in 5264 usecs [Mon Mar 19 09:42:04.101 2018] PCI: 00:1e.4 init ... [Mon Mar 19 09:42:04.101 2018] PCI: 00:1e.4 init finished in 2241 usecs [Mon Mar 19 09:42:04.101 2018] PCI: 00:1f.0 init ... [Mon Mar 19 09:42:04.101 2018] IOAPIC: Initializing IOAPIC at 0xfec00000 [Mon Mar 19 09:42:04.101 2018] IOAPIC: Bootstrap Processor Local APIC = 0x00 [Mon Mar 19 09:42:04.101 2018] IOAPIC: ID = 0x02 [Mon Mar 19 09:42:04.101 2018] IOAPIC: Dumping registers [Mon Mar 19 09:42:04.101 2018] reg 0x0000: 0x02000000 [Mon Mar 19 09:42:04.101 2018] reg 0x0001: 0x00770020 [Mon Mar 19 09:42:04.101 2018] reg 0x0002: 0x00000000 [Mon Mar 19 09:42:04.101 2018] PCI: 00:1f.0 init finished in 23457 usecs [Mon Mar 19 09:42:04.101 2018] PCI: 00:1f.2 init ... [Mon Mar 19 09:42:04.101 2018] RTC Init [Mon Mar 19 09:42:04.101 2018] Set power on after power failure. [Mon Mar 19 09:42:04.101 2018] Disabling ACPI via APMC: [Mon Mar 19 09:42:04.101 2018] done. [Mon Mar 19 09:42:04.101 2018] Disabling Deep S3 [Mon Mar 19 09:42:04.101 2018] Disabling Deep S3 [Mon Mar 19 09:42:04.101 2018] Enabling Deep S4 [Mon Mar 19 09:42:04.101 2018] Enabling Deep S4 [Mon Mar 19 09:42:04.101 2018] Enabling Deep S5 [Mon Mar 19 09:42:04.101 2018] Enabling Deep S5 [Mon Mar 19 09:42:04.101 2018] PCI: 00:1f.2 init finished in 20797 usecs [Mon Mar 19 09:42:04.101 2018] PCI: 00:1f.4 init ... [Mon Mar 19 09:42:04.101 2018] PCI: 00:1f.4 init finished in 2251 usecs [Mon Mar 19 09:42:04.101 2018] PCI: 00:1f.6 init ... [Mon Mar 19 09:42:04.101 2018] PCI: 00:1f.6 init finished in 2242 usecs [Mon Mar 19 09:42:04.101 2018] PCI: 01:00.0 init ... [Mon Mar 19 09:42:04.101 2018] PCI: 01:00.0 init finished in 2240 usecs [Mon Mar 19 09:42:04.101 2018] Devices initialized [Mon Mar 19 09:42:04.101 2018] Show all devs... After init. [Mon Mar 19 09:42:04.101 2018] Root Device: enabled 1 [Mon Mar 19 09:42:04.101 2018] CPU_CLUSTER: 0: enabled 1 [Mon Mar 19 09:42:04.465 2018] APIC: 00: enabled 1 [Mon Mar 19 09:42:04.465 2018] DOMAIN: 0000: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:00.0: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:02.0: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:14.0: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:14.1: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:14.2: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:15.0: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:15.1: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:15.2: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:15.3: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:16.0: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:16.1: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:16.2: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:16.3: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:16.4: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:17.0: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:19.0: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:19.1: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:19.2: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1c.0: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1c.1: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1c.2: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1c.3: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1c.4: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1c.5: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1c.6: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1c.7: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1d.0: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1d.1: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1d.2: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1d.3: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1e.0: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1e.1: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1e.2: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1e.3: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1e.4: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1e.5: enabled 0 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1e.6: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1f.0: enabled 1 [Mon Mar 19 09:42:04.465 2018] PCI: 00:1f.1: enabled 0 [Mon Mar 19 09:42:04.473 2018] PCI: 00:1f.2: enabled 1 [Mon Mar 19 09:42:04.473 2018] PCI: 00:1f.3: enabled 0 [Mon Mar 19 09:42:04.473 2018] PCI: 00:1f.4: enabled 1 [Mon Mar 19 09:42:04.473 2018] PCI: 00:1f.5: enabled 1 [Mon Mar 19 09:42:04.473 2018] PCI: 00:1f.6: enabled 1 [Mon Mar 19 09:42:04.473 2018] APIC: 02: enabled 1 [Mon Mar 19 09:42:04.473 2018] APIC: 01: enabled 1 [Mon Mar 19 09:42:04.473 2018] APIC: 03: enabled 1 [Mon Mar 19 09:42:04.473 2018] PCI: 00:04.0: enabled 1 [Mon Mar 19 09:42:04.473 2018] PCI: 00:08.0: enabled 1 [Mon Mar 19 09:42:04.473 2018] PCI: 01:00.0: enabled 1 [Mon Mar 19 09:42:04.473 2018] MTRR: Physical address space: [Mon Mar 19 09:42:04.473 2018] 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 [Mon Mar 19 09:42:04.473 2018] 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 [Mon Mar 19 09:42:04.473 2018] 0x00000000000c0000 - 0x000000007b800000 size 0x7b740000 type 6 [Mon Mar 19 09:42:04.473 2018] 0x000000007b800000 - 0x00000000c0000000 size 0x44800000 type 0 [Mon Mar 19 09:42:04.473 2018] 0x00000000c0000000 - 0x00000000d0000000 size 0x10000000 type 1 [Mon Mar 19 09:42:04.473 2018] 0x00000000d0000000 - 0x0000000100000000 size 0x30000000 type 0 [Mon Mar 19 09:42:04.473 2018] 0x0000000100000000 - 0x000000047f000000 size 0x37f000000 type 6 [Mon Mar 19 09:42:04.473 2018] MTRR: Fixed MSR 0x250 0x0606060606060606 [Mon Mar 19 09:42:04.473 2018] MTRR: Fixed MSR 0x258 0x0606060606060606 [Mon Mar 19 09:42:04.473 2018] MTRR: Fixed MSR 0x259 0x0000000000000000 [Mon Mar 19 09:42:04.473 2018] MTRR: Fixed MSR 0x268 0x0606060606060606 [Mon Mar 19 09:42:04.473 2018] MTRR: Fixed MSR 0x269 0x0606060606060606 [Mon Mar 19 09:42:04.473 2018] MTRR: Fixed MSR 0x26a 0x0606060606060606 [Mon Mar 19 09:42:04.473 2018] MTRR: Fixed MSR 0x26b 0x0606060606060606 [Mon Mar 19 09:42:04.480 2018] MTRR: Fixed MSR 0x26c 0x0606060606060606 [Mon Mar 19 09:42:04.480 2018] MTRR: Fixed MSR 0x26d 0x0606060606060606 [Mon Mar 19 09:42:04.480 2018] MTRR: Fixed MSR 0x26e 0x0606060606060606 [Mon Mar 19 09:42:04.480 2018] MTRR: Fixed MSR 0x26f 0x0606060606060606 [Mon Mar 19 09:42:04.480 2018] call enable_fixed_mtrr() [Mon Mar 19 09:42:04.480 2018] CPU physical address size: 39 bits [Mon Mar 19 09:42:04.480 2018] MTRR: default type WB/UC MTRR counts: 6/11. [Mon Mar 19 09:42:04.480 2018] MTRR: WB selected as default type. [Mon Mar 19 09:42:04.480 2018] MTRR: 0 base 0x000000007b800000 mask 0x0000007fff800000 type 0 [Mon Mar 19 09:42:04.480 2018] MTRR: 1 base 0x000000007c000000 mask 0x0000007ffc000000 type 0 [Mon Mar 19 09:42:04.480 2018] MTRR: 2 base 0x0000000080000000 mask 0x0000007fc0000000 type 0 [Mon Mar 19 09:42:04.480 2018] MTRR: 3 base 0x00000000c0000000 mask 0x0000007ff0000000 type 1 [Mon Mar 19 09:42:04.480 2018] MTRR: 4 base 0x00000000d0000000 mask 0x0000007ff0000000 type 0 [Mon Mar 19 09:42:04.480 2018] MTRR: 5 base 0x00000000e0000000 mask 0x0000007fe0000000 type 0 [Mon Mar 19 09:42:04.480 2018] MTRR: Fixed MSR 0x250 0x0606060606060606 [Mon Mar 19 09:42:04.480 2018] MTRR: Fixed MSR 0x258 0x0606060606060606 [Mon Mar 19 09:42:04.480 2018] MTRR: Fixed MSR 0x259 0x0000000000000000 [Mon Mar 19 09:42:04.480 2018] MTRR: Fixed MSR 0x268 0x0606060606060606 [Mon Mar 19 09:42:04.480 2018] MTRR: Fixed MSR 0x269 0x0606060606060606 [Mon Mar 19 09:42:04.480 2018] MTRR: Fixed MSR 0x26a 0x0606060606060606 [Mon Mar 19 09:42:04.480 2018] MTRR: Fixed MSR 0x26b 0x0606060606060606 [Mon Mar 19 09:42:04.486 2018] MTRR: Fixed MSR 0x26c 0x0606060606060606 [Mon Mar 19 09:42:04.486 2018] MTRR: Fixed MSR 0x26d 0x0606060606060606 [Mon Mar 19 09:42:04.486 2018] MTRR: Fixed MSR 0x26e 0x0606060606060606 [Mon Mar 19 09:42:04.486 2018] MTRR: Fixed MSR 0x26f 0x0606060606060606 [Mon Mar 19 09:42:04.486 2018] MTRR: TEMPORARY Physical address space: [Mon Mar 19 09:42:04.486 2018] call enable_fixed_mtrr() [Mon Mar 19 09:42:04.486 2018] 0x0000000000000000 - 0x00000000000a0000 size 0x000a0000 type 6 [Mon Mar 19 09:42:04.486 2018] 0x00000000000a0000 - 0x00000000000c0000 size 0x00020000 type 0 [Mon Mar 19 09:42:04.486 2018] 0x00000000000c0000 - 0x000000007b800000 size 0x7b740000 type 6 [Mon Mar 19 09:42:04.486 2018] 0x000000007b800000 - 0x00000000ffe00000 size 0x84600000 type 0 [Mon Mar 19 09:42:04.486 2018] 0x00000000ffe00000 - 0x0000000100000000 size 0x00200000 type 5 [Mon Mar 19 09:42:04.486 2018] 0x0000000100000000 - 0x000000047f000000 size 0x37f000000 type 6 [Mon Mar 19 09:42:04.486 2018] CPU physical address size: 39 bits [Mon Mar 19 09:42:04.486 2018] MTRR: Removing WRCOMB type. WB/UC MTRR counts: 13/11 > 8. [Mon Mar 19 09:42:04.486 2018] MTRR: Fixed MSR 0x250 0x0606060606060606 [Mon Mar 19 09:42:04.486 2018] MTRR: Fixed MSR 0x250 0x0606060606060606 [Mon Mar 19 09:42:04.486 2018] MTRR: Fixed MSR 0x258 0x0606060606060606 [Mon Mar 19 09:42:04.486 2018] MTRR: Fixed MSR 0x259 0x0000000000000000 [Mon Mar 19 09:42:04.486 2018] MTRR: Fixed MSR 0x268 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x269 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26a 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26b 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26c 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26d 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26e 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26f 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x258 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] call enable_fixed_mtrr() [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x259 0x0000000000000000 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x268 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x269 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26a 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26b 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26c 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26d 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26e 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] MTRR: Fixed MSR 0x26f 0x0606060606060606 [Mon Mar 19 09:42:04.859 2018] CPU physical address size: 39 bits [Mon Mar 19 09:42:04.859 2018] call enable_fixed_mtrr() [Mon Mar 19 09:42:04.859 2018] MTRR: default type WB/UC MTRR counts: 13/11. [Mon Mar 19 09:42:04.859 2018] MTRR: UC selected as default type. [Mon Mar 19 09:42:04.859 2018] CPU physical address size: 39 bits [Mon Mar 19 09:42:04.859 2018] MTRR: 0 base 0x0000000000000000 mask 0x0000007fc0000000 type 6 [Mon Mar 19 09:42:04.859 2018] MTRR: 1 base 0x0000000040000000 mask 0x0000007fe0000000 type 6 [Mon Mar 19 09:42:04.865 2018] MTRR: 2 base 0x0000000060000000 mask 0x0000007ff0000000 type 6 [Mon Mar 19 09:42:04.865 2018] MTRR: 3 base 0x0000000070000000 mask 0x0000007ff8000000 type 6 [Mon Mar 19 09:42:04.865 2018] MTRR: 4 base 0x0000000078000000 mask 0x0000007ffc000000 type 6 [Mon Mar 19 09:42:04.865 2018] MTRR: 5 base 0x000000007b800000 mask 0x0000007fff800000 type 0 [Mon Mar 19 09:42:04.865 2018] MTRR: 6 base 0x00000000ffe00000 mask 0x0000007fffe00000 type 5 [Mon Mar 19 09:42:04.865 2018] MTRR: 7 base 0x0000000100000000 mask 0x0000007f00000000 type 6 [Mon Mar 19 09:42:04.865 2018] Taking a reserved OS MTRR. [Mon Mar 19 09:42:04.865 2018] MTRR: 8 base 0x0000000200000000 mask 0x0000007e00000000 type 6 [Mon Mar 19 09:42:04.865 2018] Taking a reserved OS MTRR. [Mon Mar 19 09:42:04.865 2018] MTRR: 9 base 0x0000000400000000 mask 0x0000007f80000000 type 6 [Mon Mar 19 09:42:04.865 2018] Taking a reserved OS MTRR. [Mon Mar 19 09:42:04.865 2018] ERROR: Not enough MTRRs available! MTRR indexis 10 with 10 MTTRs in total. [Mon Mar 19 09:42:04.865 2018] Not enough MTRRs: 11 vs 10 [Mon Mar 19 09:42:04.865 2018] Unable to insert temporary MTRR range: 0x00000000ffe00000 - 0x0000000100000000 size 0x00200000 type 5 [Mon Mar 19 09:42:04.865 2018] [Mon Mar 19 09:42:04.865 2018] MTRR check [Mon Mar 19 09:42:04.865 2018] Fixed MTRRs : Enabled [Mon Mar 19 09:42:04.865 2018] Variable MTRRs: Enabled [Mon Mar 19 09:42:04.865 2018] [Mon Mar 19 09:42:04.865 2018] BS: BS_DEV_INIT times (us): entry 0 run 316979 exit 450461 [Mon Mar 19 09:42:04.865 2018] Finalize devices... [Mon Mar 19 09:42:04.865 2018] PCI: 00:17.0 final [Mon Mar 19 09:42:04.873 2018] Devices finalized [Mon Mar 19 09:42:04.873 2018] BS: BS_POST_DEVICE times (us): entry 0 run 5856 exit 0 [Mon Mar 19 09:42:04.873 2018] BS: BS_OS_RESUME_CHECK times (us): entry 0 run 4 exit 0 [Mon Mar 19 09:42:04.873 2018] CBFS: 'Master Header Locator' located CBFS at [e00100:ffffc0) [Mon Mar 19 09:42:04.873 2018] CBFS: Locating 'fallback/dsdt.aml' [Mon Mar 19 09:42:04.873 2018] CBFS: Found @ offset 108f40 size 3076 [Mon Mar 19 09:42:04.873 2018] CBFS: 'Master Header Locator' located CBFS at [e00100:ffffc0) [Mon Mar 19 09:42:04.873 2018] CBFS: Locating 'fallback/slic' [Mon Mar 19 09:42:04.873 2018] CBFS: 'fallback/slic' not found. [Mon Mar 19 09:42:04.873 2018] ACPI: Writing ACPI tables at 7aab0000. [Mon Mar 19 09:42:04.873 2018] ACPI: * FACS [Mon Mar 19 09:42:04.873 2018] ACPI: * DSDT [Mon Mar 19 09:42:04.873 2018] SGX: not enabled or not supported. skip gnvs fill [Mon Mar 19 09:42:04.873 2018] ACPI: * FADT [Mon Mar 19 09:42:04.873 2018] SCI is IRQ9 [Mon Mar 19 09:42:04.873 2018] ACPI: added table 1/32, length now 40 [Mon Mar 19 09:42:04.873 2018] ACPI: * SSDT [Mon Mar 19 09:42:04.873 2018] Found 1 CPU(s) with 4 core(s) each. [Mon Mar 19 09:42:04.873 2018] ACPI: added table 2/32, length now 44 [Mon Mar 19 09:42:04.873 2018] ACPI: * MCFG [Mon Mar 19 09:42:04.873 2018] ACPI: added table 3/32, length now 48 [Mon Mar 19 09:42:04.873 2018] ACPI: * TCPA [Mon Mar 19 09:42:04.873 2018] TCPA log created at 7aa9f000 [Mon Mar 19 09:42:04.873 2018] ACPI: added table 4/32, length now 52 [Mon Mar 19 09:42:04.873 2018] ACPI: * MADT [Mon Mar 19 09:42:04.873 2018] SCI is IRQ9 [Mon Mar 19 09:42:04.873 2018] ACPI: added table 5/32, length now 56 [Mon Mar 19 09:42:04.873 2018] current = 7aab39e0 [Mon Mar 19 09:42:04.873 2018] ACPI: * IGD OpRegion [Mon Mar 19 09:42:04.873 2018] CBFS: 'Master Header Locator' located CBFS at [e00100:ffffc0) [Mon Mar 19 09:42:04.873 2018] CBFS: Locating 'vbt.bin' [Mon Mar 19 09:42:04.881 2018] CBFS: Found @ offset f3f00 size 10d0 [Mon Mar 19 09:42:04.881 2018] current = 7aab59e0 [Mon Mar 19 09:42:04.881 2018] ACPI: added table 6/32, length now 60 [Mon Mar 19 09:42:04.881 2018] ACPI: * HPET [Mon Mar 19 09:42:04.881 2018] ACPI: added table 7/32, length now 64 [Mon Mar 19 09:42:04.881 2018] ACPI: done. [Mon Mar 19 09:42:04.881 2018] ACPI tables: 23184 bytes. [Mon Mar 19 09:42:04.881 2018] smbios_write_tables: 7aa9e000 [Mon Mar 19 09:42:04.881 2018] Create SMBIOS type 17 [Mon Mar 19 09:42:04.881 2018] Root Device () [Mon Mar 19 09:42:04.881 2018] CPU_CLUSTER: 0 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] APIC: 00 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] DOMAIN: 0000 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:00.0 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:02.0 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:14.0 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:14.1 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:14.2 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:15.0 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:15.1 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:15.2 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:15.3 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:16.0 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:16.1 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:16.2 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:16.3 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:16.4 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:17.0 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:19.0 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:19.1 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:19.2 (Intel 6th Gen) [Mon Mar 19 09:42:04.881 2018] PCI: 00:1c.0 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1c.1 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1c.2 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1c.3 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1c.4 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1c.5 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1c.6 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1c.7 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1d.0 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1d.1 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1d.2 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1d.3 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1e.0 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1e.1 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1e.2 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1e.3 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1e.4 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1e.5 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1e.6 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1f.0 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1f.1 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1f.2 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1f.3 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1f.4 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1f.5 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] PCI: 00:1f.6 (Intel 6th Gen) [Mon Mar 19 09:42:05.195 2018] APIC: 02 (unknown) [Mon Mar 19 09:42:05.195 2018] APIC: 01 (unknown) [Mon Mar 19 09:42:05.195 2018] APIC: 03 (unknown) [Mon Mar 19 09:42:05.195 2018] PCI: 00:04.0 (unknown) [Mon Mar 19 09:42:05.195 2018] PCI: 00:08.0 (unknown) [Mon Mar 19 09:42:05.195 2018] PCI: 01:00.0 (unknown) [Mon Mar 19 09:42:05.195 2018] SMBIOS tables: 345 bytes. [Mon Mar 19 09:42:05.195 2018] Writing table forward entry at 0x00000500 [Mon Mar 19 09:42:05.195 2018] Wrote coreboot table at: 00000500, 0x10 bytes, checksum 4531 [Mon Mar 19 09:42:05.202 2018] Writing coreboot table at 0x7aad4000 [Mon Mar 19 09:42:05.203 2018] 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES [Mon Mar 19 09:42:05.203 2018] 1. 0000000000001000-000000000009ffff: RAM [Mon Mar 19 09:42:05.203 2018] 2. 00000000000a0000-00000000000fffff: RESERVED [Mon Mar 19 09:42:05.203 2018] 3. 0000000000100000-000000007aa9dfff: RAM [Mon Mar 19 09:42:05.203 2018] 4. 000000007aa9e000-000000007affefff: CONFIGURATION TABLES [Mon Mar 19 09:42:05.203 2018] 5. 000000007afff000-000000007fffffff: RESERVED [Mon Mar 19 09:42:05.203 2018] 6. 00000000e0000000-00000000e3ffffff: RESERVED [Mon Mar 19 09:42:05.203 2018] 7. 00000000fe000000-00000000fe00ffff: RESERVED [Mon Mar 19 09:42:05.203 2018] 8. 00000000fed10000-00000000fed19fff: RESERVED [Mon Mar 19 09:42:05.203 2018] 9. 00000000fed80000-00000000fed84fff: RESERVED [Mon Mar 19 09:42:05.203 2018] 10. 0000000100000000-000000047effffff: RAM [Mon Mar 19 09:42:05.203 2018] CBFS: 'Master Header Locator' located CBFS at [e00100:ffffc0) [Mon Mar 19 09:42:05.203 2018] Wrote coreboot table at: 7aad4000, 0x3fc bytes, checksum a5fc [Mon Mar 19 09:42:05.203 2018] coreboot table: 1044 bytes. [Mon Mar 19 09:42:05.203 2018] IMD ROOT 0. 7affe000 00001000 [Mon Mar 19 09:42:05.203 2018] IMD SMALL 1. 7affd000 00001000 [Mon Mar 19 09:42:05.203 2018] FSP MEMORY 2. 7abfd000 00400000 [Mon Mar 19 09:42:05.203 2018] CONSOLE 3. 7abdd000 00020000 [Mon Mar 19 09:42:05.203 2018] TIME STAMP 4. 7abdc000 00000400 [Mon Mar 19 09:42:05.203 2018] MRC DATA 5. 7abda000 00001878 [Mon Mar 19 09:42:05.203 2018] ROMSTG STCK 6. 7abd9000 00000400 [Mon Mar 19 09:42:05.203 2018] AFTER CAR 7. 7abd0000 00009000 [Mon Mar 19 09:42:05.210 2018] RAMSTAGE 8. 7ab1a000 000b6000 [Mon Mar 19 09:42:05.210 2018] REFCODE 9. 7aaec000 0002e000 [Mon Mar 19 09:42:05.210 2018] SMM BACKUP 10. 7aadc000 00010000 [Mon Mar 19 09:42:05.210 2018] COREBOOT 11. 7aad4000 00008000 [Mon Mar 19 09:42:05.210 2018] ACPI 12. 7aab0000 00024000 [Mon Mar 19 09:42:05.210 2018] ACPI GNVS 13. 7aaaf000 00001000 [Mon Mar 19 09:42:05.210 2018] TCPA LOG 14. 7aa9f000 00010000 [Mon Mar 19 09:42:05.210 2018] SMBIOS 15. 7aa9e000 00000800 [Mon Mar 19 09:42:05.210 2018] IMD small region: [Mon Mar 19 09:42:05.210 2018] IMD ROOT 0. 7affdc00 00000400 [Mon Mar 19 09:42:05.210 2018] FSP RUNTIME 1. 7affdbe0 00000004 [Mon Mar 19 09:42:05.210 2018] POWER STATE 2. 7affdba0 00000040 [Mon Mar 19 09:42:05.210 2018] ROMSTAGE 3. 7affdb80 00000004 [Mon Mar 19 09:42:05.210 2018] MEM INFO 4. 7affda20 00000141 [Mon Mar 19 09:42:05.210 2018] GNVS PTR 5. 7affda00 00000004 [Mon Mar 19 09:42:05.210 2018] COREBOOTFWD 6. 7affd9c0 00000028 [Mon Mar 19 09:42:05.210 2018] BS: BS_WRITE_TABLES times (us): entry 0 run 437168 exit 0 [Mon Mar 19 09:42:05.210 2018] CBFS: 'Master Header Locator' located CBFS at [e00100:ffffc0) [Mon Mar 19 09:42:05.210 2018] CBFS: Locating 'fallback/payload' [Mon Mar 19 09:42:05.210 2018] CBFS: Found @ offset 10c000 size 1072a [Mon Mar 19 09:42:05.210 2018] Loading segment from ROM address 0xfff0c138 [Mon Mar 19 09:42:05.210 2018] code (compression=1) [Mon Mar 19 09:42:05.210 2018] New segment dstaddr 0xe0b40 memsize 0x1f4c0 srcaddr 0xfff0c170 filesize 0x106f2 [Mon Mar 19 09:42:05.210 2018] Loading segment from ROM address 0xfff0c154 [Mon Mar 19 09:42:05.210 2018] Entry Point 0x000fec22 [Mon Mar 19 09:42:05.210 2018] Payload being loaded at below 1MiB without region being marked as RAM usable. [Mon Mar 19 09:42:05.213 2018] Loading Segment: addr: 0x00000000000e0b40 memsz: 0x000000000001f4c0 filesz: 0x00000000000106f2 [Mon Mar 19 09:42:05.213 2018] lb: [0x000000007ab1b000, 0x000000007abcf830) [Mon Mar 19 09:42:05.213 2018] Post relocation: addr: 0x00000000000e0b40 memsz: 0x000000000001f4c0 filesz: 0x00000000000106f2 [Mon Mar 19 09:42:05.213 2018] using LZMA [Mon Mar 19 09:42:05.221 2018] [ 0x000e0b40, 00100000, 0x00100000) <- fff0c170 [Mon Mar 19 09:42:05.256 2018] dest 000e0b40, end 00100000, bouncebuffer ffffffff [Mon Mar 19 09:42:05.256 2018] Loaded segments [Mon Mar 19 09:42:05.256 2018] 0x00000040: notify_params->phase [Mon Mar 19 09:42:05.256 2018] Calling FspNotify: 0x7aaec1c0 [Mon Mar 19 09:42:05.256 2018] 0x7ab49f6c: notify_params > -----Original Message----- > From: Aaron Durbin [mailto:adurbin@google.com] > Sent: Saturday, March 17, 2018 2:50 PM > To: Jay Talbott > Cc: Coreboot > Subject: Re: [coreboot] Out of MTRRs > > Please post the full logs so we can see the address space. The 'Unable > to insert temporary MTRR range' log message is only for tempoarility > mapping the SPI flash. However, it's impossible to debug w/o the full > logs to see what your address space looks like. > > On Sat, Mar 17, 2018 at 12:28 PM, Jay Talbott > < <mailto:JayTalbott@sysproconsulting.com> JayTalbott(a)sysproconsulting.com> wrote: > > I’m working on a coreboot solution for a SkyLake based board that uses > > SO-DIMMs. > > > > > > > > The plan is for two 8GB DIMMs, for a total of 16GB of RAM. > > > > > > > > But with two 8GB DIMMs installed, I get the following during the boot: > > > > > > > > Taking a reserved OS MTRR. > > > > Taking a reserved OS MTRR. > > > > Taking a reserved OS MTRR. > > > > ERROR: Not enough MTRRs available! MTRR indexis 10 with 10 MTTRs in > total. > > > > Not enough MTRRs: 11 vs 10 > > > > Unable to insert temporary MTRR range: 0x00000000ff800000 - > > 0x0000000100000000 size 0x00800000 type 5 > > > > > > > > This is obviously a problem… > > > > > > > > If I remove one DIMM, then I just get: > > > > > > > > Taking a reserved OS MTRR. > > > > Taking a reserved OS MTRR. > > > > > > > > Still an issue, although at least we don’t run out of MTRRs. > > > > > > > > If I use a single 4GB DIMM instead of an 8GB DIMM, there’s no issue with > the > > MTRR config at all. > > > > > > > > I’m assuming that I’m not the first person to run into this when using > > coreboot on systems with larger amounts of RAM, so I figured I’d ask the > > community what’s the fix to getting this to work correctly with 16GB of > RAM > > before trying to figure it out myself. > > > > > > > > Any help would be most appreciated. > > > > > > > > Thanks, > > > > > > > > - Jay > > > > > > > > Jay Talbott > > Principal Consulting Engineer > > SysPro Consulting, LLC > > 3057 E. Muirfield St. > > Gilbert, AZ 85298 > > (480) 704-8045 > > (480) 445-9895 (FAX) > > <mailto:JayTalbott@sysproconsulting.com> JayTalbott(a)sysproconsulting.com > > > > <http://www.sysproconsulting.com> http://www.sysproconsulting.com > > > > > > > > > > -- > > coreboot mailing list: <mailto:coreboot@coreboot.org> coreboot(a)coreboot.org > > <https://mail.coreboot.org/mailman/listinfo/coreboot> https://mail.coreboot.org/mailman/listinfo/coreboot

2 1

only 8GB RAM on ThinkPad X230 after commit 7539b8c3
by Marek Behun 19 Mar '18

19 Mar '18

Hello, with the commit 7539b8c3 "nb/intel/sandybridge: Use common mrc cache functions" I only have accessible 8 GB of ram on ThinkPad X230, although I have two 8 GB modules. On the previous commit whole 16 GB is visible. Marek

3 2

Out of MTRRs
by Jay Talbott 17 Mar '18

17 Mar '18

I'm working on a coreboot solution for a SkyLake based board that uses SO-DIMMs. The plan is for two 8GB DIMMs, for a total of 16GB of RAM. But with two 8GB DIMMs installed, I get the following during the boot: Taking a reserved OS MTRR. Taking a reserved OS MTRR. Taking a reserved OS MTRR. ERROR: Not enough MTRRs available! MTRR indexis 10 with 10 MTTRs in total. Not enough MTRRs: 11 vs 10 Unable to insert temporary MTRR range: 0x00000000ff800000 - 0x0000000100000000 size 0x00800000 type 5 This is obviously a problem. If I remove one DIMM, then I just get: Taking a reserved OS MTRR. Taking a reserved OS MTRR. Still an issue, although at least we don't run out of MTRRs. If I use a single 4GB DIMM instead of an 8GB DIMM, there's no issue with the MTRR config at all. I'm assuming that I'm not the first person to run into this when using coreboot on systems with larger amounts of RAM, so I figured I'd ask the community what's the fix to getting this to work correctly with 16GB of RAM before trying to figure it out myself. Any help would be most appreciated. Thanks, - Jay Jay Talbott Principal Consulting Engineer SysPro Consulting, LLC 3057 E. Muirfield St. Gilbert, AZ 85298 (480) 704-8045 (480) 445-9895 (FAX) <mailto:JayTalbott@sysproconsulting.com> JayTalbott(a)sysproconsulting.com <http://www.sysproconsulting.com/> http://www.sysproconsulting.com

2 1

Re: [coreboot] Gigabyte MB to Test
by Nico Huber 17 Mar '18

17 Mar '18

Hi Jeff, On 15.03.2018 04:45, Jeff Ausfeld wrote: > Hi Coreboot Team, > > I have several of the following boards, and it badly needs a Bios overhaul > as I'm trying to get a Compex card or pretty much any Qualcomm chip to > properly enumerate. TLDR; it's probably cheaper to contract Gigabyte to fix their firmware. > > # dmidecode 3.0 > Getting SMBIOS data from sysfs. > SMBIOS 3.0.0 present. > > Handle 0x0002, DMI type 2, 15 bytes > Base Board Information > Manufacturer: GIGABYTE > Product Name: MDH11HI-SI Just had a look at a related board (MDH11HI rev. 1.0) at Gigabyte's web page [1]. Seems quite nice. Though, for a full coreboot port, you have to expect a huge amount of work (probably minimum two weeks for an expe- rienced coreboot dev, if you are very lucky, for something somehow usable; full port of all the board's functions takes much longer). > Version: 1.x > Serial Number: Default string > Asset Tag: Default string > Features: > Board is a hosting board > Board is replaceable > Location In Chassis: Default string > Chassis Handle: 0x0003 > Type: Motherboard > Contained Object Handles: 0 > > I did upgrade the BIOS from the shipped V5 to V9. It made little > difference. > > I can setup whatever access you need, and nothing to worry about breaking. > Let's have some fun. You'd likely have to do the port yourself or pay somebody for it. You can expect much help if you try to do it by yourself, but it won't be easy. Especially retrofitting coreboot to a board without documentation (unless you have a very good contact to Gigabyte you won't get the nee- ded information) is quite hard and gets harder with every new platform. The chipset H110 (Sunrise Point-H) and processor Skylake/Kabylake are supported in coreboot through a blob by Intel (FSP). Most of the work goes into configuring that blob. Alas, the blob's options (> 700) are not really documented and we neither know how to get all the infor- mation out of a running system. So, not the best platform to start coreboot development with :-/ First step when you want to port coreboot is a reliable flashing and debugging (console log) setup. The board seems to have a serial (RS232) header, that's a plus for the log. On the few pictures on that web page, I couldn't spot a flash chip. Maybe it's on the back? During development you need a way to flash the firmware with an external programmer (it won't boot to an OS any more). Possible solutions depend on the flash chip (I personally prefer wires soldered to its legs, if it has any)... Nico [1] http://b2b.gigabyte.com/Embedded-Computing/MDH11HI-rev-10

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coreboot-checkpath ?
by mturney＠codeaurora.org 16 Mar '18

16 Mar '18

Folks, I have a number of patches failing build-bot step with an indication that coreboot-checkpath should be run. How do I run this check locally? Is this installed as part of 'make gitconfig' which I can't run on my older git install? Can I download this script(?) Any suggestions on how best to clear coreboot-checkpath on my patches is appreciated. Cheers, T.mike

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Re: [coreboot] Gigabyte MB to Test
by Jeff Ausfeld 16 Mar '18

16 Mar '18

Hi Ron, Yes, it runs UEFI (barely) and is currently configured to do what it can. 00:00.0 Host bridge: Intel Corporation Sky Lake Host Bridge/DRAM Registers (rev 07) 00: 86 80 0f 19 06 00 90 20 07 00 00 06 00 00 00 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 00 10 30: 00 00 00 00 e0 00 00 00 00 00 00 00 00 00 00 00 40: 01 90 d1 fe 00 00 00 00 01 00 d1 fe 00 00 00 00 50: c1 02 00 00 31 80 00 00 47 00 f0 8f 01 00 00 8b 60: 01 00 00 e0 00 00 00 00 01 80 d1 fe 00 00 00 00 70: 00 00 00 ff 03 00 00 00 00 0c 00 ff 7f 00 00 00 80: 01 00 00 00 00 00 00 00 1a 00 00 00 00 00 00 00 90: 01 00 00 ff 03 00 00 00 01 00 f0 6e 04 00 00 00 a0: 01 00 00 00 04 00 00 00 01 00 00 6f 04 00 00 00 b0: 01 00 00 8c 01 00 80 8b 01 00 00 8b 01 00 00 90 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 09 00 10 01 71 66 01 62 d8 00 04 84 00 40 07 00 f0: 00 00 00 00 c8 0f 03 00 00 00 00 00 00 00 00 00 00:02.0 VGA compatible controller: Intel Corporation Device 1902 (rev 06) 00: 86 80 02 19 07 04 10 00 06 00 00 03 10 00 00 00 10: 04 00 00 de 00 00 00 00 0c 00 00 c0 00 00 00 00 20: 01 f0 00 00 00 00 00 00 00 00 00 00 58 14 00 10 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00 40: 09 70 0c 01 71 66 01 62 d8 00 04 84 00 00 00 00 50: c1 02 00 00 31 80 00 00 00 00 00 00 01 00 00 8c 60: 00 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 10 ac 92 00 00 80 00 10 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 05 d0 01 00 b0: 18 00 e0 fe 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 00 22 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 01 00 00 00 00 80 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 18 e0 a8 8a 00:08.0 System peripheral: Intel Corporation Sky Lake Gaussian Mixture Model 00: 86 80 11 19 00 00 10 00 00 00 80 08 10 00 00 00 10: 04 f0 32 df 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 00 10 30: 00 00 00 00 90 00 00 00 00 00 00 00 ff 01 00 00 40: ff 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 05 dc 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 01 f0 02 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 13 00 06 03 00 00 00 00 00 00 00 00 00 00 00 00 00:14.0 USB controller: Intel Corporation Sunrise Point-H USB 3.0 xHCI Controller (rev 31) 00: 86 80 2f a1 06 04 90 02 31 30 03 0c 00 00 80 00 10: 04 00 31 df 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 00 10 30: 00 00 00 00 70 00 00 00 00 00 00 00 ff 01 00 00 40: fd 01 34 80 88 c6 0f 80 00 00 00 00 00 00 00 00 50: 5b 6e ce 0f 00 00 00 00 00 00 00 00 00 00 00 00 60: 30 60 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 01 80 c2 c1 08 00 00 00 00 00 00 00 00 00 00 00 80: 05 00 87 00 78 02 e0 fe 00 00 00 00 00 00 00 00 90: 09 00 14 f0 10 00 40 01 00 00 00 00 c1 0a 08 00 a0: 00 08 00 00 00 18 00 00 8f 40 02 00 00 01 04 00 b0: c0 c0 00 00 30 00 00 00 00 03 00 00 00 00 00 00 c0: 0c 00 00 00 03 00 00 00 00 00 00 00 00 00 00 00 d0: 18 00 00 00 06 00 00 00 c0 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00 00:14.2 Signal processing controller: Intel Corporation Sunrise Point-H Thermal subsystem (rev 31) 00: 86 80 31 a1 02 00 10 00 31 00 80 11 00 00 00 00 10: 04 e0 32 df 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 00 10 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 03 00 00 40: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 80 23 00 08 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00 00:16.0 Communication controller: Intel Corporation Sunrise Point-H CSME HECI #1 (rev 31) 00: 86 80 3a a1 06 04 10 00 31 00 80 07 00 00 80 00 10: 04 d0 32 df 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 00 10 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 40: 55 02 00 90 10 00 01 80 06 03 11 86 00 00 00 00 50: 01 8c 03 40 08 00 00 00 00 00 00 00 00 00 00 00 60: 20 04 00 00 00 40 08 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 05 00 81 00 90: f8 02 e0 fe 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00 00:17.0 SATA controller: Intel Corporation Sunrise Point-H SATA controller [AHCI mode] (rev 31) 00: 86 80 02 a1 07 04 b0 02 31 01 06 01 00 00 00 00 10: 00 80 32 df 00 c0 32 df 91 f0 00 00 81 f0 00 00 20: 61 f0 00 00 00 b0 32 df 00 00 00 00 58 14 00 10 30: 00 00 00 00 80 00 00 00 00 00 00 00 ff 01 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00 80: 05 70 01 00 98 02 e0 fe 00 00 00 00 00 00 00 00 90: 00 00 f7 00 08 00 08 00 00 00 00 00 30 00 00 80 a0: 3c 00 00 00 00 00 00 00 12 00 10 00 48 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 11 00 00 00 00 00 00 00 01 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00 00:1d.0 PCI bridge: Intel Corporation Sunrise Point-H PCI Express Root Port #9 (rev f1) 00: 86 80 18 a1 07 04 10 00 f1 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 01 01 00 f0 00 00 20 20: 00 df 10 df f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 10 00 40: 10 80 42 01 01 80 00 00 2f 00 10 00 12 40 72 09 50: 40 00 11 70 00 b2 64 00 00 00 40 01 08 00 00 00 60: 00 00 00 00 37 08 00 00 00 04 00 00 06 00 00 00 70: 02 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 01 00 18 02 e0 fe 00 00 00 00 00 00 00 00 90: 0d a0 00 00 58 14 00 10 00 00 00 00 00 00 00 00 a0: 01 00 03 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 11 10 00 07 42 18 00 00 08 00 9e 09 00 00 00 00 e0: 00 f7 f3 00 60 8c 00 00 16 80 12 00 00 00 00 00 f0: 50 01 00 00 00 03 00 40 b3 0f 33 08 00 00 00 01 00:1d.1 PCI bridge: Intel Corporation Sunrise Point-H PCI Express Root Port #10 (rev f1) 00: 86 80 19 a1 07 04 10 00 f1 00 04 06 10 00 81 00 10: 00 00 00 00 00 00 00 00 00 02 02 00 e0 e0 00 20 20: 20 df 20 df f1 ff 01 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 02 10 00 40: 10 80 42 01 01 80 00 00 0f 00 10 00 12 40 72 0a 50: 40 00 11 70 00 b2 6c 00 00 00 40 01 08 00 00 00 60: 00 00 00 00 37 08 00 00 00 04 00 00 06 00 00 00 70: 02 00 01 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 05 90 01 00 58 02 e0 fe 00 00 00 00 00 00 00 00 90: 0d a0 00 00 58 14 00 10 00 00 00 00 00 00 00 00 a0: 01 00 03 c8 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 01 10 00 07 42 18 00 00 08 00 9e 09 00 00 00 00 e0: 00 03 e3 00 00 00 00 00 06 00 10 00 00 00 00 00 f0: 50 01 00 00 00 00 00 4c b3 0f 33 08 00 00 00 02 00:1f.0 ISA bridge: Intel Corporation Sunrise Point-H LPC Controller (rev 31) 00: 86 80 43 a1 07 00 00 02 31 00 01 06 00 00 80 00 10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 00 10 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 d0 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 70 00 03 14 01 02 fc 00 01 0a 3c 00 e1 03 0c 00 90: e1 02 1c 00 00 05 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 33 22 11 00 67 45 00 00 cf ff 00 00 a2 00 00 00 e0: c0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00 00:1f.2 Memory controller: Intel Corporation Sunrise Point-H PMC (rev 31) 00: 86 80 21 a1 00 00 00 00 31 00 80 05 00 00 80 00 10: 00 40 32 df 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 58 14 00 10 30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 40: 01 18 00 00 80 01 00 00 00 00 00 fe 00 00 00 00 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: f0 36 a0 d8 09 3a 06 00 00 46 00 00 00 00 00 01 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00 00:1f.3 Audio device: Intel Corporation Sunrise Point-H HD Audio (rev 31) 00: 86 80 70 a1 06 04 10 00 31 00 03 04 10 20 00 00 10: 04 00 32 df 00 00 00 00 00 00 00 00 00 00 00 00 20: 04 00 30 df 00 00 00 00 00 00 00 00 58 14 10 fa 30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 40: 00 00 00 00 00 00 00 00 ff 0d 3b 80 00 00 00 00 50: 01 60 43 c0 08 00 00 00 00 00 00 00 00 00 00 00 60: 05 00 81 00 18 03 e0 fe 00 00 00 00 00 00 00 00 70: 10 00 91 00 00 00 00 10 00 20 10 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 08 06 02 00 00 70 80 04 00 0c a5 82 10 00 03 00 d0: 00 0c b5 02 10 00 03 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00 00:1f.4 SMBus: Intel Corporation Sunrise Point-H SMBus (rev 31) 00: 86 80 23 a1 03 00 80 02 31 00 05 0c 00 00 00 00 10: 04 a0 32 df 00 00 00 00 00 00 00 00 00 00 00 00 20: 41 f0 00 00 00 00 00 00 00 00 00 00 58 14 00 10 30: 00 00 00 00 00 00 00 00 00 00 00 00 ff 01 00 00 40: 11 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50: 01 04 00 00 00 01 00 00 00 00 00 00 00 00 00 00 60: 04 05 05 00 00 00 0a 0a 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 24 00 04 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 b3 0f 33 08 00 00 00 00 01:00.0 Network controller: Qualcomm Atheros QCA6174 802.11ac Wireless Network Adapter (rev 32) 00: 8c 16 3e 00 06 04 10 00 32 00 80 02 10 00 00 00 10: 04 00 00 df 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 56 1a 35 15 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00 40: 01 50 c3 c9 00 00 00 00 00 00 00 00 00 00 00 00 50: 05 70 07 01 38 03 e0 fe 00 00 00 00 fe 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 10 00 02 00 c1 8d 90 05 30 20 10 00 11 6c 47 00 80: 40 01 11 10 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 10 08 04 00 00 04 00 00 02 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 02:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller (rev 15) 00: ec 10 68 81 07 04 10 00 15 00 00 02 10 00 00 00 10: 01 e0 00 00 00 00 00 00 04 40 20 df 00 00 00 00 20: 04 00 20 df 00 00 00 00 00 00 00 00 58 14 00 e0 30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00 40: 01 50 c3 ff 08 00 00 00 00 00 00 00 00 00 00 00 50: 05 70 81 00 b8 02 e0 fe 00 00 00 00 00 00 00 00 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 10 b0 02 02 c0 8c 90 05 10 50 19 00 11 7c 47 00 80: 40 00 11 10 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 1f 08 0c 00 00 04 00 00 02 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 11 00 03 00 04 00 00 00 04 08 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Is there a good starting point? I compiled coreboot per the instructions as well as qemu. Regards with thanks, Jeff. On Thu, Mar 15, 2018 at 6:37 PM, ron minnich <rminnich(a)gmail.com> wrote: > we need a bit more than that ... lspci and lspci -xxx and does this thing > run UEFI? > > On Thu, Mar 15, 2018 at 3:34 PM Jeff Ausfeld <jeff(a)polyinnovations.com> > wrote: > >> Hi Coreboot Team, >> >> I have several of the following boards, and it badly needs a Bios >> overhaul as I'm trying to get a Compex card or pretty much any Qualcomm >> chip to properly enumerate. >> >> # dmidecode 3.0 >> Getting SMBIOS data from sysfs. >> SMBIOS 3.0.0 present. >> >> Handle 0x0002, DMI type 2, 15 bytes >> Base Board Information >> Manufacturer: GIGABYTE >> Product Name: MDH11HI-SI >> Version: 1.x >> Serial Number: Default string >> Asset Tag: Default string >> Features: >> Board is a hosting board >> Board is replaceable >> Location In Chassis: Default string >> Chassis Handle: 0x0003 >> Type: Motherboard >> Contained Object Handles: 0 >> >> I did upgrade the BIOS from the shipped V5 to V9. It made little >> difference. >> >> I can setup whatever access you need, and nothing to worry about >> breaking. Let's have some fun. >> >> Regards, >> Jeff. >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://mail.coreboot.org/mailman/listinfo/coreboot > >

1 0

Re: [coreboot] Gigabyte MB to Test
by ron minnich 15 Mar '18

15 Mar '18

we need a bit more than that ... lspci and lspci -xxx and does this thing run UEFI? On Thu, Mar 15, 2018 at 3:34 PM Jeff Ausfeld <jeff(a)polyinnovations.com> wrote: > Hi Coreboot Team, > > I have several of the following boards, and it badly needs a Bios overhaul > as I'm trying to get a Compex card or pretty much any Qualcomm chip to > properly enumerate. > > # dmidecode 3.0 > Getting SMBIOS data from sysfs. > SMBIOS 3.0.0 present. > > Handle 0x0002, DMI type 2, 15 bytes > Base Board Information > Manufacturer: GIGABYTE > Product Name: MDH11HI-SI > Version: 1.x > Serial Number: Default string > Asset Tag: Default string > Features: > Board is a hosting board > Board is replaceable > Location In Chassis: Default string > Chassis Handle: 0x0003 > Type: Motherboard > Contained Object Handles: 0 > > I did upgrade the BIOS from the shipped V5 to V9. It made little > difference. > > I can setup whatever access you need, and nothing to worry about > breaking. Let's have some fun. > > Regards, > Jeff. > -- > coreboot mailing list: coreboot(a)coreboot.org > https://mail.coreboot.org/mailman/listinfo/coreboot

1 0

Re: [coreboot] Real name policy
by Taiidan＠gmx.com 15 Mar '18

15 Mar '18

A lot of people whos opinions I respect have commented on this and I thank them for their time but that being said I still don't understand how a "real" name policy helps avoid problems, it isn't as if the coreboot leadership meets someone in real life and asks them to present a passport which is then verified by a handy federal officer. I wish to correct a few small bugs but at the same time I don't want to provide my name, what should I do? (C) Taiidan 2018 all rights reserved? IANAL but I don't see that as any different from an unverified name.

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