coreboot October 2018

coreboot@coreboot.org
  • 53 participants
  • 145 discussions

Change superio in "Bayley Bay FSP-based CRB"
by Zvi Vered
3 years

Re: [coreboot] Bootblock CMOS default and the checksum algo
by William McCall
3 years

Re: [coreboot] Bootblock CMOS default and the checksum algo
by Lance Zhao
3 years

Re: [coreboot] lower memory performance with coreboot on KGPE-D16
by Daniel Kulesz
3 years

Bootblock CMOS default and the checksum algo
by William McCall
3 years

Re: [coreboot] Source code for "Intel Firmware"
by Andrew Luke Nesbit
3 years

Re: [coreboot] Source code for "Intel Firmware"
by Andrew Luke Nesbit
3 years

current state of board/f2a85m
by kinky_nekoboi
3 years

Re: [coreboot] Source code for "Intel Firmware"
by Nico Huber
3 years

Re: [coreboot] Source code for "Intel Firmware"
by ron minnich
3 years
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