coreboot February 2017

coreboot@coreboot.org

66 participants
212 discussions

Re: [coreboot] GRUB2 compilation failure
by Zoran Stojsavljevic 01 Feb '17

01 Feb '17

Hello Rag, I'll try shot in The Absolute Dark. I have inspected your log. And strange things cot my eye. Here: *./autogen.sh* Importing unicode... Importing libgcrypt... WARNING: grub-core/lib/libgcrypt-grub already exists WARNING: grub-core/lib/libgcrypt-grub/cipher already exists WARNING: grub-core/lib/libgcrypt-grub/mpi already exists WARNING: grub-core/lib/libgcrypt-grub/src already exists *Generating Automake input...* *Saving timestamps...* *Running autoreconf...* *cd grub2/build && ../configure BUILD_CC="" CC="" \* *TARGET_CC="cc" \* *TARGET_OBJCOPY="" TARGET_STRIP="" CFLAGS=-O2 TARGET_CFLAGS=-Os --with-platform=coreboot* *checking build system type... x86_64-pc-linux-gnu* *checking host system type... x86_64-pc-linux-gnu* *checking target system type... x86_64-pc-linux-gnu* *checking for a BSD-compatible install... /usr/bin/install -c* checking whether build environment is sane... yes checking for a thread-safe mkdir -p... /bin/mkdir -p [snap] config.status: creating config.h config.status: creating config-util.h *config.status: linking ../include/grub/i386 to include/grub/cpu* *config.status: linking ../include/grub/i386/coreboot to include/grub/machine* config.status: executing depfiles commands config.status: executing po-directories commands config.status: creating po/POTFILES config.status: creating po/Makefile ******************************************************* GRUB2 will be compiled with following components: Platform: i386-coreboot With devmapper support: No (need libdevmapper header) _______ So, target system is 64bit. Build system (tools) is configured as 64bit. Target system is 64bit. So, seems configuration is 64 bit... Should GRUB2 be build for 64bit platform? Not sure if here it is meant to be build as 32bit, according Coreboot, which is always 32bit??? _______ No idea, but something seems fishy in your environment setup. :-( Zoran On Wed, Feb 1, 2017 at 11:50 AM, chitgope raghuveer <raghurampage(a)gmail.com> wrote: > Hello Zoran, > > I could be sure I havent used YOCTO. I have attached the complete log for > the compilation. > The output for $git describe is *"**4.5-897-gdcad289".* > > On Wed, Feb 1, 2017 at 12:19 PM, Zoran Stojsavljevic < > zoran.stojsavljevic(a)gmail.com> wrote: > >> Hello Rag, >> >> Not sure what you are trying to do here? >> >> Did you compile using YOCTO (Makefile:1375: *recipe* for target >> 'argp-ba.o' failed)? >> >> Or some other Linux distro? Please, we need here Linux distro with more >> info and at least 200 lines of compilation log. >> >> Did you compile Coreboot source? Which version (please, execute $ git >> describe in Coreboot root)?! >> >> Thank you, >> Zoran >> >> On Wed, Feb 1, 2017 at 5:10 AM, chitgope raghuveer < >> raghurampage(a)gmail.com> wrote: >> >>> Hello, >>> >>> I am facing a compilation issue with GRUB2. Below is the snippet. >>> >>> mv -f $depbase.Tpo $depbase.Po >>> /bin/bash: line 1: -DHAVE_CONFIG_H: command not found >>> Makefile:1375: recipe for target 'argp-ba.o' failed >>> make[5]: *** [argp-ba.o] Error 127 >>> >>> >>> -- >>> Raghuveer Chitgope. >>> >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> https://www.coreboot.org/mailman/listinfo/coreboot >>> >> >> > > > -- > Raghuveer Chitgope. >

1 0

Re: [coreboot] Back to original BIOS
by Michal Widlok 01 Feb '17

01 Feb '17

Thank You for quick reply. Ron - I've lost original bios, my mistake. I hoped nobody would ask and spare me saying "I'm a moron" :-). Zoran - This is TYPE 2767-2MG S/N R80DCTZ6 09/09. The one with "switchable graphics" (Intel and Ati) onboard. Is any more info required? Anyway since lenovo provides single update for every T400 model then it might not matter - or I am very wrong. Michael Widlok On Wed, Feb 1, 2017 at 9:20 PM, Zoran Stojsavljevic <zoran.stojsavljevic(a)gmail.com> wrote: > Hello Ron, > > No worries. I'll try to find the original BIOS for Michael, if Michael gives > me exact model of Lenovo T400. > > Don't you agree? ;-) > > Zoran > > On Wed, Feb 1, 2017 at 8:41 PM, ron minnich <rminnich(a)gmail.com> wrote: >> >> did you save the bios before you flashed it? >> >> On Wed, Feb 1, 2017 at 11:11 AM Michal Widlok <michalwd1979(a)gmail.com> >> wrote: >>> >>> Hello, >>> >>> Is it possible to flash back original BIOS from coreboot system on >>> lenovo T400? I would like to play with tp_smapi module (battery checks >>> at most). My board is already equipped with a connector from FLASH >>> chip to Raspberry pi, so it can be hardware or software method. >>> >>> I've red about bios update from bootable CD or USB stick - will this >>> method work with coreboot? >>> Best Regards, >>> Michael Widlok >>> >>> -- >>> coreboot mailing list: coreboot(a)coreboot.org >>> https://www.coreboot.org/mailman/listinfo/coreboot >> >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://www.coreboot.org/mailman/listinfo/coreboot > >

1 0

Re: [coreboot] Back to original BIOS
by Zoran Stojsavljevic 01 Feb '17

01 Feb '17

Hello Ron, No worries. I'll try to find the original BIOS for Michael, if Michael gives me exact model of Lenovo T400. Don't you agree? ;-) Zoran On Wed, Feb 1, 2017 at 8:41 PM, ron minnich <rminnich(a)gmail.com> wrote: > did you save the bios before you flashed it? > > On Wed, Feb 1, 2017 at 11:11 AM Michal Widlok <michalwd1979(a)gmail.com> > wrote: > >> Hello, >> >> Is it possible to flash back original BIOS from coreboot system on >> lenovo T400? I would like to play with tp_smapi module (battery checks >> at most). My board is already equipped with a connector from FLASH >> chip to Raspberry pi, so it can be hardware or software method. >> >> I've red about bios update from bootable CD or USB stick - will this >> method work with coreboot? >> Best Regards, >> Michael Widlok >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://www.coreboot.org/mailman/listinfo/coreboot >> > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://www.coreboot.org/mailman/listinfo/coreboot >

1 0

Re: [coreboot] Back to original BIOS
by ron minnich 01 Feb '17

01 Feb '17

did you save the bios before you flashed it? On Wed, Feb 1, 2017 at 11:11 AM Michal Widlok <michalwd1979(a)gmail.com> wrote: > Hello, > > Is it possible to flash back original BIOS from coreboot system on > lenovo T400? I would like to play with tp_smapi module (battery checks > at most). My board is already equipped with a connector from FLASH > chip to Raspberry pi, so it can be hardware or software method. > > I've red about bios update from bootable CD or USB stick - will this > method work with coreboot? > Best Regards, > Michael Widlok > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://www.coreboot.org/mailman/listinfo/coreboot >

1 0

Back to original BIOS
by Michal Widlok 01 Feb '17

01 Feb '17

Hello, Is it possible to flash back original BIOS from coreboot system on lenovo T400? I would like to play with tp_smapi module (battery checks at most). My board is already equipped with a connector from FLASH chip to Raspberry pi, so it can be hardware or software method. I've red about bios update from bootable CD or USB stick - will this method work with coreboot? Best Regards, Michael Widlok

1 0

Re: [coreboot] GRUB2 compilation failure
by chitgope raghuveer 01 Feb '17

01 Feb '17

Hello Zoran, I could be sure I havent used YOCTO. I have attached the complete log for the compilation. The output for $git describe is *"**4.5-897-gdcad289".* On Wed, Feb 1, 2017 at 12:19 PM, Zoran Stojsavljevic < zoran.stojsavljevic(a)gmail.com> wrote: > Hello Rag, > > Not sure what you are trying to do here? > > Did you compile using YOCTO (Makefile:1375: *recipe* for target > 'argp-ba.o' failed)? > > Or some other Linux distro? Please, we need here Linux distro with more > info and at least 200 lines of compilation log. > > Did you compile Coreboot source? Which version (please, execute $ git > describe in Coreboot root)?! > > Thank you, > Zoran > > On Wed, Feb 1, 2017 at 5:10 AM, chitgope raghuveer <raghurampage(a)gmail.com > > wrote: > >> Hello, >> >> I am facing a compilation issue with GRUB2. Below is the snippet. >> >> mv -f $depbase.Tpo $depbase.Po >> /bin/bash: line 1: -DHAVE_CONFIG_H: command not found >> Makefile:1375: recipe for target 'argp-ba.o' failed >> make[5]: *** [argp-ba.o] Error 127 >> >> >> -- >> Raghuveer Chitgope. >> >> -- >> coreboot mailing list: coreboot(a)coreboot.org >> https://www.coreboot.org/mailman/listinfo/coreboot >> > > -- Raghuveer Chitgope.

1 0

Re: [coreboot] SVID interface support on Intel Baytrail
by Zoran Stojsavljevic 01 Feb '17

01 Feb '17

I see... It seems that I got the idea. This one I freely share with the community! Some MSRs, or some PCIe registers must be enabled on SoC (namely, integrated in PCH), and they must be enabled at BSP (BIOS/Coreboot) time. You need to ask INTEL IOTG support to tell to you which ones, so Coreboot people can get the idea how and where to implement this SVID enabling (MSR or PCIe space) addendum, in order to enable INTEL user space power tools in Linux. I do NOT know which ones (not knowing answer to this question, in particular, and lazy to investigate), in contrary to previous problem with enabling Nehalem DDRs. ;-) Zoran On Wed, Feb 1, 2017 at 10:23 AM, Mayuri Tendulkar < mayuri.tendulkar(a)aricent.com> wrote: > We want to access this from Linux kernel Ubuntu 14.04.5 > > > > *From:* Zoran Stojsavljevic [mailto:zoran.stojsavljevic@gmail.com] > *Sent:* 01 February 2017 14:33 > *To:* Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com> > *Cc:* coreboot <coreboot(a)coreboot.org> > *Subject:* Re: [coreboot] SVID interface support on Intel Baytrail > > > > > In our design, we are using SVID interface on Intel Baytrail for > accessing PMIC. > > > > From where? BIOS? Linux kernel? Which SW package? > > > > What about EC in these equations? > > > > Zoran > > > > On Wed, Feb 1, 2017 at 9:26 AM, Mayuri Tendulkar < > mayuri.tendulkar(a)aricent.com> wrote: > > Hi > > > > In our design, we are using SVID interface on Intel Baytrail for accessing > PMIC. > > > > But in coreboot, we don’t see any support enabled for this interface for > Baytrail. > > > > Does anybody have idea how to access this interface? > > > > Regards > > Mayuri > > "DISCLAIMER: This message is proprietary to Aricent and is intended solely > for the use of the individual to whom it is addressed. It may contain > privileged or confidential information and should not be circulated or used > for any purpose other than for what it is intended. If you have received > this message in error, please notify the originator immediately. If you are > not the intended recipient, you are notified that you are strictly > prohibited from using, copying, altering, or disclosing the contents of > this message. Aricent accepts no responsibility for loss or damage arising > from the use of the information transmitted by this email including damage > from virus." > > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://www.coreboot.org/mailman/listinfo/coreboot > > > "DISCLAIMER: This message is proprietary to Aricent and is intended solely > for the use of the individual to whom it is addressed. It may contain > privileged or confidential information and should not be circulated or used > for any purpose other than for what it is intended. If you have received > this message in error, please notify the originator immediately. If you are > not the intended recipient, you are notified that you are strictly > prohibited from using, copying, altering, or disclosing the contents of > this message. Aricent accepts no responsibility for loss or damage arising > from the use of the information transmitted by this email including damage > from virus." >

1 0

Re: [coreboot] SVID interface support on Intel Baytrail
by Mayuri Tendulkar 01 Feb '17

01 Feb '17

We want to access this from Linux kernel Ubuntu 14.04.5 From: Zoran Stojsavljevic [mailto:zoran.stojsavljevic@gmail.com] Sent: 01 February 2017 14:33 To: Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com> Cc: coreboot <coreboot(a)coreboot.org> Subject: Re: [coreboot] SVID interface support on Intel Baytrail > In our design, we are using SVID interface on Intel Baytrail for accessing PMIC. From where? BIOS? Linux kernel? Which SW package? What about EC in these equations? Zoran On Wed, Feb 1, 2017 at 9:26 AM, Mayuri Tendulkar <mayuri.tendulkar(a)aricent.com<mailto:mayuri.tendulkar@aricent.com>> wrote: Hi In our design, we are using SVID interface on Intel Baytrail for accessing PMIC. But in coreboot, we don’t see any support enabled for this interface for Baytrail. Does anybody have idea how to access this interface? Regards Mayuri "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus." -- coreboot mailing list: coreboot(a)coreboot.org<mailto:coreboot@coreboot.org> https://www.coreboot.org/mailman/listinfo/coreboot "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus."

1 0

Re: [coreboot] SVID interface support on Intel Baytrail
by Zoran Stojsavljevic 01 Feb '17

01 Feb '17

> In our design, we are using SVID interface on Intel Baytrail for accessing PMIC. >From where? BIOS? Linux kernel? Which SW package? What about EC in these equations? Zoran On Wed, Feb 1, 2017 at 9:26 AM, Mayuri Tendulkar < mayuri.tendulkar(a)aricent.com> wrote: > Hi > > > > In our design, we are using SVID interface on Intel Baytrail for accessing > PMIC. > > > > But in coreboot, we don’t see any support enabled for this interface for > Baytrail. > > > > Does anybody have idea how to access this interface? > > > > Regards > > Mayuri > "DISCLAIMER: This message is proprietary to Aricent and is intended solely > for the use of the individual to whom it is addressed. It may contain > privileged or confidential information and should not be circulated or used > for any purpose other than for what it is intended. If you have received > this message in error, please notify the originator immediately. If you are > not the intended recipient, you are notified that you are strictly > prohibited from using, copying, altering, or disclosing the contents of > this message. Aricent accepts no responsibility for loss or damage arising > from the use of the information transmitted by this email including damage > from virus." > > -- > coreboot mailing list: coreboot(a)coreboot.org > https://www.coreboot.org/mailman/listinfo/coreboot >

1 0

SVID interface support on Intel Baytrail
by Mayuri Tendulkar 01 Feb '17

01 Feb '17

Hi In our design, we are using SVID interface on Intel Baytrail for accessing PMIC. But in coreboot, we don't see any support enabled for this interface for Baytrail. Does anybody have idea how to access this interface? Regards Mayuri "DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus."

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot February 2017