Hi Ron,
Thanks for the advice.
It would be the first time that I will push code into a GIT project with Gerrit. Therefore, let me a few moment to gather all required information to perform this without disturbance for others.
For the moment, I pulled the Coreboot project and add/modify the required files. Platform build is OK.
Now, the push… if you have any checklist to follow, it could be helpful.
Best regards,
Patrick Agrain
De : ron minnich [mailto:rminnich@gmail.com]
Envoyé : vendredi 16 décembre 2016 19:18
À : Agrain Patrick; coreboot(a)coreboot.org
Objet : Re: [coreboot] How to add a new SuperIO ?
it's way easier if you push your changes to gerrit marked as a WIP. People can see the code and will likely spot any problems very quickly.
On Fri, Dec 16, 2016 at 12:40 AM Agrain Patrick <patrick.agrain(a)al-enterprise.com<mailto:patrick.agrain@al-enterprise.com>> wrote:
Hi all,
I'm trying to add a new superIO chip to the source tree.
The chip is an EXAR XR28V932.
I tried to take example of the existing superIO chips, like the i3100 and it8716 to compose a correct source tree as following:
[agrain1@frilldlin059 coreboot]$ ls -als ./src/superio/exar/xr28v382/
total 10
1 drwxr-xr-x 2 agrain1 dhs2 512 Dec 16 09:03 .
1 drwxr-xr-x 3 agrain1 dhs2 512 Dec 15 09:41 ..
1 -rw-r--r-- 1 agrain1 dhs2 687 Dec 15 09:34 Makefile.inc
3 -rw-r--r-- 1 agrain1 dhs2 2614 Dec 16 09:03 superio.c
2 -rw-r--r-- 1 agrain1 dhs2 1287 Dec 15 16:28 xr28v382.h
I modified the devicetree.cb of my board (based on an Intel Mohon Peak) as following:
device pci 1f.0 on end # LPC bridge
chip superio/exar/xr28v382 # Super I/O
device pnp 2e.0 on # Com1
io 0x60 = 0x3f8
irq 0x70 = 4
end
device pnp 2e.1 off # Com2
end
device pnp 2e.8 off # Watchdog
end
end
device pci 1f.3 on end # SMBus 0
Now the output of the console log (DEBUG level):
<...>
PCI: pci_scan_bus for bus 00
PCI: 00:00.0 [8086/1f0f] enabled
PCI: Static device PCI: 00:01.0 not found, disabling it.
child PNP: 002e.0 not a PCI device
child PNP: 002e.1 not a PCI device
child PNP: 002e.8 not a PCI device
child PNP: 002e.0 not a PCI device
child PNP: 002e.1 not a PCI device
child PNP: 002e.8 not a PCI device
child PNP: 002e.0 not a PCI device
child PNP: 002e.1 not a PCI device
child PNP: 002e.8 not a PCI device
child PNP: 002e.0 not a PCI device
<...>
PCI: 00:1f.0 [8086/1f38] enabled
child PNP: 002e.0 not a PCI device
child PNP: 002e.1 not a PCI device
child PNP: 002e.8 not a PCI device
child PNP: 002e.0 not a PCI device
child PNP: 002e.1 not a PCI device
child PNP: 002e.8 not a PCI device
child PNP: 002e.0 not a PCI device
child PNP: 002e.1 not a PCI device
child PNP: 002e.8 not a PCI device
PCI: 00:1f.3 [8086/1f3c] enabled
child PNP: 002e.0 not a PCI device
<...>
PCI: Left over static devices:
PNP: 002e.0
PNP: 002e.1
PNP: 002e.8
PCI: Check your devicetree.cb.
PCI: pci_scan_bus for bus 01
<...>
DOMAIN: 0000 (Intel Rangeley Northbridge)
PCI: 00:00.0 (Intel Rangeley Northbridge)
PCI: 00:01.0 (Intel Rangeley Northbridge)
PCI: 00:02.0 (Intel Rangeley Northbridge)
PCI: 00:03.0 (Intel Rangeley Northbridge)
PCI: 00:04.0 (Intel Rangeley Northbridge)
PCI: 00:0b.0 (Intel Rangeley Southbridge)
PCI: 00:0e.0 (Intel Rangeley Southbridge)
PCI: 00:13.0 (Intel Rangeley Southbridge)
PCI: 00:14.0 (Intel Rangeley Southbridge)
PCI: 00:14.1 (Intel Rangeley Southbridge)
PCI: 00:14.2 (Intel Rangeley Southbridge)
PCI: 00:14.3 (Intel Rangeley Southbridge)
PCI: 00:16.0 (Intel Rangeley Southbridge)
PCI: 00:17.0 (Intel Rangeley Southbridge)
PCI: 00:18.0 (Intel Rangeley Southbridge)
PCI: 00:1f.0 (Intel Rangeley Southbridge)
PNP: 002e.0 (EXAR XR28V382 Super I/O)
PNP: 002e.1 (EXAR XR28V382 Super I/O)
PNP: 002e.8 (EXAR XR28V382 Super I/O)
PCI: 00:1f.3 (Intel Rangeley Southbridge)
PCI: 00:0f.0 (unknown)
PCI: 01:00.0 (unknown)
I guess that the "" are not normal, isn't it ?
And so the " Check your devicetree.cb." ?
Moreover, I put a printk() in the init function of the chip and do not see it in the log.
What particular point should I also check to be sure that I do not miss anything ?
Thanks for your help.
Best regards,
Patrick Agrain
--
coreboot mailing list: coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>
https://www.coreboot.org/mailman/listinfo/coreboot
Dear coreboot folks,
Testing the GRUB payload on the Lenovo X60 with coreboot from latest
master, the keyboard doesn’t work in GRUB.
GRUB is built with `make && make default_payload.elf`.
Can you confirm that problem, and do you know of a solution.
Using SeaBIOS, a delay of three to five seconds has to be set with the
file `etc/ps2-keyboard-spinup` in CBFS.
Thanks,
Paul
On Wed, Dec 28, 2016 at 10:35 AM, Samuthira Pandian T <
samuthira.t(a)aricent.com> wrote:
> Hi Team,
>
> I need to pass some debug parameter value from coreboot
> (romstage.c) file to grub configuration. Actually i need to set some flag
> in coreboot and need to read it from grub.cfg file. Is there any way to
> pass some parameters from coreboot to grub. If so, kindly let me know for
> the procedure.
>
It appears grub has some support for cbmem (the cbmemc command).
You can also add a cbmem entry for your debug parameter and pass it up the
stack. Here <https://chromium-review.googlesource.com/#/c/420583/> is a
recent example of how to do that.
--
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
Hi Team,
I need to pass some debug parameter value from coreboot (romstage.c) file to grub configuration. Actually i need to set some flag in coreboot and need to read it from grub.cfg file. Is there any way to pass some parameters from coreboot to grub. If so, kindly let me know for the procedure.
Thanks,
Samuthira
"DISCLAIMER: This message is proprietary to Aricent and is intended solely for the use of the individual to whom it is addressed. It may contain privileged or confidential information and should not be circulated or used for any purpose other than for what it is intended. If you have received this message in error, please notify the originator immediately. If you are not the intended recipient, you are notified that you are strictly prohibited from using, copying, altering, or disclosing the contents of this message. Aricent accepts no responsibility for loss or damage arising from the use of the information transmitted by this email including damage from virus."
Hello Shawn,
Please, follow my CLI transcript from my Future Fedora 26 VM over WIN10
(now rawhide) with Fedora 4.8.15 kernel implanted (kernel 4.10.0-rc0 gives
me lot of griefs, I do not trust it, so I eliminated it for now):
[zoran@localhost ~]$ cd projects/
[zoran@localhost projects]$ mkdir intelmetool
[zoran@localhost projects]$ cd intelmetool/
[zoran@localhost intelmetool]$ pwd
/home/zoran/projects/intelmetool
*[zoran@localhost intelmetool]$ uname -r*
*4.8.15-300.fc25.x86_64*
*[zoran@localhost intelmetool]$ git clone
https://github.com/zamaudio/intelmetool.git
<https://github.com/zamaudio/intelmetool.git>*
*Cloning into 'intelmetool'...*
*remote: Counting objects: 214, done.*
*remote: Total 214 (delta 0), reused 0 (delta 0), pack-reused 214*
*Receiving objects: 100% (214/214), 72.42 KiB | 0 bytes/s, done.*
*Resolving deltas: 100% (125/125), done.*
[zoran@localhost intelmetool]$ ls -al
total 12
drwxrwxr-x. 3 zoran zoran 4096 Dec 28 17:06 .
drwxrwxr-x. 10 zoran zoran 4096 Dec 28 17:05 ..
drwxrwxr-x. 3 zoran zoran 4096 Dec 28 17:06 intelmetool
[zoran@localhost intelmetool]$ cd intelmetool/
[zoran@localhost intelmetool]$ ls -al
total 100
drwxrwxr-x. 3 zoran zoran 4096 Dec 28 17:06 .
drwxrwxr-x. 3 zoran zoran 4096 Dec 28 17:06 ..
drwxrwxr-x. 8 zoran zoran 4096 Dec 28 17:06 .git
-rw-rw-r--. 1 zoran zoran 16 Dec 28 17:06 .gitignore
-rw-rw-r--. 1 zoran zoran 8956 Dec 28 17:06 intelmetool.c
-rw-rw-r--. 1 zoran zoran 9783 Dec 28 17:06 intelmetool.h
-rw-rw-r--. 1 zoran zoran 532 Dec 28 17:06 LICENSE
-rw-rw-r--. 1 zoran zoran 351 Dec 28 17:06 Makefile
-rw-rw-r--. 1 zoran zoran 16810 Dec 28 17:06 me.c
-rw-rw-r--. 1 zoran zoran 10622 Dec 28 17:06 me.h
-rw-rw-r--. 1 zoran zoran 7246 Dec 28 17:06 me_status.c
-rw-rw-r--. 1 zoran zoran 1109 Dec 28 17:06 mmap.c
-rw-rw-r--. 1 zoran zoran 224 Dec 28 17:06 mmap.h
-rw-rw-r--. 1 zoran zoran 90 Dec 28 17:06 README.md
[zoran@localhost intelmetool]$ su -m
Password:
[root@localhost intelmetool]# make
gcc -Wall -O0 -g -I. -c me_status.c -o me_status.o
gcc -Wall -O0 -g -I. -c me.c -o me.o
me.c: In function ‘mei_dump’:
me.c:63:18: warning: variable ‘csr’ set but not used
[-Wunused-but-set-variable]
struct mei_csr *csr;
^~~
gcc -Wall -O0 -g -I. -c mmap.c -o mmap.o
mmap.c: In function ‘map_physical_exact’:
mmap.c:11:26: warning: passing argument 1 of ‘mmap’ makes pointer from
integer without a cast [-Wint-conversion]
virt_addr = mmap(mapto, len, PROT_WRITE | PROT_READ,
MAP_SHARED|MAP_FIXED,
^~~~~
In file included from mmap.h:4:0,
from mmap.c:1:
/usr/include/sys/mman.h:57:14: note: expected ‘void *’ but argument is of
type ‘uint64_t {aka long unsigned int}’
extern void *mmap (void *__addr, size_t __len, int __prot,
^~~~
gcc -Wall -O0 -g -I. -o intelmetool intelmetool.o me_status.o me.o mmap.o
-lpci
[root@localhost intelmetool]# date
Wed Dec 28 17:07:26 CET 2016
[root@localhost intelmetool]# ls -al
total 228
drwxrwxr-x. 3 zoran zoran 4096 Dec 28 17:07 .
drwxrwxr-x. 3 zoran zoran 4096 Dec 28 17:06 ..
drwxrwxr-x. 8 zoran zoran 4096 Dec 28 17:06 .git
-rw-rw-r--. 1 zoran zoran 16 Dec 28 17:06 .gitignore
*-rwxr-xr-x. 1 root root 47008 Dec 28 17:07 intelmetool*
-rw-rw-r--. 1 zoran zoran 8956 Dec 28 17:06 intelmetool.c
-rw-rw-r--. 1 zoran zoran 9783 Dec 28 17:06 intelmetool.h
-rw-rw-r--. 1 zoran zoran 22144 Dec 28 17:06 intelmetool.o
-rw-rw-r--. 1 zoran zoran 532 Dec 28 17:06 LICENSE
-rw-rw-r--. 1 zoran zoran 351 Dec 28 17:06 Makefile
-rw-rw-r--. 1 zoran zoran 16810 Dec 28 17:06 me.c
-rw-rw-r--. 1 zoran zoran 10622 Dec 28 17:06 me.h
-rw-r--r--. 1 root root 28984 Dec 28 17:07 me.o
-rw-rw-r--. 1 zoran zoran 7246 Dec 28 17:06 me_status.c
-rw-r--r--. 1 root root 15704 Dec 28 17:07 me_status.o
-rw-rw-r--. 1 zoran zoran 1109 Dec 28 17:06 mmap.c
-rw-rw-r--. 1 zoran zoran 224 Dec 28 17:06 mmap.h
-rw-r--r--. 1 root root 7648 Dec 28 17:07 mmap.o
-rw-rw-r--. 1 zoran zoran 90 Dec 28 17:06 README.md
*[root@localhost intelmetool]# ./intelmetool *
*ME is not present on your board because we found a `82371AB/EB/MB PIIX4
ISA`, you are safe, exiting*
[root@localhost intelmetool]#
*_______*
*Do NOT forget: I run Fedora rawhide on VMWorkstation 12.5.2 Type 2 HYP on
the top of WIN10 64 Pro!*
Please, do the same on Mint18 distro on raw HW, and see if this will give
you some different results then what you have presently?
Please, let us know!
Zoran
On Wed, Dec 28, 2016 at 11:06 AM, Shawn <citypw(a)gmail.com> wrote:
> Hi Zoran,
>
> I created hwdb.bin via:
>
> # udevadm hwdb --update
>
> The result is still "segfault". dmesg:
>
> [ 972.044664] intelmetool[5055]: segfault at 16 ip 000000000040169e
> sp 000072ed96a44680 error 4 in intelmetool[400000+6000]
> [ 972.044674] grsec: Segmentation fault occurred at 0000000000000016
> in /usr/local/bin/intelmetool[intelmetool:5055] uid/euid:0/0
> gid/egid:0/0, parent /bin/bash[bash:4332] uid/euid:0/0 gid/egid:0/0
> [ 972.044685] grsec: denied resource overstep by requesting 4096 for
> RLIMIT_CORE against limit 0 for
> /usr/local/bin/intelmetool[intelmetool:5055] uid/euid:0/0
> gid/egid:0/0, parent /bin/bash[bash:4332] uid/euid:0/0 gid/egid:0/0
>
>
> On Mon, Dec 26, 2016 at 9:49 PM, Zoran Stojsavljevic
> <zoran.stojsavljevic(a)gmail.com> wrote:
> > Not sure if your strace log has anything to do with intelmetool.
> >
> > I did on your strace log the following (and in RED is possible cause of
> your
> > problems):
> >
> > [zoran@localhost projects]$ cat crash.log | grep ENOENT
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > open("/usr/share/misc/pci.ids.gz", O_RDONLY) = -1 ENOENT (No such file
> or
> > directory)
> > connect(4, {sa_family=AF_LOCAL, sun_path="/var/run/nscd/socket"}, 110)
> = -1
> > ENOENT (No such file or directory)
> > connect(4, {sa_family=AF_LOCAL, sun_path="/var/run/nscd/socket"}, 110)
> = -1
> > ENOENT (No such file or directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> > directory)
> > open("/root/.pciids-cache", O_RDONLY) = -1 ENOENT (No such file or
> > directory)
> > open("/etc/systemd/hwdb/hwdb.bin", O_RDONLY|O_CLOEXEC) = -1 ENOENT (No
> such
> > file or directory)
> > open("/etc/udev/hwdb.bin", O_RDONLY|O_CLOEXEC) = -1 ENOENT (No such file
> or
> > directory)
> > open("/usr/lib/systemd/hwdb/hwdb.bin", O_RDONLY|O_CLOEXEC) = -1 ENOENT
> (No
> > such file or directory)
> > open("/lib/systemd/hwdb/hwdb.bin", O_RDONLY|O_CLOEXEC) = -1 ENOENT (No
> such
> > file or directory)
> > [zoran@localhost projects]$
> >
> > I guess, you have one very important missing file in your Linux
> > configuration, this one: /etc/systemd/hwdb/hwdb.bin...
> /etc/udev/hwdb.bin ?!
> >
> > Here is good read:
> > https://www.freedesktop.org/software/systemd/man/hwdb.html
> > http://www.dsm.fordham.edu/cgi-bin/man-cgi.pl?topic=
> systemd-hwdb&sect=8
> >
> > Have no idea who is creating this file, but you can check your Linux
> distro
> > / tree with the following paths to find hwdb.bin:
> >
> > /etc/systemd/hwdb/hwdb.bin
> > /etc/udev/hwdb.bin <<======= In my Fedora rawhide VM
> > (future Fedora 26) I have here hwdb.bin =======
> > /usr/lib/systemd/hwdb/hwdb.bin
> > /lib/systemd/hwdb/hwdb.bin
> >
> > If you don't have in any, please, create one with the following link:
> > http://www.dsm.fordham.edu/cgi-bin/man-cgi.pl?topic=
> systemd-hwdb&sect=8
> >
> > Please, let us know!
> >
> > Zoran
> >
> > On Mon, Dec 26, 2016 at 3:42 PM, Shawn <citypw(a)gmail.com> wrote:
> >>
> >> Hi,
> >>
> >> intelmetool occurs "segfault" on my laptop running Mint 18 with
> >> PaX/Grsecurity 4.7.10. The PCI info:
> >>
> >> -[0000:00]-+-00.0 Intel Corporation Sky Lake Host Bridge/DRAM
> >> Registers [8086:1904]
> >> +-02.0 Intel Corporation Sky Lake Integrated Graphics
> >> [8086:1916]
> >> +-04.0 Intel Corporation Skylake Processor Thermal
> >> Subsystem [8086:1903]
> >> +-14.0 Intel Corporation Sunrise Point-LP USB 3.0 xHCI
> >> Controller [8086:9d2f]
> >> +-14.2 Intel Corporation Sunrise Point-LP Thermal
> >> subsystem [8086:9d31]
> >> +-15.0 Intel Corporation Sunrise Point-LP Serial IO I2C
> >> Controller [8086:9d60]
> >> +-15.1 Intel Corporation Sunrise Point-LP Serial IO I2C
> >> Controller [8086:9d61]
> >> +-16.0 Intel Corporation Sunrise Point-LP CSME HECI
> >> [8086:9d3a]
> >> +-1c.0-[01]----00.0 NVIDIA Corporation GM107M [GeForce GTX
> >> 960M] [10de:139b]
> >> +-1c.4-[02]----00.0 Samsung Electronics Co Ltd NVMe SSD
> >> Controller [144d:a802]
> >> +-1c.6-[03]----00.0 Qualcomm Atheros Killer E2400 Gigabit
> >> Ethernet Controller [1969:e0a1]
> >> +-1c.7-[04]----00.0 Qualcomm Atheros QCA6174 802.11ac
> >> Wireless Network Adapter [168c:003e]
> >> +-1d.0-[05]----00.0 Samsung Electronics Co Ltd NVMe SSD
> >> Controller [144d:a802]
> >> +-1d.2-[06-3e]--
> >> +-1f.0 Intel Corporation Sunrise Point-LP LPC Controller
> >> [8086:9d48]
> >> +-1f.2 Intel Corporation Sunrise Point-LP PMC [8086:9d21]
> >> +-1f.3 Intel Corporation Sunrise Point-LP HD Audio
> [8086:9d70]
> >> \-1f.4 Intel Corporation Sunrise Point-LP SMBus [8086:9d23]
> >>
> >> The crash log was attached! I'm not sure if intelmetool support
> >> Skylake as well. One tiny feature of PaX/Grsecurity prevent the ioperm
> >> for killing the potential threats in case which
> >> the adversary re-flash the SPI ROM once they get the root priv. It
> >> does affect flashrom but intelmetool. I also ran intelmetool on the
> >> distro( Mint 18) kernel and got the same result.
> >>
> >>
> >> --
> >> GNU powered it...
> >> GPL protect it...
> >> God blessing it...
> >>
> >> regards
> >> Shawn
> >>
> >> --
> >> coreboot mailing list: coreboot(a)coreboot.org
> >> https://www.coreboot.org/mailman/listinfo/coreboot
> >
> >
>
>
>
> --
> GNU powered it...
> GPL protect it...
> God blessing it...
>
> regards
> Shawn
>
Hi Zoran,
I created hwdb.bin via:
# udevadm hwdb --update
The result is still "segfault". dmesg:
[ 972.044664] intelmetool[5055]: segfault at 16 ip 000000000040169e
sp 000072ed96a44680 error 4 in intelmetool[400000+6000]
[ 972.044674] grsec: Segmentation fault occurred at 0000000000000016
in /usr/local/bin/intelmetool[intelmetool:5055] uid/euid:0/0
gid/egid:0/0, parent /bin/bash[bash:4332] uid/euid:0/0 gid/egid:0/0
[ 972.044685] grsec: denied resource overstep by requesting 4096 for
RLIMIT_CORE against limit 0 for
/usr/local/bin/intelmetool[intelmetool:5055] uid/euid:0/0
gid/egid:0/0, parent /bin/bash[bash:4332] uid/euid:0/0 gid/egid:0/0
On Mon, Dec 26, 2016 at 9:49 PM, Zoran Stojsavljevic
<zoran.stojsavljevic(a)gmail.com> wrote:
> Not sure if your strace log has anything to do with intelmetool.
>
> I did on your strace log the following (and in RED is possible cause of your
> problems):
>
> [zoran@localhost projects]$ cat crash.log | grep ENOENT
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> open("/usr/share/misc/pci.ids.gz", O_RDONLY) = -1 ENOENT (No such file or
> directory)
> connect(4, {sa_family=AF_LOCAL, sun_path="/var/run/nscd/socket"}, 110) = -1
> ENOENT (No such file or directory)
> connect(4, {sa_family=AF_LOCAL, sun_path="/var/run/nscd/socket"}, 110) = -1
> ENOENT (No such file or directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> access("/etc/ld.so.nohwcap", F_OK) = -1 ENOENT (No such file or
> directory)
> open("/root/.pciids-cache", O_RDONLY) = -1 ENOENT (No such file or
> directory)
> open("/etc/systemd/hwdb/hwdb.bin", O_RDONLY|O_CLOEXEC) = -1 ENOENT (No such
> file or directory)
> open("/etc/udev/hwdb.bin", O_RDONLY|O_CLOEXEC) = -1 ENOENT (No such file or
> directory)
> open("/usr/lib/systemd/hwdb/hwdb.bin", O_RDONLY|O_CLOEXEC) = -1 ENOENT (No
> such file or directory)
> open("/lib/systemd/hwdb/hwdb.bin", O_RDONLY|O_CLOEXEC) = -1 ENOENT (No such
> file or directory)
> [zoran@localhost projects]$
>
> I guess, you have one very important missing file in your Linux
> configuration, this one: /etc/systemd/hwdb/hwdb.bin... /etc/udev/hwdb.bin ?!
>
> Here is good read:
> https://www.freedesktop.org/software/systemd/man/hwdb.html
> http://www.dsm.fordham.edu/cgi-bin/man-cgi.pl?topic=systemd-hwdb&sect=8
>
> Have no idea who is creating this file, but you can check your Linux distro
> / tree with the following paths to find hwdb.bin:
>
> /etc/systemd/hwdb/hwdb.bin
> /etc/udev/hwdb.bin <<======= In my Fedora rawhide VM
> (future Fedora 26) I have here hwdb.bin =======
> /usr/lib/systemd/hwdb/hwdb.bin
> /lib/systemd/hwdb/hwdb.bin
>
> If you don't have in any, please, create one with the following link:
> http://www.dsm.fordham.edu/cgi-bin/man-cgi.pl?topic=systemd-hwdb&sect=8
>
> Please, let us know!
>
> Zoran
>
> On Mon, Dec 26, 2016 at 3:42 PM, Shawn <citypw(a)gmail.com> wrote:
>>
>> Hi,
>>
>> intelmetool occurs "segfault" on my laptop running Mint 18 with
>> PaX/Grsecurity 4.7.10. The PCI info:
>>
>> -[0000:00]-+-00.0 Intel Corporation Sky Lake Host Bridge/DRAM
>> Registers [8086:1904]
>> +-02.0 Intel Corporation Sky Lake Integrated Graphics
>> [8086:1916]
>> +-04.0 Intel Corporation Skylake Processor Thermal
>> Subsystem [8086:1903]
>> +-14.0 Intel Corporation Sunrise Point-LP USB 3.0 xHCI
>> Controller [8086:9d2f]
>> +-14.2 Intel Corporation Sunrise Point-LP Thermal
>> subsystem [8086:9d31]
>> +-15.0 Intel Corporation Sunrise Point-LP Serial IO I2C
>> Controller [8086:9d60]
>> +-15.1 Intel Corporation Sunrise Point-LP Serial IO I2C
>> Controller [8086:9d61]
>> +-16.0 Intel Corporation Sunrise Point-LP CSME HECI
>> [8086:9d3a]
>> +-1c.0-[01]----00.0 NVIDIA Corporation GM107M [GeForce GTX
>> 960M] [10de:139b]
>> +-1c.4-[02]----00.0 Samsung Electronics Co Ltd NVMe SSD
>> Controller [144d:a802]
>> +-1c.6-[03]----00.0 Qualcomm Atheros Killer E2400 Gigabit
>> Ethernet Controller [1969:e0a1]
>> +-1c.7-[04]----00.0 Qualcomm Atheros QCA6174 802.11ac
>> Wireless Network Adapter [168c:003e]
>> +-1d.0-[05]----00.0 Samsung Electronics Co Ltd NVMe SSD
>> Controller [144d:a802]
>> +-1d.2-[06-3e]--
>> +-1f.0 Intel Corporation Sunrise Point-LP LPC Controller
>> [8086:9d48]
>> +-1f.2 Intel Corporation Sunrise Point-LP PMC [8086:9d21]
>> +-1f.3 Intel Corporation Sunrise Point-LP HD Audio [8086:9d70]
>> \-1f.4 Intel Corporation Sunrise Point-LP SMBus [8086:9d23]
>>
>> The crash log was attached! I'm not sure if intelmetool support
>> Skylake as well. One tiny feature of PaX/Grsecurity prevent the ioperm
>> for killing the potential threats in case which
>> the adversary re-flash the SPI ROM once they get the root priv. It
>> does affect flashrom but intelmetool. I also ran intelmetool on the
>> distro( Mint 18) kernel and got the same result.
>>
>>
>> --
>> GNU powered it...
>> GPL protect it...
>> God blessing it...
>>
>> regards
>> Shawn
>>
>> --
>> coreboot mailing list: coreboot(a)coreboot.org
>> https://www.coreboot.org/mailman/listinfo/coreboot
>
>
--
GNU powered it...
GPL protect it...
God blessing it...
regards
Shawn
I have a problem with USB EHCI on board with Lynxpoint-LP southbridge.
First of all system doesn't wakeup from USB devices from S3. EHCI controller
is listed in "/proc/acpi/wakeup" as "enabled" and GPE number is seemed to be
configured correctly to PME_B0, but it doesn't work.
More troubling issue that USB stops working after wakeup (for example from
power button).
In attempt to solve this issue I started to investigate how exactly EHCI
works in S3 suspend/resume sequence.
And I have some questions:
1) PCI_config: PWR_CNTL_STS register (54-55h)
What power state should enter EHCI controller when system enters S3? D0
state or D3hot ?
2) MEM_BASE: USB2.0_CMD (20-23h)
Is it correct, that system disables "Run/Stop (RS)" bit when system enters
S3?
3) MEM_BASE: RMHPORTSTSN (F0h)
Is it correct, that all ports became suspended when system enters S3?
4) Who is responsible to set "Run/Stop (RS)" and bring USB ports from
suspended state? BIOS or OS?
5) Is there any board in coreboot that has USB EHCI working correctly with
S3 suspend/resume?
Hall 4 (Chaos West Assembly Hackcenter) towards hall 3.
On 12/27/2016 05:16 AM, Jonathan Neuschäfer wrote:
> On Tue, Dec 27, 2016 at 12:21:25AM +0100, Rudolf Marek wrote:
>> Hi
>>
>> I think I seen this. I hope it is accurate.
>>
>> https://events.ccc.de/congress/2016/wiki/Assembly:Coreboot
>>
>> Thanks
>> Rudolf
> Yes. We have two tables in the Chaos West area.
>
>
> Jonathan
>
