On Fri, Oct 2, 2015 at 8:43 PM, David Hendricks <dhendrix(a)google.com> wrote:
> Hello Silicon Valley folks,
> Since I am not going to Germany this year, I plan to VC in so that I can
> participate in the presentations. I figure that if others are interested in
> viewing or giving presentations then this might be a good opportunity for a
> little get-together.
>
> Germany is 9 hours ahead of us so scheduling will be a bit awkward for
> some. I was thinking of booking a conference room somewhere at Google in
> Mountain View (likely somewhere close to the Sports Page ;-)). My tentative
> plan is to start a Hangout at around 1:00am PDT on Saturday the 10th to
> fill in some morning presentation slots in Germany.
>
> Others around the world who wish to participate will be welcome to use our
> Hangout, though # of connections is limited. You do not need an account
> with Google, I will send the meeting link and accept requests to join.
>
> E-mail me if you're interested in either joining in person or over
> Hangouts. I'll add some info on the conference wiki page at
> http://coreboot.org/coreboot_conference_Bonn_2015, too.
>
I have updated the wiki page to include notes about videoconferencing and
presentations that are planned for Saturday morning:
http://coreboot.org/Coreboot_conference_Bonn_2015#Saturday
Check there for details and updates.
--
David Hendricks (dhendrix)
Systems Software Engineer, Google Inc.
Hi,
Iru Cai wrote:
> So can some one give me some instruction on devicetree.cb file?
It sounds like it has to be hand-crafted in your case.
> And another thing, how can I submit the code to the coreboot repository?
By creating an account at http://review.coreboot.org/ and pushing
commits there for review by the community.
> Is symlinks to another source files allowed in the source tree?
Not really, no. Is it possible to refactor the code in the reused
files so that it can be used by multiple mainboards more easily?
//Peter
Hi Iru Cai,
take a look at this http://review.coreboot.org/#/c/11765/ change.
But beware there can be issues with that port.
Regards Zaolin
> Hi,
>
> I installed coreboot on my Lenovo ThinkPad T420 laptop today, and I'd
> like to share some experience and hope some one can solve some issues
> on it.
>
> First, I built the T420s port and flashed it to the T420 laptop.
> Fortunately, the laptop could be brought up and boot to Linux.
> However, several USB ports didn't function properly(except the one
> for EHCI debug) because of the difference between T420s and T420
> model. Now I've checked and used the code from the result generated
> from autoport, and all the USB ports work fine.
>
> However, the devicetree.cb file generated from autoport does not work
> properly. I use GRUB payload with native graphic init. When I use the
> T420s devicetree.cb, it works fine, but with the autoport
> devicetree.cb, only the backlight is on and nothing displays. At last
> I built a kernel for GRUB payload, and the kernel handled the display
> properly, then I reflashed another ROM with flashrom to unbrick my
> laptop.
>
> So can some one give me some instruction on devicetree.cb file? And
> another thing, how can I submit the code to the coreboot repository?
> Is symlinks to another source files allowed in the source tree?
>
> Iru Cai
>
> --
> coreboot mailing list: coreboot(a)coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
Hi,
I installed coreboot on my Lenovo ThinkPad T420 laptop today, and I'd like
to share some experience and hope some one can solve some issues on it.
First, I built the T420s port and flashed it to the T420 laptop.
Fortunately, the laptop could be brought up and boot to Linux. However,
several USB ports didn't function properly(except the one for EHCI debug)
because of the difference between T420s and T420 model. Now I've checked
and used the code from the result generated from autoport, and all the USB
ports work fine.
However, the devicetree.cb file generated from autoport does not work
properly. I use GRUB payload with native graphic init. When I use the T420s
devicetree.cb, it works fine, but with the autoport devicetree.cb, only the
backlight is on and nothing displays. At last I built a kernel for GRUB
payload, and the kernel handled the display properly, then I reflashed
another ROM with flashrom to unbrick my laptop.
So can some one give me some instruction on devicetree.cb file? And another
thing, how can I submit the code to the coreboot repository? Is symlinks to
another source files allowed in the source tree?
Iru Cai
Dear vendors, developers and interested parties,
on behalf of the Federal Office for Information Security (BSI) Germany I would
like to invite you to the coreboot conference and developer meeting on
October 9-11 2015 in Bonn, Germany.
This conference and developer meeting is geared towards manufacturers of
hardware (processors, chipsets, mainboards and servers/ laptops/ tablets/
desktops/ appliances) as well as developers of firmware with an interest in
coreboot and the possibilities it offers.
The Federal Office for Information Security (BSI) in Germany will host the
conference in Bonn, Germany. As the national cyber security authority, the
goal of the BSI is to promote IT security in Germany. For this reason, the
BSI has funded coreboot development in the past for security reasons.
The date of the coreboot conference is Friday October 9 to Sunday October 11,
2015. This is scheduled directly after Embedded Linux Conference Europe to
make travel arrangements easier for people attending both events.
If your main interest is forging business relationships and/or strategic
coordination and you want to skip the technical workshops, Friday (and
possibly Saturday) will be the outreach day of talks, presentations and
discussions.
If your main interest is doing development, you can use the separate developer
room next to the during all three days of the conference.
Call for presentations:
We are looking for interesting talks/presentations about coreboot related
topics for the first (and possibly second) day of the conference. Please note
that those presentations are not intended to be advertisements or company
portfolio presentations.
Expected duration is between 10 and 45 minutes.
Submission: Please send the title, a brief summary, the expected duration and
name/organization of the speaker to <coreboot-conference(a)bsi.bund.de> until
September 21. We will notify you of acceptance until September 28. If you
want us to make sure the slides work fine with the projector at the venue,
please submit your final slides in pdf form before Ocober 7.
Call for discussion topics and development suggestions:
We hope to stimulate discussion and foster new ideas as well as explore ways
to improve code, development and deployment. The format for this will be a
few minutes (1-5) of presenting your idea/topic followed by discussing it
with the audience for approximately 5-20 minutes. While there is no formal
deadline for submission, we'd appreciate a submission to
<coreboot-conference(a)bsi.bund.de> before October 2 to be able to list the
topic on the agenda to allow others to think about the topic in advance.
Call for profiles:
This is the chance to tell others what you're doing, what you can offer and in
what area you'd like to collaborate. If desired, we can attempt to distribute
your profile to other conference participants before the conference. Please
submit such profiles before September 30 to
<coreboot-conference(a)bsi.bund.de> .
Call for developers:
If you want to do development all day, every day, just come and do it. We have
power, networking and some spare hardware (please tell us in advance if you
need something on site, we might have it in our lab).
Travel information:
If you wonder about how to reach Bonn, there are three options available by
plane:
The closest is Cologne Airport (CGN), 30 minutes by bus to Bonn main station.
Next is Dusseldorf Airport (DUS), 1 hour by train to Bonn main station.
The airport with most international destinations is Frankfurt Airport (FRA), 1
hour by train to Bonn main station.
There’s the option to travel by train as well. Bonn is reachable by high-speed
train (ICE), and other high-speed train stations are reasonably close (30
minutes).
Conference location:
Wissenschaftszentrum Bonn
Ahrstrasse 45
53175 Bonn
GERMANY
Getting there (German only)
http://www.stifterverband.info/veranstaltungen/wissenschaftszentrum_bonn/...
An English version of the directions will be available at
http://coreboot.org/coreboot_conference_Bonn_2015
Accommodation:
Accommodation is not centrally organized, but if desired we can point you to
websites listing hotel contact information and/or booking services as well as
the local tourist information office. We also have a small allotment of rooms
close to the venue reserved for conference participants, just ask us.
Spare time activities:
If there is enough interest, it might be possible to get a tour of the former
top secret bunker of the German Federal Government on Saturday evening. More
info at http://regbu.de/Fremdsprachen/GB1.html
Besides that, Bonn and Cologne have lots of tourist attractions
Food and drinks:
More info will be posted to http://coreboot.org/coreboot_conference_Bonn_2015
shortly.
Date and time:
October 9-11 2015
Friday: 9:00-19:00
Saturday: 9:00-16:00
Sunday: 9:00-19:00
To enable us to estimate the number of attendees (for catering etc.), please
notify us ASAP whether you will attend the conference at
<coreboot-conference(a)bsi.bund.de>. Thank you!
All information is also available at
http://coreboot.org/coreboot_conference_Bonn_2015
Sincerely,
Carl-Daniel Hailfinger
--
Hailfinger, Carl-Daniel
_________________________________________
Section C 13 - Operating System and Application Security
Federal Office for Information Security (BSI)
Godesberger Allee 185-189
53175 Bonn, Germany
phone: +49 (0)228 9582-5939
fax: +49 (0)228 9582-5400
e-mail: coreboot-conference(a)bsi.bund.de
web: www.bsi.bund.de
by Raptor Engineering Automated Coreboot Test Stand
The ASUS KFSN4-DRE fails verification as of commit 77051f108a88532c13792492d904599c1e453e32
The following tests failed:
BOOT_FAILURE
Commits since last successful test:
77051f1 tegra132/tegra210: remove verstage.c
See attached log for details
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Hi, community
I found Lenovo X220, T420s and T520 have coreboot support, but T420 is not
in the support list. I used the autoport tool in coreboot, and found some
differences(e.g. GPIO) between T420 and the supported models. I think it
should be easy to port it.
I've just disassembled a Lenovo ThinkPad T420, and found a Winbond 25Q64CV
flash after I moved the mainboard out. However, I couldn't read it with my
flash programmer. I don't know if the flash can be read if I try another
programmer or SOIC-8 clip.
Iru
