* Fred Young <Fred.Young(a)kaleidescape.com> [150107 16:46]:
> The last time that I synched my coreboot source was about 2 weeks ago. I just
> tried the latest FSP and I still have the same problem. When I load Linux, I do
> see video output.
Your video bios executes, and fails because an int15 handler for 5f35 is
not implemented. Either reconfigure your vbios, or implement the
> Unsupported software interrupt #0x15 eax 0x3005f35
Yes, for SeaBIOS I did just like you wrote. However, sgabios may only be
configured by modifying the source files.
On 14.01.2015 13:29, WANG FEI wrote:
> Changing the seabios serial port base address, you should modify it
> via "make menuconfig" command, it's much easy and efficiency.
> It's not recommended to modify the actual source files.
> On Tue, Jan 13, 2015 at 3:33 AM, Martin Roth <gaumless(a)gmail.com
> <mailto:firstname.lastname@example.org>> wrote:
> Hi Viktor,
> Yes, I think having option roms checked is probably required.
> The only other thing I'd recommend is to build SeaBIOS outside of
> the coreboot structure and pull it in as an elf payload. Building
> within coreboot is handy, but it doesn't offer the flexibility or
> control that you get building it yourself.
> On 01/12/2015 01:50 AM, Kuzmichev Viktor wrote:
> On 11.01.2015 07:45, Martin Roth wrote:
> On 01/10/2015 07:53 AM, Kevin O'Connor wrote:
> On Thu, Dec 25, 2014 at 11:45:40AM +0300, Kuzmichev
> Viktor wrote:
> I've been trying to boot grub installed on the
> hard drive using coreboot and
> SeaBIOS as a payload. The motherboard I'm using is
> Intel Mohon Peak. Also, I
> do not use VGA for output, only serial port. So, I
> included the sgabios into
> my rom file. Here is its layout:
> It should have worked. How did you build SeaBIOS,
> what SeaBIOS config
> did you use, and what changes have you made to SeaBIOS?
> As I recall, Mohon Peak uses 0x2f8 for the console serial
> port. Did you set sgabios to output to 2f8 instead of 3f8
> in sgabios.h?
> sgabios.h:#define COM_BASE_ADDR 0x3f8
> Thank you for your replies!
> Just checked sgabios.h and changed serial port base address to
> 2f8. Somehow I missed it earlier, although I did set this
> parameter in both coreboot and SeaBIOS before. Sadly, I do not
> currently have access to Mohon Peak, so I can't really test
> this right now but, hopefully, I would be able to test this in
> a few days.
> Also, I'd like to clarify one more thing. Should Option ROMS
> parameter in SeaBIOS menuconfig be checked for sgabios to
> work? Are there any other nuances I should keep in mind?
> coreboot mailing list: coreboot(a)coreboot.org
So I was looking at our git log. I can fit two, maybe three commits if I'm
lucky. It's terrible. We have all this redundant information. We have both
"Reviewed-on" and "Change-Id" lines. Those only point to the same resource.
The "Tested-by" is useless. It's always Jenkins who tests changes. Then you
have a "Reviewed-by" for every person who ever bikeshed on said patch. Since
Paul has to say something on every single patch, he always has his own line in
almost every commit.
"Reviewed-by" is not the same as "Acked-by". I've seen acked-by used to let
linux folks know that some maintainer/big guy with more credentials than the
author already likes the patch. Though Acked-by is not necessary, even for
linux. Come to think of it, the only piece of information needed to find a
commit on our gerrit is the hash. All the other lines, except for the "Signed-
off-by" are redundant. "Reviewed-on" and "Change-Id" will take you to the same
place as the commit hash. All the crap added by gerrit is redundant.
Now add a patch that comes from our Chromium friends, and you've doubled the
size of said pork. Is it convenient to have all that information in the commit
message? Maybe. Is it necessary? Definitely not. Those lines are useful for
tracking a patch, but once it's +2'd and submitted, gerrit should strip out
all that pork. We might not even use gerrit anymore a few years down the road.
Adding all this crap is pointless.
It's time to drop the crap.
Did you use the latest code and Baytrail Gold3 FSP? I can see VGA output on Intel Bayley Bay board just selecting platform right and enable "configure defaults for Intel FSP" and gives all binary (FSP, VBIOS, microcode) correct path. Do you have serial debug message dump? It can help to identify some error.
From: coreboot [mailto:email@example.com] On Behalf Of Fred Young
Sent: Monday, January 05, 2015 2:31 PM
Subject: [coreboot] No video output with Bay Trail
I have an Aaeon EMB-BT1 with an Intel Atom E3845 CPU. I've successfully built coreboot specifying "Bayley Bay CRB (FSP)" as the "Mainboard model".
When I boot the machine after programming the flash with coreboot, I see lots of output on the serial line including output indicating that SeaBIOS has started.
However, I don't see any output on the video display on either HDMI or VGA. Here are my .config settings relating to video/VGA:
What do I need to do to get video output?