* Fred Young <Fred.Young(a)kaleidescape.com> [150107 16:46]:
> The last time that I synched my coreboot source was about 2 weeks ago. I just
> tried the latest FSP and I still have the same problem. When I load Linux, I do
> see video output.
Your video bios executes, and fails because an int15 handler for 5f35 is
not implemented. Either reconfigure your vbios, or implement the
handler...
> Unsupported software interrupt #0x15 eax 0x3005f35
Stefan
1
0
Re: [coreboot] SeaBIOS, serial output, grub, sgabios does not seem to load
by Kuzmichev Viktor 14 Jan '15
by Kuzmichev Viktor 14 Jan '15
14 Jan '15
Fei,
Yes, for SeaBIOS I did just like you wrote. However, sgabios may only be
configured by modifying the source files.
-Viktor
On 14.01.2015 13:29, WANG FEI wrote:
> Kuzmichev,
>
> Changing the seabios serial port base address, you should modify it
> via "make menuconfig" command, it's much easy and efficiency.
>
> It's not recommended to modify the actual source files.
>
> -Fei
>
> On Tue, Jan 13, 2015 at 3:33 AM, Martin Roth <gaumless(a)gmail.com
> <mailto:gaumless@gmail.com>> wrote:
>
> Hi Viktor,
> Yes, I think having option roms checked is probably required.
> The only other thing I'd recommend is to build SeaBIOS outside of
> the coreboot structure and pull it in as an elf payload. Building
> within coreboot is handy, but it doesn't offer the flexibility or
> control that you get building it yourself.
>
> Martin
>
>
> On 01/12/2015 01:50 AM, Kuzmichev Viktor wrote:
>
> On 11.01.2015 07:45, Martin Roth wrote:
>
> On 01/10/2015 07:53 AM, Kevin O'Connor wrote:
>
> On Thu, Dec 25, 2014 at 11:45:40AM +0300, Kuzmichev
> Viktor wrote:
>
> Hello,
>
> I've been trying to boot grub installed on the
> hard drive using coreboot and
> SeaBIOS as a payload. The motherboard I'm using is
> Intel Mohon Peak. Also, I
> do not use VGA for output, only serial port. So, I
> included the sgabios into
> my rom file. Here is its layout:
>
> It should have worked. How did you build SeaBIOS,
> what SeaBIOS config
> did you use, and what changes have you made to SeaBIOS?
>
> -Kevin
>
> As I recall, Mohon Peak uses 0x2f8 for the console serial
> port. Did you set sgabios to output to 2f8 instead of 3f8
> in sgabios.h?
>
> sgabios.h:#define COM_BASE_ADDR 0x3f8
>
> Martin
>
> Thank you for your replies!
>
> Just checked sgabios.h and changed serial port base address to
> 2f8. Somehow I missed it earlier, although I did set this
> parameter in both coreboot and SeaBIOS before. Sadly, I do not
> currently have access to Mohon Peak, so I can't really test
> this right now but, hopefully, I would be able to test this in
> a few days.
> Also, I'd like to clarify one more thing. Should Option ROMS
> parameter in SeaBIOS menuconfig be checked for sgabios to
> work? Are there any other nuances I should keep in mind?
>
> Viktor
>
>
>
> --
> coreboot mailing list: coreboot(a)coreboot.org
> <mailto:coreboot@coreboot.org>
> http://www.coreboot.org/mailman/listinfo/coreboot
>
>
1
0
13 Jan '15
Thanks. I'm forwarding to the seabios mailing list.
Do you know if USB2 hubs work? (IE, is this issue isolated to USB3
hubs?)
-Kevin
On Wed, Dec 10, 2014 at 07:21:54AM +0100, Werner Zeh wrote:
> Hi all.
>
> I have made some tests with SeaBIOS and XHCI and found, that on my board (which is baytrail-based)
> a USB3.0 hub won't work. For those who are familar with SeaBIOS I have attached two
> logfiles from SeaBIOS. One of them is with the USB3.0 flash drive directly connected to one of the root ports of SoC
> (in which case the boot process starts from the flash drive) and the other is with the same flash drive but a USB3.0 hub in between
> (I have used a hub from Delock #62534, http://www.delock.de/produkte/F_247_extern_62534/merkmale.html). In the hub-case, I see the
> "No bootable device" screen and no boot will happen.
>
> Maybe someone more experienced can see the cause from the logs.
>
> Werner
> ?SeaBIOS (version rel-1.7.5-116-g56b252e-dirty-20141210_064921-deerlf0x73)
> Attempting to find coreboot table
> Found coreboot table forwarder.
> Now attempting to find coreboot memory map
> Add to e820 map: 00000000 00001000 2
> Add to e820 map: 00001000 0009f000 1
> Add to e820 map: 000a0000 00060000 2
> Add to e820 map: 00100000 1accc000 1
> Add to e820 map: 1adcc000 00034000 2
> Add to e820 map: 1ae00000 05200000 2
> Add to e820 map: e0000000 10000000 2
> Add to e820 map: feb00000 00101000 2
> Add to e820 map: fed01000 00001000 2
> Add to e820 map: fed03000 00001000 2
> Add to e820 map: fed05000 00001000 2
> Add to e820 map: fed08000 00001000 2
> Add to e820 map: fed0c000 00004000 2
> Add to e820 map: fed1c000 00001000 2
> Add to e820 map: fee00000 00001000 2
> Add to e820 map: fef00000 01100000 2
> Add to e820 map: 00000000 00004000 1
> Found mainboard Siemens MC_TCU3 (FSP)
> malloc preinit
> Add to e820 map: 000a0000 00050000 -1
> Add to e820 map: 000f0000 00010000 2
> Add to e820 map: 1ad8c000 00040000 2
> _malloc zone=0x000ed3c8 size=32000 align=20 ret=0x1ad84240 (detail=0x1ad8bf40)
> Relocating init from 0x000e5700 to 0x1ad84240 (size 32000)
> malloc init
> Found CBFS header at 0xfffffbe0
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad84110 (detail=0x1ad841b0)
> Add romfile: cmos_layout.bin (size=1132)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad84040 (detail=0x1ad840e0)
> Add romfile: pci8086,0f31.rom (size=65536)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83f70 (detail=0x1ad84010)
> Add romfile: fallback/romstage (size=29817)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83ea0 (detail=0x1ad83f40)
> Add romfile: fallback/ramstage (size=67313)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83dd0 (detail=0x1ad83e70)
> Add romfile: fallback/payload (size=54924)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83d00 (detail=0x1ad83da0)
> Add romfile: config (size=4151)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83c30 (detail=0x1ad83cd0)
> Add romfile: (size=13473624)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83b60 (detail=0x1ad83c00)
> Add romfile: cpu_microcode_blob.bin (size=208896)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83a90 (detail=0x1ad83b30)
> Add romfile: (size=53080)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad839c0 (detail=0x1ad83a60)
> Add romfile: mrc.cache (size=65536)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad838f0 (detail=0x1ad83990)
> Add romfile: (size=393112)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83820 (detail=0x1ad838c0)
> Add romfile: fsp.bin (size=229376)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83750 (detail=0x1ad837f0)
> Add romfile: (size=31640)
> init ivt
> init bda
> Add to e820 map: 0009fc00 00000400 2
> init bios32
> init PMM
> init PNPBIOS table
> init keyboard
> init mouse
> init pic
> math cp init
> tsc calibrate start=1184960004 end=1187678733 diff=2718729
> CPU Mhz=1584
> init timer
> PCI probe
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83700 (detail=0x1ad83720)
> PCI device 00:00.0 (vd=8086:0f00 c=0600)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad836b0 (detail=0x1ad836d0)
> PCI device 00:02.0 (vd=8086:0f31 c=0300)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83660 (detail=0x1ad83680)
> PCI device 00:11.0 (vd=8086:0f15 c=0805)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83610 (detail=0x1ad83630)
> PCI device 00:12.0 (vd=8086:0f16 c=0805)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad835c0 (detail=0x1ad835e0)
> PCI device 00:13.0 (vd=8086:0f23 c=0106)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83570 (detail=0x1ad83590)
> PCI device 00:14.0 (vd=8086:0f35 c=0c03)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83520 (detail=0x1ad83540)
> PCI device 00:18.0 (vd=8086:0f40 c=0801)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad834d0 (detail=0x1ad834f0)
> PCI device 00:18.1 (vd=8086:0f41 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83480 (detail=0x1ad834a0)
> PCI device 00:18.2 (vd=8086:0f42 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83430 (detail=0x1ad83450)
> PCI device 00:18.3 (vd=8086:0f43 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad833e0 (detail=0x1ad83400)
> PCI device 00:18.4 (vd=8086:0f44 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83390 (detail=0x1ad833b0)
> PCI device 00:18.5 (vd=8086:0f45 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83340 (detail=0x1ad83360)
> PCI device 00:18.6 (vd=8086:0f46 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad832f0 (detail=0x1ad83310)
> PCI device 00:18.7 (vd=8086:0f47 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad832a0 (detail=0x1ad832c0)
> PCI device 00:1a.0 (vd=8086:0f18 c=1080)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83250 (detail=0x1ad83270)
> PCI device 00:1b.0 (vd=8086:0f04 c=0403)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83200 (detail=0x1ad83220)
> PCI device 00:1c.0 (vd=8086:0f48 c=0604)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad831b0 (detail=0x1ad831d0)
> PCI device 00:1e.0 (vd=8086:0f06 c=0801)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83160 (detail=0x1ad83180)
> PCI device 00:1e.1 (vd=8086:0f08 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83110 (detail=0x1ad83130)
> PCI device 00:1e.2 (vd=8086:0f09 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad830c0 (detail=0x1ad830e0)
> PCI device 00:1e.3 (vd=8086:0f0a c=0780)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83070 (detail=0x1ad83090)
> PCI device 00:1e.4 (vd=8086:0f0c c=0780)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83020 (detail=0x1ad83040)
> PCI device 00:1e.5 (vd=8086:0f0e c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82fd0 (detail=0x1ad82ff0)
> PCI device 00:1f.0 (vd=8086:0f1c c=0601)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82f80 (detail=0x1ad82fa0)
> PCI device 00:1f.3 (vd=8086:0f12 c=0c05)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82f30 (detail=0x1ad82f50)
> PCI device 01:00.0 (vd=8086:1538 c=0200)
> Found 26 PCI devices (max PCI bus is 01)
> Relocating coreboot bios tables
> _malloc zone=0x1ad8bf00 size=31 align=10 ret=0x000f3880 (detail=0x1ad82f00)
> Copying SMBIOS entry point from 0x1add4000 to 0x000f3880
> _malloc zone=0x1ad8bf00 size=36 align=10 ret=0x000f3850 (detail=0x1ad82ed0)
> Copying ACPI RSDP from 0x1add6000 to 0x000f3850
> rsdp=0x000f3850
> rsdt=0x1add6030
> fadt=0x1add8ce0
> pm_tmr_blk=408
> Using pmtimer, ioport 0x408
> Scan for VGA option rom
> Attempting to init PCI bdf 00:02.0 (vd 8086:0f31)
> Copying data 65536@0xff2004f8 to 65536@0x000c0000
> Checking rom 0x000c0000 (sig aa55 size 128)
> Running option rom at c000:0003
> Turning on vga text mode console
> SeaBIOS (version rel-1.7.5-116-g56b252e-dirty-20141210_064921-deerlf0x73)
> _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad81000 (detail=0x1ad82ea0)
> /1ad81000\ Start thread
> |1ad81000| init usb
> |1ad81000| _malloc zone=0x1ad8befc size=72 align=10 ret=0x1adcbfb0 (detail=0x1ad82e70)
> |1ad81000| XHCI init on dev 00:14.0: regs @ 0xd0700000, 7 ports, 32 slots, 32 byte contexts
> |1ad81000| XHCI protocol USB 2.00, 6 ports (offset 1), def 3018
> |1ad81000| XHCI protocol USB 3.00, 1 ports (offset 7), def 1000
> |1ad81000| XHCI extcap 0xc1 @ d0708040
> |1ad81000| XHCI extcap 0xc0 @ d0708070
> |1ad81000| XHCI extcap 0x1 @ d0708460
> |1ad81000| XHCI extcap 0xa @ d0708480
> |1ad81000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad80000 (detail=0x1ad82e40)
> /1ad80000\ Start thread
> |1ad80000| _malloc zone=0x1ad8befc size=264 align=40 ret=0x1adcbe80 (detail=0x1ad82e10)
> |1ad80000| _malloc zone=0x1ad8befc size=16 align=40 ret=0x1adcbe40 (detail=0x1ad82de0)
> |1ad80000| _malloc zone=0x1ad8befc size=288 align=100 ret=0x1adcbd00 (detail=0x1ad82db0)
> |1ad80000| _malloc zone=0x1ad8befc size=288 align=100 ret=0x1adcbb00 (detail=0x1ad82d80)
> |1ad80000| configure_xhci: resetting
> init ps2port
> _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7f000 (detail=0x1ad82d50)
> /1ad7f000\ Start thread
> |1ad7f000| i8042_flush
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| WARNING - Timeout at i8042_flush:71!
> \1ad7f000/ End thread
> _free 0x1ad7f000 (detail=0x1ad82d50)
> \1ad81000/ End thread
> _free 0x1ad81000 (detail=0x1ad82ea0)
> |1ad80000| configure_xhci: setup 16 scratch pad buffers
> |1ad80000| _malloc zone=0x1ad8befc size=128 align=40 ret=0x1adcbc80 (detail=0x1ad82ea0)
> |1ad80000| _malloc zone=0x1ad8befc size=65536 align=1000 ret=0x1adbb000 (detail=0x1ad82d50)
> init lpt
> Found 0 lpt ports
> init serial
> Found 1 serial ports
> init floppy drives
> init hard drives
> init ahci
> _malloc zone=0x1ad8bf00 size=20 align=10 ret=0x000f3830 (detail=0x1ad82d20)
> _malloc zone=0x1ad8bef8 size=2048 align=10 ret=0x000ec390 (detail=0x1ad82cf0)
> AHCI controller at 13.0, iobase d073a000, irq 10
> AHCI: cap 0xcf20ff21, ports_impl 0x3
> _malloc zone=0x1ad8bf08 size=68 align=10 ret=0x1ad82c70 (detail=0x1ad82cc0)
> _malloc zone=0x1ad8bf08 size=1024 align=400 ret=0x1ad82800 (detail=0x1ad82c40)
> _malloc zone=0x1ad8bf08 size=256 align=100 ret=0x1ad82700 (detail=0x1ad82c10)
> _malloc zone=0x1ad8bf08 size=256 align=100 ret=0x1ad82500 (detail=0x1ad826d0)
> _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad81000 (detail=0x1ad826a0)
> /1ad81000\ Start thread
> |1ad81000| AHCI/0: probing
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82650 (detail=0x1ad82670)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7f000 (detail=0x1ad82620)
> /1ad7f000\ Start thread
> |1ad7f000| xhci_hub_reset port #1: 0x000206e1, powered, pls 7, speed 1 [Full]
> _malloc zone=0x1ad8bf08 size=68 align=10 ret=0x1ad82480 (detail=0x1ad824d0)
> _malloc zone=0x1ad8bf08 size=1024 align=400 ret=0x1ad82000 (detail=0x1ad82450)
> _malloc zone=0x1ad8bf08 size=256 align=100 ret=0x1ad7ef00 (detail=0x1ad82420)
> _malloc zone=0x1ad8bf08 size=256 align=100 ret=0x1ad7ed00 (detail=0x1ad7eed0)
> _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7d000 (detail=0x1ad7eea0)
> /1ad7d000\ Start thread
> |1ad7d000| AHCI/1: probing
> |1ad81000| AHCI/0: link down
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82600 (detail=0x1ad7ee70)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7c000 (detail=0x1ad7ee40)
> /1ad7c000\ Start thread
> |1ad7f000| XHCI port #1: 0x00200e03, powered, enabled, pls 0, speed 3 [High]
> |1ad7f000| set_address 0x1adcbfb0
> init megasas
> |1ad7d000| AHCI/1: link down
> |1ad81000| _free 0x1ad82800 (detail=0x1ad82c40)
> |1ad81000| _free 0x1ad82700 (detail=0x1ad82c10)
> |1ad81000| _free 0x1ad82500 (detail=0x1ad826d0)
> |1ad81000| _free 0x1ad82c70 (detail=0x1ad82cc0)
> \1ad81000/ End thread
> _free 0x1ad81000 (detail=0x1ad826a0)
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82ca0 (detail=0x1ad82cc0)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad81000 (detail=0x1ad82c70)
> /1ad81000\ Start thread
> |1ad7f000| _malloc zone=0x1ad8befc size=316 align=100 ret=0x1adcb900 (detail=0x1ad82c40)
> |1ad7f000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad7e800 (detail=0x1ad82c10)
> |1ad7f000| xhci_alloc_pipe: usbdev 0x1ad82650, ring 0x1adcb900, slotid 0, epid 1
> |1ad7f000| _malloc zone=0x1ad8befc size=1024 align=400 ret=0x1adcb400 (detail=0x1ad82be0)
> |1ad7f000| xhci_cmd_enable_slot:
> |1ad7f000| xhci_trb_queue: ring 0x1adcbd00 [nidx 1, len 0]
> |1ad7f000| xhci_process_events: status change port #1
> |1ad7f000| xhci_process_events: status change port #2
> |1ad7f000| xhci_process_events: status change port #3
> |1ad7f000| xhci_process_events: status change port #7
> |1ad7f000| xhci_process_events: status change port #1
> |1ad7f000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd00, evt 0x1adcbe00, type 33, eidx 1, cc 1]
> |1ad7f000| xhci_alloc_pipe: enable slot: got slotid 1
> |1ad7f000| xhci_cmd_address_device: slotid 1
> |1ad7f000| xhci_trb_queue: ring 0x1adcbd00 [nidx 2, len 0]
> |1ad7d000| _free 0x1ad82000 (detail=0x1ad82450)
> |1ad7d000| _free 0x1ad7ef00 (detail=0x1ad82420)
> |1ad7d000| _free 0x1ad7ed00 (detail=0x1ad7eed0)
> |1ad7d000| _free 0x1ad82480 (detail=0x1ad824d0)
> \1ad7d000/ End thread
> _free 0x1ad7d000 (detail=0x1ad7eea0)
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82b90 (detail=0x1ad82bb0)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7d000 (detail=0x1ad82b60)
> /1ad7d000\ Start thread
> |1ad7d000| _free 0x1ad82b90 (detail=0x1ad82bb0)
> \1ad7d000/ End thread
> _free 0x1ad7d000 (detail=0x1ad82b60)
> |1ad7f000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd10, evt 0x1adcbe00, type 33, eidx 2, cc 1]
> |1ad7f000| _free 0x1ad7e800 (detail=0x1ad82c10)
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82bc0 (detail=0x1ad82c10)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7d000 (detail=0x1ad82b90)
> /1ad7d000\ Start thread
> |1ad7d000| _free 0x1ad82bc0 (detail=0x1ad82c10)
> \1ad7d000/ End thread
> _free 0x1ad7d000 (detail=0x1ad82b90)
> |1ad7f000| xhci_realloc_pipe: usbdev 0x1ad82650, ring 0x1adcb900, slotid 1, epid 1
> |1ad7f000| config_usb: 0x1adcba20
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 1, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 2, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 3, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82bc0 (detail=0x1ad82c10)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7d000 (detail=0x1ad82b90)
> /1ad7d000\ Start thread
> |1ad7d000| _free 0x1ad82bc0 (detail=0x1ad82c10)
> \1ad7d000/ End thread
> _free 0x1ad7d000 (detail=0x1ad82b90)
> |1ad81000| xhci_hub_reset port #3: 0x000206e1, powered, pls 7, speed 1 [Full]
> |1ad7f000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb920, evt 0x1adcba00, type 32, eidx 3, cc 1]
> |1ad7f000| device rev=0210 cls=09 sub=00 proto=01 size=64
> |1ad7f000| xhci_realloc_pipe: usbdev 0x1ad82650, ring 0x1adcb900, slotid 1, epid 1
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 4, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 5, len 9]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 6, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82bc0 (detail=0x1ad82c10)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7d000 (detail=0x1ad82b90)
> /1ad7d000\ Start thread
> |1ad81000| XHCI port #3: 0x00200603, powered, enabled, pls 0, speed 1 [Full]
> |1ad81000| set_address 0x1adcbfb0
> |1ad7f000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb950, evt 0x1adcba00, type 32, eidx 6, cc 1]
> |1ad7f000| xhci_process_events: status change port #3
> |1ad7f000| _malloc zone=0x1ad8bf08 size=25 align=10 ret=0x1ad82b40 (detail=0x1ad82b60)
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 7, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 8, len 25]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 9, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad81000| _malloc zone=0x1ad8befc size=316 align=100 ret=0x1adcb200 (detail=0x1ad82b10)
> |1ad81000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad82ae0)
> |1ad81000| xhci_alloc_pipe: usbdev 0x1ad82ca0, ring 0x1adcb200, slotid 0, epid 1
> |1ad81000| _malloc zone=0x1ad8befc size=1024 align=400 ret=0x1adbac00 (detail=0x1ad82ab0)
> |1ad81000| xhci_cmd_enable_slot:
> |1ad81000| xhci_trb_queue: ring 0x1adcbd00 [nidx 3, len 0]
> |1ad81000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb980, evt 0x1adcba00, type 32, eidx 9, cc 1]
> |1ad81000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd20, evt 0x1adcbe00, type 33, eidx 3, cc 1]
> |1ad81000| xhci_alloc_pipe: enable slot: got slotid 2
> |1ad81000| xhci_cmd_address_device: slotid 2
> |1ad81000| xhci_trb_queue: ring 0x1adcbd00 [nidx 4, len 0]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 10, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 11, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7f000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd30, evt 0x1adcbe00, type 33, eidx 4, cc 1]
> |1ad7f000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb9a0, evt 0x1adcba00, type 32, eidx 11, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 12, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 13, len 7]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 14, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad81000| _free 0x1ad82000 (detail=0x1ad82ae0)
> |1ad7f000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb9d0, evt 0x1adcba00, type 32, eidx 14, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 15, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [linked]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 1, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad81000| xhci_realloc_pipe: usbdev 0x1ad82ca0, ring 0x1adcb200, slotid 2, epid 1
> |1ad81000| config_usb: 0x1adcb320
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 1, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 2, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 3, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad81000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb900, evt 0x1adcba00, type 32, eidx 1, cc 1]
> |1ad81000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb220, evt 0x1adcb300, type 32, eidx 3, cc 1]
> |1ad81000| device rev=0110 cls=09 sub=00 proto=00 size=8
> |1ad81000| xhci_realloc_pipe: usbdev 0x1ad82ca0, ring 0x1adcb200, slotid 2, epid 1
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 4, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 5, len 9]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 6, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| xhci_hub_reset port #2: 0x000206e1, powered, pls 7, speed 1 [Full]
> |1ad7f000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb250, evt 0x1adcb300, type 32, eidx 6, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 2, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 3, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad81000| _malloc zone=0x1ad8bf08 size=25 align=10 ret=0x1ad82a90 (detail=0x1ad82ae0)
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 7, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 8, len 25]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 9, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad81000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb920, evt 0x1adcba00, type 32, eidx 3, cc 1]
> |1ad81000| xhci_process_events: status change port #2
> |1ad81000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb280, evt 0x1adcb300, type 32, eidx 9, cc 1]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 10, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 11, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| XHCI port #2: 0x00200e03, powered, enabled, pls 0, speed 3 [High]
> |1ad7c000| set_address 0x1adcbfb0
> |1ad7f000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb2a0, evt 0x1adcb300, type 32, eidx 11, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 4, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 5, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 12, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 13, len 7]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 14, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad81000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb940, evt 0x1adcba00, type 32, eidx 5, cc 1]
> |1ad81000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb2d0, evt 0x1adcb300, type 32, eidx 14, cc 1]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 15, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [linked]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 1, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| _malloc zone=0x1ad8befc size=316 align=100 ret=0x1adcb000 (detail=0x1ad82a60)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad82a30)
> |1ad7c000| xhci_alloc_pipe: usbdev 0x1ad82600, ring 0x1adcb000, slotid 0, epid 1
> |1ad7c000| _malloc zone=0x1ad8befc size=1024 align=400 ret=0x1adba800 (detail=0x1ad82a00)
> |1ad7c000| xhci_cmd_enable_slot:
> |1ad7c000| xhci_trb_queue: ring 0x1adcbd00 [nidx 5, len 0]
> |1ad7c000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb200, evt 0x1adcb300, type 32, eidx 1, cc 1]
> |1ad7c000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd40, evt 0x1adcbe00, type 33, eidx 5, cc 1]
> |1ad7c000| xhci_alloc_pipe: enable slot: got slotid 3
> |1ad7c000| xhci_cmd_address_device: slotid 3
> |1ad7c000| xhci_trb_queue: ring 0x1adcbd00 [nidx 6, len 0]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 6, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb900 [nidx 7, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7f000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd50, evt 0x1adcbe00, type 33, eidx 6, cc 1]
> |1ad7f000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb960, evt 0x1adcba00, type 32, eidx 7, cc 1]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 2, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 3, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| _free 0x1ad82000 (detail=0x1ad82a30)
> |1ad81000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb220, evt 0x1adcb300, type 32, eidx 3, cc 1]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 4, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 5, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| xhci_realloc_pipe: usbdev 0x1ad82600, ring 0x1adcb000, slotid 3, epid 1
> |1ad7c000| config_usb: 0x1adcb120
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 1, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 2, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 3, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7c000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb240, evt 0x1adcb300, type 32, eidx 5, cc 1]
> |1ad7c000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb020, evt 0x1adcb100, type 32, eidx 3, cc 1]
> |1ad7c000| device rev=0200 cls=09 sub=00 proto=02 size=64
> |1ad7c000| xhci_realloc_pipe: usbdev 0x1ad82600, ring 0x1adcb000, slotid 3, epid 1
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 4, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 5, len 9]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 6, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7f000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad829e0 (detail=0x1ad82a30)
> |1ad7f000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7b000 (detail=0x1ad829b0)
> /1ad7b000\ Start thread
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 8, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 9, len 4]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 10, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7b000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb050, evt 0x1adcb100, type 32, eidx 6, cc 1]
> |1ad7b000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb990, evt 0x1adcba00, type 32, eidx 10, cc 1]
> |1ad7d000| XHCI port #7: 0x00201203, powered, enabled, pls 0, speed 4 [Super]
> |1ad7d000| set_address 0x1adcbfb0
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 6, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 7, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| _malloc zone=0x1ad8bf08 size=41 align=10 ret=0x1ad82950 (detail=0x1ad82980)
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 7, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 8, len 41]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 9, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7c000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb260, evt 0x1adcb300, type 32, eidx 7, cc 1]
> |1ad7c000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb080, evt 0x1adcb100, type 32, eidx 9, cc 1]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 10, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 11, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7f000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82900 (detail=0x1ad82920)
> |1ad7f000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7a000 (detail=0x1ad828d0)
> /1ad7a000\ Start thread
> |1ad7a000| xhci_trb_queue: ring 0x1adcb900 [nidx 11, len 8]
> |1ad7a000| xhci_trb_queue: ring 0x1adcb900 [nidx 12, len 4]
> |1ad7a000| xhci_trb_queue: ring 0x1adcb900 [nidx 13, len 0]
> |1ad7a000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7a000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb0a0, evt 0x1adcb100, type 32, eidx 11, cc 1]
> |1ad7a000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb9c0, evt 0x1adcba00, type 32, eidx 13, cc 1]
> |1ad7a000| _free 0x1ad82900 (detail=0x1ad82920)
> \1ad7a000/ End thread
> _free 0x1ad7a000 (detail=0x1ad828d0)
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 14, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 15, len 4]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [linked]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 1, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7d000| _malloc zone=0x1ad8befc size=316 align=100 ret=0x1adba600 (detail=0x1ad82920)
> |1ad7d000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad828f0)
> |1ad7d000| xhci_alloc_pipe: usbdev 0x1ad82bc0, ring 0x1adba600, slotid 0, epid 1
> |1ad7d000| _malloc zone=0x1ad8befc size=1024 align=400 ret=0x1adba000 (detail=0x1ad828c0)
> |1ad7d000| xhci_cmd_enable_slot:
> |1ad7d000| xhci_trb_queue: ring 0x1adcbd00 [nidx 7, len 0]
> |1ad7d000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb900, evt 0x1adcba00, type 32, eidx 1, cc 1]
> |1ad7d000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd60, evt 0x1adcbe00, type 33, eidx 7, cc 1]
> |1ad7d000| xhci_alloc_pipe: enable slot: got slotid 4
> |1ad7d000| xhci_cmd_address_device: slotid 4
> |1ad7d000| xhci_trb_queue: ring 0x1adcbd00 [nidx 8, len 0]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 12, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 13, len 7]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 14, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7c000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd70, evt 0x1adcbe00, type 33, eidx 8, cc 1]
> |1ad7c000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb0d0, evt 0x1adcb100, type 32, eidx 14, cc 1]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 15, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [linked]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 1, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7f000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82870 (detail=0x1ad82890)
> |1ad7f000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7a000 (detail=0x1ad82840)
> /1ad7a000\ Start thread
> |1ad7b000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb000, evt 0x1adcb100, type 32, eidx 1, cc 1]
> |1ad7b000| _free 0x1ad829e0 (detail=0x1ad82a30)
> \1ad7b000/ End thread
> _free 0x1ad7b000 (detail=0x1ad829b0)
> |1ad7d000| _free 0x1ad82000 (detail=0x1ad828f0)
> |1ad81000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad829e0 (detail=0x1ad82a30)
> |1ad81000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7b000 (detail=0x1ad829b0)
> /1ad7b000\ Start thread
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 8, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 9, len 4]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 10, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 2, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 3, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7c000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb290, evt 0x1adcb300, type 32, eidx 10, cc 1]
> |1ad7c000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb020, evt 0x1adcb100, type 32, eidx 3, cc 1]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 4, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 5, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7f000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82820 (detail=0x1ad828f0)
> |1ad7f000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad79000 (detail=0x1ad827f0)
> /1ad79000\ Start thread
> |1ad79000| xhci_trb_queue: ring 0x1adcb900 [nidx 2, len 8]
> |1ad79000| xhci_trb_queue: ring 0x1adcb900 [nidx 3, len 4]
> |1ad79000| xhci_trb_queue: ring 0x1adcb900 [nidx 4, len 0]
> |1ad79000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad79000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb040, evt 0x1adcb100, type 32, eidx 5, cc 1]
> |1ad79000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb930, evt 0x1adcba00, type 32, eidx 4, cc 1]
> |1ad79000| _free 0x1ad82820 (detail=0x1ad828f0)
> \1ad79000/ End thread
> _free 0x1ad79000 (detail=0x1ad827f0)
> |1ad7a000| xhci_trb_queue: ring 0x1adcb900 [nidx 5, len 8]
> |1ad7a000| xhci_trb_queue: ring 0x1adcb900 [nidx 6, len 4]
> |1ad7a000| xhci_trb_queue: ring 0x1adcb900 [nidx 7, len 0]
> |1ad7a000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7d000| xhci_realloc_pipe: usbdev 0x1ad82bc0, ring 0x1adba600, slotid 4, epid 1
> |1ad7d000| config_usb: 0x1adba720
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 1, len 8]
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 2, len 8]
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 3, len 0]
> |1ad7d000| xhci_xfer_kick: ring 0x1adba600, slotid 4, epid 1
> |1ad7d000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb960, evt 0x1adcba00, type 32, eidx 7, cc 1]
> |1ad81000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82820 (detail=0x1ad828f0)
> |1ad81000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad79000 (detail=0x1ad827f0)
> /1ad79000\ Start thread
> |1ad7b000| _free 0x1ad829e0 (detail=0x1ad82a30)
> \1ad7b000/ End thread
> _free 0x1ad7b000 (detail=0x1ad829b0)
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 6, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb000 [nidx 7, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7a000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb060, evt 0x1adcb100, type 32, eidx 7, cc 1]
> |1ad7a000| _free 0x1ad82870 (detail=0x1ad82890)
> \1ad7a000/ End thread
> _free 0x1ad7a000 (detail=0x1ad82840)
> |1ad81000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad829e0 (detail=0x1ad82a30)
> |1ad81000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7b000 (detail=0x1ad829b0)
> /1ad7b000\ Start thread
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 11, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 12, len 4]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 13, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7b000| xhci_process_events: ring 0x1adba600 [trb 0x1adba620, evt 0x1adba700, type 32, eidx 3, cc 1]
> |1ad7b000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb2c0, evt 0x1adcb300, type 32, eidx 13, cc 1]
> |1ad7b000| _free 0x1ad829e0 (detail=0x1ad82a30)
> \1ad7b000/ End thread
> _free 0x1ad7b000 (detail=0x1ad829b0)
> |1ad79000| xhci_trb_queue: ring 0x1adcb200 [nidx 14, len 8]
> |1ad79000| xhci_trb_queue: ring 0x1adcb200 [nidx 15, len 4]
> |1ad79000| xhci_trb_queue: ring 0x1adcb200 [linked]
> |1ad79000| xhci_trb_queue: ring 0x1adcb200 [nidx 1, len 0]
> |1ad79000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7f000| Initialized USB HUB (0 ports used)
> |1ad7f000| _free 0x1ad82b40 (detail=0x1ad82b60)
> |1ad7f000| _free 0x1ad82650 (detail=0x1ad82670)
> \1ad7f000/ End thread
> _free 0x1ad7f000 (detail=0x1ad82620)
> |1ad7d000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb200, evt 0x1adcb300, type 32, eidx 1, cc 1]
> |1ad7d000| device rev=0300 cls=09 sub=00 proto=03 size=512
> |1ad7d000| xhci_realloc_pipe: usbdev 0x1ad82bc0, ring 0x1adba600, slotid 4, epid 1
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 4, len 8]
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 5, len 9]
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 6, len 0]
> |1ad7d000| xhci_xfer_kick: ring 0x1adba600, slotid 4, epid 1
> |1ad81000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82b40 (detail=0x1ad82b60)
> |1ad81000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7f000 (detail=0x1ad82a30)
> /1ad7f000\ Start thread
> |1ad79000| xhci_process_events: ring 0x1adba600 [trb 0x1adba650, evt 0x1adba700, type 32, eidx 6, cc 1]
> |1ad79000| _free 0x1ad82820 (detail=0x1ad828f0)
> \1ad79000/ End thread
> _free 0x1ad79000 (detail=0x1ad827f0)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad829b0 (detail=0x1ad829d0)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7b000 (detail=0x1ad828f0)
> /1ad7b000\ Start thread
> |1ad7b000| xhci_trb_queue: ring 0x1adcb000 [nidx 8, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb000 [nidx 9, len 4]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb000 [nidx 10, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7d000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb090, evt 0x1adcb100, type 32, eidx 10, cc 1]
> |1ad7d000| _malloc zone=0x1ad8bf08 size=31 align=10 ret=0x1ad82870 (detail=0x1ad82890)
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 7, len 8]
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 8, len 31]
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 9, len 0]
> |1ad7d000| xhci_xfer_kick: ring 0x1adba600, slotid 4, epid 1
> |1ad7f000| xhci_trb_queue: ring 0x1adcb200 [nidx 2, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb200 [nidx 3, len 4]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb200 [nidx 4, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7f000| xhci_process_events: ring 0x1adba600 [trb 0x1adba680, evt 0x1adba700, type 32, eidx 9, cc 1]
> |1ad7f000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb230, evt 0x1adcb300, type 32, eidx 4, cc 1]
> |1ad7f000| _free 0x1ad82b40 (detail=0x1ad82b60)
> \1ad7f000/ End thread
> _free 0x1ad7f000 (detail=0x1ad82a30)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82b40 (detail=0x1ad82b60)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7f000 (detail=0x1ad82a30)
> /1ad7f000\ Start thread
> |1ad7b000| _free 0x1ad829b0 (detail=0x1ad829d0)
> \1ad7b000/ End thread
> _free 0x1ad7b000 (detail=0x1ad828f0)
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 10, len 8]
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 11, len 0]
> |1ad7d000| xhci_xfer_kick: ring 0x1adba600, slotid 4, epid 1
> |1ad81000| Initialized USB HUB (0 ports used)
> |1ad81000| _free 0x1ad82a90 (detail=0x1ad82ae0)
> |1ad81000| _free 0x1ad82ca0 (detail=0x1ad82cc0)
> \1ad81000/ End thread
> _free 0x1ad81000 (detail=0x1ad82c70)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82ca0 (detail=0x1ad82cc0)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad81000 (detail=0x1ad82c70)
> /1ad81000\ Start thread
> |1ad81000| xhci_trb_queue: ring 0x1adcb000 [nidx 11, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb000 [nidx 12, len 4]
> |1ad81000| xhci_trb_queue: ring 0x1adcb000 [nidx 13, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad81000| xhci_process_events: ring 0x1adba600 [trb 0x1adba6a0, evt 0x1adba700, type 32, eidx 11, cc 1]
> |1ad81000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb0c0, evt 0x1adcb100, type 32, eidx 13, cc 1]
> |1ad81000| _free 0x1ad82ca0 (detail=0x1ad82cc0)
> \1ad81000/ End thread
> _free 0x1ad81000 (detail=0x1ad82c70)
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 14, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 15, len 4]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [linked]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 1, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7d000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb000, evt 0x1adcb100, type 32, eidx 1, cc 1]
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 12, len 8]
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 13, len 7]
> |1ad7d000| xhci_trb_queue: ring 0x1adba600 [nidx 14, len 0]
> |1ad7d000| xhci_xfer_kick: ring 0x1adba600, slotid 4, epid 1
> |1ad7c000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82ca0 (detail=0x1ad82cc0)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad81000 (detail=0x1ad82c70)
> /1ad81000\ Start thread
> |1ad7f000| xhci_process_events: ring 0x1adba600 [trb 0x1adba6c0, evt 0x1adba700, type 32, eidx 13, cc 6]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 2, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 3, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7d000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb020, evt 0x1adcb100, type 32, eidx 3, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 4, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 5, len 4]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 6, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7d000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb050, evt 0x1adcb100, type 32, eidx 6, cc 1]
> |1ad7f000| set_address 0x1adcbfb0
> |1ad81000| xhci_trb_queue: ring 0x1adcb000 [nidx 7, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb000 [nidx 8, len 4]
> |1ad81000| xhci_trb_queue: ring 0x1adcb000 [nidx 9, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7f000| _malloc zone=0x1ad8befc size=316 align=100 ret=0x1adba400 (detail=0x1ad82ae0)
> |1ad7f000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad829d0)
> |1ad7f000| xhci_alloc_pipe: usbdev 0x1ad82b40, ring 0x1adba400, slotid 0, epid 1
> |1ad7f000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad7e800 (detail=0x1ad828f0)
> |1ad7f000| xhci_cmd_configure_endpoint: slotid 3, add 0x1, del 0x0
> |1ad7f000| xhci_trb_queue: ring 0x1adcbd00 [nidx 9, len 0]
> |1ad7f000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb080, evt 0x1adcb100, type 32, eidx 9, cc 1]
> |1ad7f000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd80, evt 0x1adcbe00, type 33, eidx 9, cc 1]
> |1ad7f000| _free 0x1ad7e800 (detail=0x1ad828f0)
> |1ad7f000| _malloc zone=0x1ad8befc size=1024 align=400 ret=0x1adb9c00 (detail=0x1ad828f0)
> |1ad7f000| xhci_cmd_enable_slot:
> |1ad7f000| xhci_trb_queue: ring 0x1adcbd00 [nidx 10, len 0]
> |1ad7d000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd90, evt 0x1adcbe00, type 33, eidx 10, cc 1]
> |1ad7f000| xhci_alloc_pipe: enable slot: got slotid 5
> |1ad7f000| xhci_cmd_address_device: slotid 5
> |1ad7f000| xhci_trb_queue: ring 0x1adcbd00 [nidx 11, len 0]
> |1ad7d000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbda0, evt 0x1adcbe00, type 33, eidx 11, cc 1]
> |1ad7f000| _free 0x1ad82000 (detail=0x1ad829d0)
> |1ad7f000| xhci_realloc_pipe: usbdev 0x1ad82b40, ring 0x1adba400, slotid 5, epid 1
> |1ad7f000| config_usb: 0x1adba520
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 1, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 2, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 3, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adba400, slotid 5, epid 1
> |1ad81000| xhci_trb_queue: ring 0x1adcb000 [nidx 10, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb000 [nidx 11, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad81000| xhci_process_events: ring 0x1adba400 [trb 0x1adba420, evt 0x1adba500, type 32, eidx 3, cc 1]
> |1ad81000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb0a0, evt 0x1adcb100, type 32, eidx 11, cc 1]
> |1ad81000| xhci_trb_queue: ring 0x1adcb000 [nidx 12, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb000 [nidx 13, len 4]
> |1ad81000| xhci_trb_queue: ring 0x1adcb000 [nidx 14, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7f000| device rev=0110 cls=00 sub=00 proto=00 size=8
> |1ad7f000| xhci_realloc_pipe: usbdev 0x1ad82b40, ring 0x1adba400, slotid 5, epid 1
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 4, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 5, len 9]
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 6, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adba400, slotid 5, epid 1
> |1ad7f000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb0d0, evt 0x1adcb100, type 32, eidx 14, cc 1]
> |1ad7f000| xhci_process_events: ring 0x1adba400 [trb 0x1adba450, evt 0x1adba500, type 32, eidx 6, cc 1]
> |1ad7f000| _malloc zone=0x1ad8bf08 size=59 align=10 ret=0x1ad82830 (detail=0x1ad829d0)
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 7, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 8, len 59]
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 9, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adba400, slotid 5, epid 1
> |1ad81000| set_address 0x1adcbfb0
> |1ad7f000| xhci_process_events: ring 0x1adba400 [trb 0x1adba480, evt 0x1adba500, type 32, eidx 9, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 10, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 11, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adba400, slotid 5, epid 1
> |1ad81000| _malloc zone=0x1ad8befc size=316 align=100 ret=0x1adb9a00 (detail=0x1ad82800)
> |1ad81000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad827d0)
> |1ad81000| xhci_alloc_pipe: usbdev 0x1ad82ca0, ring 0x1adb9a00, slotid 0, epid 1
> |1ad81000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad7e800 (detail=0x1ad827a0)
> |1ad81000| xhci_cmd_configure_endpoint: slotid 3, add 0x1, del 0x0
> |1ad81000| xhci_trb_queue: ring 0x1adcbd00 [nidx 12, len 0]
> |1ad81000| xhci_process_events: ring 0x1adba400 [trb 0x1adba4a0, evt 0x1adba500, type 32, eidx 11, cc 1]
> |1ad81000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbdb0, evt 0x1adcbe00, type 33, eidx 12, cc 1]
> |1ad81000| _free 0x1ad7e800 (detail=0x1ad827a0)
> |1ad81000| _malloc zone=0x1ad8befc size=1024 align=400 ret=0x1adb9400 (detail=0x1ad827a0)
> |1ad81000| xhci_cmd_enable_slot:
> |1ad81000| xhci_trb_queue: ring 0x1adcbd00 [nidx 13, len 0]
> |1ad7f000| usb_hid_setup 0x1adba520
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 12, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 13, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adba400, slotid 5, epid 1
> |1ad7f000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbdc0, evt 0x1adcbe00, type 33, eidx 13, cc 1]
> |1ad7f000| xhci_process_events: ring 0x1adba400 [trb 0x1adba4c0, evt 0x1adba500, type 32, eidx 13, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 14, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adba400 [nidx 15, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adba400, slotid 5, epid 1
> |1ad81000| xhci_alloc_pipe: enable slot: got slotid 6
> |1ad81000| xhci_cmd_address_device: slotid 6
> |1ad81000| xhci_trb_queue: ring 0x1adcbd00 [nidx 14, len 0]
> |1ad81000| xhci_process_events: ring 0x1adba400 [trb 0x1adba4e0, evt 0x1adba500, type 32, eidx 15, cc 1]
> |1ad81000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbdd0, evt 0x1adcbe00, type 33, eidx 14, cc 1]
> |1ad81000| _free 0x1ad82000 (detail=0x1ad827d0)
> |1ad7f000| _malloc zone=0x1ad8bef8 size=316 align=100 ret=0x000ec200 (detail=0x1ad827d0)
> |1ad7f000| _malloc zone=0x1ad8befc size=8 align=10 ret=0x1adcbfa0 (detail=0x1ad82770)
> |1ad7f000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad82740)
> |1ad7f000| xhci_alloc_pipe: usbdev 0x1ad82b40, ring 0x000ec200, slotid 0, epid 3
> |1ad7f000| xhci_cmd_configure_endpoint: slotid 5, add 0x9, del 0x0
> |1ad7f000| xhci_trb_queue: ring 0x1adcbd00 [nidx 15, len 0]
> |1ad81000| xhci_realloc_pipe: usbdev 0x1ad82ca0, ring 0x1adb9a00, slotid 6, epid 1
> |1ad81000| config_usb: 0x1adb9b20
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 1, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 2, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 3, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adb9a00, slotid 6, epid 1
> |1ad81000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbde0, evt 0x1adcbe00, type 33, eidx 15, cc 1]
> |1ad81000| xhci_process_events: ring 0x1adb9a00 [trb 0x1adb9a20, evt 0x1adb9b00, type 32, eidx 3, cc 1]
> |1ad81000| device rev=0200 cls=00 sub=00 proto=00 size=8
> |1ad81000| xhci_realloc_pipe: usbdev 0x1ad82ca0, ring 0x1adb9a00, slotid 6, epid 1
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 4, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 5, len 9]
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 6, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adb9a00, slotid 6, epid 1
> |1ad7f000| _free 0x1ad82000 (detail=0x1ad82740)
> |1ad7f000| USB keyboard initialized
> |1ad7f000| _free 0x1ad82830 (detail=0x1ad829d0)
> |1ad7f000| _free 0x1ad82b40 (detail=0x1ad82b60)
> \1ad7f000/ End thread
> _free 0x1ad7f000 (detail=0x1ad82a30)
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x1adb9a00 [trb 0x1adb9a50, evt 0x1adb9b00, type 32, eidx 6, cc 1]
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> |1ad81000| _malloc zone=0x1ad8bf08 size=34 align=10 ret=0x1ad82a30 (detail=0x1ad82b60)
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 7, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 8, len 34]
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 9, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adb9a00, slotid 6, epid 1
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x1adb9a00 [trb 0x1adb9a80, evt 0x1adb9b00, type 32, eidx 9, cc 1]
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 10, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 11, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adb9a00, slotid 6, epid 1
> |1ad81000| xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> |1ad81000| xhci_process_events: ring 0x1adb9a00 [trb 0x1adb9aa0, evt 0x1adb9b00, type 32, eidx 11, cc 1]
> |1ad81000| usb_hid_setup 0x1adb9b20
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 12, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adb9a00 [nidx 13, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adb9a00, slotid 6, epid 1
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x1adb9a00 [trb 0x1adb9ac0, evt 0x1adb9b00, type 32, eidx 13, cc 1]
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad81000| _malloc zone=0x1ad8bef8 size=316 align=100 ret=0x000ec000 (detail=0x1ad829d0)
> |1ad81000| _malloc zone=0x1ad8befc size=6 align=10 ret=0x1adcbf90 (detail=0x1ad82840)
> |1ad81000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad82740)
> |1ad81000| xhci_alloc_pipe: usbdev 0x1ad82ca0, ring 0x000ec000, slotid 0, epid 3
> |1ad81000| xhci_cmd_configure_endpoint: slotid 6, add 0x9, del 0x0
> |1ad81000| xhci_trb_queue: ring 0x1adcbd00 [linked]
> |1ad81000| xhci_trb_queue: ring 0x1adcbd00 [nidx 1, len 0]
> |1ad81000| xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> |1ad81000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd00, evt 0x1adcbe00, type 33, eidx 1, cc 1]
> |1ad81000| _free 0x1ad82000 (detail=0x1ad82740)
> |1ad81000| USB mouse initialized
> |1ad81000| _free 0x1ad82a30 (detail=0x1ad82b60)
> |1ad81000| _free 0x1ad82ca0 (detail=0x1ad82cc0)
> \1ad81000/ End thread
> _free 0x1ad81000 (detail=0x1ad82c70)
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_trb_queue: ring 0x000ec000 [nidx 1, len 6]
> xhci_xfer_kick: ring 0x000ec000, slotid 6, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> |1ad7c000| Initialized USB HUB (2 ports used)
> |1ad7c000| _free 0x1ad82950 (detail=0x1ad82980)
> |1ad7c000| _free 0x1ad82600 (detail=0x1ad7ee70)
> \1ad7c000/ End thread
> _free 0x1ad7c000 (detail=0x1ad7ee40)
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> |1ad7d000| xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> |1ad7d000| WARNING - Timeout at xhci_event_wait:692!
> |1ad7d000| xhci_send_control: control xfer failed (cc -1)
> |1ad7d000| _free 0x1ad82870 (detail=0x1ad82890)
> |1ad7d000| _free 0x1ad82bc0 (detail=0x1ad82c10)
> \1ad7d000/ End thread
> _free 0x1ad7d000 (detail=0x1ad82b90)
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> \1ad80000/ End thread
> _free 0x1ad80000 (detail=0x1ad82e40)
> All threads complete.
> Scan for option roms
> Attempting to init PCI bdf 00:00.0 (vd 8086:0f00)
> Attempting to map option rom on dev 00:00.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:11.0 (vd 8086:0f15)
> Attempting to map option rom on dev 00:11.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:12.0 (vd 8086:0f16)
> Attempting to map option rom on dev 00:12.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:13.0 (vd 8086:0f23)
> Attempting to map option rom on dev 00:13.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:14.0 (vd 8086:0f35)
> Attempting to map option rom on dev 00:14.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.0 (vd 8086:0f40)
> Attempting to map option rom on dev 00:18.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.1 (vd 8086:0f41)
> Attempting to map option rom on dev 00:18.1
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.2 (vd 8086:0f42)
> Attempting to map option rom on dev 00:18.2
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.3 (vd 8086:0f43)
> Attempting to map option rom on dev 00:18.3
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.4 (vd 8086:0f44)
> Attempting to map option rom on dev 00:18.4
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.5 (vd 8086:0f45)
> Attempting to map option rom on dev 00:18.5
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.6 (vd 8086:0f46)
> Attempting to map option rom on dev 00:18.6
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.7 (vd 8086:0f47)
> Attempting to map option rom on dev 00:18.7
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1a.0 (vd 8086:0f18)
> Attempting to map option rom on dev 00:1a.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1b.0 (vd 8086:0f04)
> Attempting to map option rom on dev 00:1b.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1c.0 (vd 8086:0f48)
> Attempting to map option rom on dev 00:1c.0
> Skipping non-normal pci device (type=81)
> Attempting to init PCI bdf 00:1e.0 (vd 8086:0f06)
> Attempting to map option rom on dev 00:1e.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1e.1 (vd 8086:0f08)
> Attempting to map option rom on dev 00:1e.1
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1e.2 (vd 8086:0f09)
> Attempting to map option rom on dev 00:1e.2
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1e.3 (vd 8086:0f0a)
> Attempting to map option rom on dev 00:1e.3
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1e.4 (vd 8086:0f0c)
> Attempting to map option rom on dev 00:1e.4
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1e.5 (vd 8086:0f0e)
> Attempting to map option rom on dev 00:1e.5
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1f.0 (vd 8086:0f1c)
> Attempting to map option rom on dev 00:1f.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1f.3 (vd 8086:0f12)
> Attempting to map option rom on dev 00:1f.3
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 01:00.0 (vd 8086:1538)
> Attempting to map option rom on dev 01:00.0
> Option rom sizing returned 0 0
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
>
> Press F12 for boot menu.
>
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> Searching bootorder for: HALT
> finalize PMM
> malloc finalize
> Add to e820 map: 0009fc00 00000400 2
> Space available for UMB: ce800-eb800, f30a0-f3830
> Add to e820 map: 1ad8c000 0002d000 1
> Returned 184320 bytes of ZoneHigh
> e820 map has 15 items:
> 0: 0000000000000000 - 000000000009fc00 = 1 RAM
> 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
> 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
> 3: 0000000000100000 - 000000001adb9000 = 1 RAM
> 4: 000000001adb9000 - 0000000020000000 = 2 RESERVED
> 5: 00000000e0000000 - 00000000f0000000 = 2 RESERVED
> 6: 00000000feb00000 - 00000000fec01000 = 2 RESERVED
> 7: 00000000fed01000 - 00000000fed02000 = 2 RESERVED
> 8: 00000000fed03000 - 00000000fed04000 = 2 RESERVED
> 9: 00000000fed05000 - 00000000fed06000 = 2 RESERVED
> 10: 00000000fed08000 - 00000000fed09000 = 2 RESERVED
> 11: 00000000fed0c000 - 00000000fed10000 = 2 RESERVED
> 12: 00000000fed1c000 - 00000000fed1d000 = 2 RESERVED
> 13: 00000000fee00000 - 00000000fee01000 = 2 RESERVED
> 14: 00000000fef00000 - 0000000100000000 = 2 RESERVED
> Jump to int19
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> enter handle_19:
> NULL
> Booting from Floppy...
> invalid handle_legacy_disk:696:
> a=00000201 b=00000000 c=00000001 d=00000000 ds=0000 es=07c0 ss=dd80
> si=00000000 di=00000000 bp=00000000 sp=0000fb9e cs=f000 ip=ccef f=0202
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> Boot failed: could not read the boot disk
>
> enter handle_18:
> NULL
> Booting from Hard Disk...
> invalid handle_legacy_disk:696:
> a=00000201 b=00000000 c=00000001 d=00000080 ds=0000 es=07c0 ss=dd80
> si=00000000 di=00000000 bp=00000000 sp=0000fb9e cs=f000 ip=ccef f=0202
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> Boot failed: could not read the boot disk
>
> enter handle_18:
> NULL
> No bootable device. Retrying in 60 seconds.
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2b0, evt 0x000ec300, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2c0, evt 0x000ec300, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2d0, evt 0x000ec300, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2e0, evt 0x000ec300, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [linked]
> xhci_trb_queue: ring 0x000ec200 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 5038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec290, evt 0x000ec300, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 5038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ec200 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ec200, slotid 5, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec2a0, evt 0x000ec300, type 32, eidx 11, cc 1]
> xhci_poll_in?
> ?SeaBIOS (version rel-1.7.5-116-g56b252e-dirty-20141210_064921-deerlf0x73)
> Attempting to find coreboot table
> Found coreboot table forwarder.
> Now attempting to find coreboot memory map
> Add to e820 map: 00000000 00001000 2
> Add to e820 map: 00001000 0009f000 1
> Add to e820 map: 000a0000 00060000 2
> Add to e820 map: 00100000 1accc000 1
> Add to e820 map: 1adcc000 00034000 2
> Add to e820 map: 1ae00000 05200000 2
> Add to e820 map: e0000000 10000000 2
> Add to e820 map: feb00000 00101000 2
> Add to e820 map: fed01000 00001000 2
> Add to e820 map: fed03000 00001000 2
> Add to e820 map: fed05000 00001000 2
> Add to e820 map: fed08000 00001000 2
> Add to e820 map: fed0c000 00004000 2
> Add to e820 map: fed1c000 00001000 2
> Add to e820 map: fee00000 00001000 2
> Add to e820 map: fef00000 01100000 2
> Add to e820 map: 00000000 00004000 1
> Found mainboard Siemens MC_TCU3 (FSP)
> malloc preinit
> Add to e820 map: 000a0000 00050000 -1
> Add to e820 map: 000f0000 00010000 2
> Add to e820 map: 1ad8c000 00040000 2
> _malloc zone=0x000ed3c8 size=32000 align=20 ret=0x1ad84240 (detail=0x1ad8bf40)
> Relocating init from 0x000e5700 to 0x1ad84240 (size 32000)
> malloc init
> Found CBFS header at 0xfffffbe0
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad84110 (detail=0x1ad841b0)
> Add romfile: cmos_layout.bin (size=1132)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad84040 (detail=0x1ad840e0)
> Add romfile: pci8086,0f31.rom (size=65536)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83f70 (detail=0x1ad84010)
> Add romfile: fallback/romstage (size=29817)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83ea0 (detail=0x1ad83f40)
> Add romfile: fallback/ramstage (size=67313)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83dd0 (detail=0x1ad83e70)
> Add romfile: fallback/payload (size=54924)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83d00 (detail=0x1ad83da0)
> Add romfile: config (size=4151)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83c30 (detail=0x1ad83cd0)
> Add romfile: (size=13473624)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83b60 (detail=0x1ad83c00)
> Add romfile: cpu_microcode_blob.bin (size=208896)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83a90 (detail=0x1ad83b30)
> Add romfile: (size=53080)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad839c0 (detail=0x1ad83a60)
> Add romfile: mrc.cache (size=65536)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad838f0 (detail=0x1ad83990)
> Add romfile: (size=393112)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83820 (detail=0x1ad838c0)
> Add romfile: fsp.bin (size=229376)
> _malloc zone=0x1ad8bf08 size=156 align=10 ret=0x1ad83750 (detail=0x1ad837f0)
> Add romfile: (size=31640)
> init ivt
> init bda
> Add to e820 map: 0009fc00 00000400 2
> init bios32
> init PMM
> init PNPBIOS table
> init keyboard
> init mouse
> init pic
> math cp init
> tsc calibrate start=1186229964 end=1188948693 diff=2718729
> CPU Mhz=1584
> init timer
> PCI probe
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83700 (detail=0x1ad83720)
> PCI device 00:00.0 (vd=8086:0f00 c=0600)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad836b0 (detail=0x1ad836d0)
> PCI device 00:02.0 (vd=8086:0f31 c=0300)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83660 (detail=0x1ad83680)
> PCI device 00:11.0 (vd=8086:0f15 c=0805)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83610 (detail=0x1ad83630)
> PCI device 00:12.0 (vd=8086:0f16 c=0805)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad835c0 (detail=0x1ad835e0)
> PCI device 00:13.0 (vd=8086:0f23 c=0106)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83570 (detail=0x1ad83590)
> PCI device 00:14.0 (vd=8086:0f35 c=0c03)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83520 (detail=0x1ad83540)
> PCI device 00:18.0 (vd=8086:0f40 c=0801)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad834d0 (detail=0x1ad834f0)
> PCI device 00:18.1 (vd=8086:0f41 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83480 (detail=0x1ad834a0)
> PCI device 00:18.2 (vd=8086:0f42 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83430 (detail=0x1ad83450)
> PCI device 00:18.3 (vd=8086:0f43 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad833e0 (detail=0x1ad83400)
> PCI device 00:18.4 (vd=8086:0f44 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83390 (detail=0x1ad833b0)
> PCI device 00:18.5 (vd=8086:0f45 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83340 (detail=0x1ad83360)
> PCI device 00:18.6 (vd=8086:0f46 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad832f0 (detail=0x1ad83310)
> PCI device 00:18.7 (vd=8086:0f47 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad832a0 (detail=0x1ad832c0)
> PCI device 00:1a.0 (vd=8086:0f18 c=1080)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83250 (detail=0x1ad83270)
> PCI device 00:1b.0 (vd=8086:0f04 c=0403)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83200 (detail=0x1ad83220)
> PCI device 00:1c.0 (vd=8086:0f48 c=0604)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad831b0 (detail=0x1ad831d0)
> PCI device 00:1e.0 (vd=8086:0f06 c=0801)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83160 (detail=0x1ad83180)
> PCI device 00:1e.1 (vd=8086:0f08 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83110 (detail=0x1ad83130)
> PCI device 00:1e.2 (vd=8086:0f09 c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad830c0 (detail=0x1ad830e0)
> PCI device 00:1e.3 (vd=8086:0f0a c=0780)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83070 (detail=0x1ad83090)
> PCI device 00:1e.4 (vd=8086:0f0c c=0780)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad83020 (detail=0x1ad83040)
> PCI device 00:1e.5 (vd=8086:0f0e c=0c80)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82fd0 (detail=0x1ad82ff0)
> PCI device 00:1f.0 (vd=8086:0f1c c=0601)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82f80 (detail=0x1ad82fa0)
> PCI device 00:1f.3 (vd=8086:0f12 c=0c05)
> _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82f30 (detail=0x1ad82f50)
> PCI device 01:00.0 (vd=8086:1538 c=0200)
> Found 26 PCI devices (max PCI bus is 01)
> Relocating coreboot bios tables
> _malloc zone=0x1ad8bf00 size=31 align=10 ret=0x000f3880 (detail=0x1ad82f00)
> Copying SMBIOS entry point from 0x1add4000 to 0x000f3880
> _malloc zone=0x1ad8bf00 size=36 align=10 ret=0x000f3850 (detail=0x1ad82ed0)
> Copying ACPI RSDP from 0x1add6000 to 0x000f3850
> rsdp=0x000f3850
> rsdt=0x1add6030
> fadt=0x1add8ce0
> pm_tmr_blk=408
> Using pmtimer, ioport 0x408
> Scan for VGA option rom
> Attempting to init PCI bdf 00:02.0 (vd 8086:0f31)
> Copying data 65536@0xff2004f8 to 65536@0x000c0000
> Checking rom 0x000c0000 (sig aa55 size 128)
> Running option rom at c000:0003
> Turning on vga text mode console
> SeaBIOS (version rel-1.7.5-116-g56b252e-dirty-20141210_064921-deerlf0x73)
> _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad81000 (detail=0x1ad82ea0)
> /1ad81000\ Start thread
> |1ad81000| init usb
> |1ad81000| _malloc zone=0x1ad8befc size=72 align=10 ret=0x1adcbfb0 (detail=0x1ad82e70)
> |1ad81000| XHCI init on dev 00:14.0: regs @ 0xd0700000, 7 ports, 32 slots, 32 byte contexts
> |1ad81000| XHCI protocol USB 2.00, 6 ports (offset 1), def 3018
> |1ad81000| XHCI protocol USB 3.00, 1 ports (offset 7), def 1000
> |1ad81000| XHCI extcap 0xc1 @ d0708040
> |1ad81000| XHCI extcap 0xc0 @ d0708070
> |1ad81000| XHCI extcap 0x1 @ d0708460
> |1ad81000| XHCI extcap 0xa @ d0708480
> |1ad81000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad80000 (detail=0x1ad82e40)
> /1ad80000\ Start thread
> |1ad80000| _malloc zone=0x1ad8befc size=264 align=40 ret=0x1adcbe80 (detail=0x1ad82e10)
> |1ad80000| _malloc zone=0x1ad8befc size=16 align=40 ret=0x1adcbe40 (detail=0x1ad82de0)
> |1ad80000| _malloc zone=0x1ad8befc size=288 align=100 ret=0x1adcbd00 (detail=0x1ad82db0)
> |1ad80000| _malloc zone=0x1ad8befc size=288 align=100 ret=0x1adcbb00 (detail=0x1ad82d80)
> |1ad80000| configure_xhci: resetting
> init ps2port
> _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7f000 (detail=0x1ad82d50)
> /1ad7f000\ Start thread
> |1ad7f000| i8042_flush
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| i8042 flushed ff (status=ff)
> |1ad7f000| WARNING - Timeout at i8042_flush:71!
> \1ad7f000/ End thread
> _free 0x1ad7f000 (detail=0x1ad82d50)
> \1ad81000/ End thread
> _free 0x1ad81000 (detail=0x1ad82ea0)
> |1ad80000| configure_xhci: setup 16 scratch pad buffers
> |1ad80000| _malloc zone=0x1ad8befc size=128 align=40 ret=0x1adcbc80 (detail=0x1ad82ea0)
> |1ad80000| _malloc zone=0x1ad8befc size=65536 align=1000 ret=0x1adbb000 (detail=0x1ad82d50)
> init lpt
> Found 0 lpt ports
> init serial
> Found 1 serial ports
> init floppy drives
> init hard drives
> init ahci
> _malloc zone=0x1ad8bf00 size=20 align=10 ret=0x000f3830 (detail=0x1ad82d20)
> _malloc zone=0x1ad8bef8 size=2048 align=10 ret=0x000ec390 (detail=0x1ad82cf0)
> AHCI controller at 13.0, iobase d073a000, irq 10
> AHCI: cap 0xcf20ff21, ports_impl 0x3
> _malloc zone=0x1ad8bf08 size=68 align=10 ret=0x1ad82c70 (detail=0x1ad82cc0)
> _malloc zone=0x1ad8bf08 size=1024 align=400 ret=0x1ad82800 (detail=0x1ad82c40)
> _malloc zone=0x1ad8bf08 size=256 align=100 ret=0x1ad82700 (detail=0x1ad82c10)
> _malloc zone=0x1ad8bf08 size=256 align=100 ret=0x1ad82500 (detail=0x1ad826d0)
> _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad81000 (detail=0x1ad826a0)
> /1ad81000\ Start thread
> |1ad81000| AHCI/0: probing
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82650 (detail=0x1ad82670)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7f000 (detail=0x1ad82620)
> /1ad7f000\ Start thread
> |1ad7f000| xhci_hub_reset port #1: 0x000206e1, powered, pls 7, speed 1 [Full]
> _malloc zone=0x1ad8bf08 size=68 align=10 ret=0x1ad82480 (detail=0x1ad824d0)
> _malloc zone=0x1ad8bf08 size=1024 align=400 ret=0x1ad82000 (detail=0x1ad82450)
> _malloc zone=0x1ad8bf08 size=256 align=100 ret=0x1ad7ef00 (detail=0x1ad82420)
> _malloc zone=0x1ad8bf08 size=256 align=100 ret=0x1ad7ed00 (detail=0x1ad7eed0)
> _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7d000 (detail=0x1ad7eea0)
> /1ad7d000\ Start thread
> |1ad7d000| AHCI/1: probing
> |1ad81000| AHCI/0: link down
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82600 (detail=0x1ad7ee70)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7c000 (detail=0x1ad7ee40)
> /1ad7c000\ Start thread
> init megasas
> |1ad7d000| AHCI/1: link down
> |1ad81000| _free 0x1ad82800 (detail=0x1ad82c40)
> |1ad81000| _free 0x1ad82700 (detail=0x1ad82c10)
> |1ad81000| _free 0x1ad82500 (detail=0x1ad826d0)
> |1ad81000| _free 0x1ad82c70 (detail=0x1ad82cc0)
> \1ad81000/ End thread
> _free 0x1ad81000 (detail=0x1ad826a0)
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82ca0 (detail=0x1ad82cc0)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad81000 (detail=0x1ad82c70)
> /1ad81000\ Start thread
> |1ad7f000| WARNING - Timeout at wait_bit:310!
> |1ad7f000| _free 0x1ad82650 (detail=0x1ad82670)
> \1ad7f000/ End thread
> _free 0x1ad7f000 (detail=0x1ad82620)
> |1ad7d000| _free 0x1ad82000 (detail=0x1ad82450)
> |1ad7d000| _free 0x1ad7ef00 (detail=0x1ad82420)
> |1ad7d000| _free 0x1ad7ed00 (detail=0x1ad7eed0)
> |1ad7d000| _free 0x1ad82480 (detail=0x1ad824d0)
> \1ad7d000/ End thread
> _free 0x1ad7d000 (detail=0x1ad7eea0)
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82c20 (detail=0x1ad82c40)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7f000 (detail=0x1ad82bf0)
> /1ad7f000\ Start thread
> |1ad7f000| _free 0x1ad82c20 (detail=0x1ad82c40)
> \1ad7f000/ End thread
> _free 0x1ad7f000 (detail=0x1ad82bf0)
> |1ad81000| xhci_hub_reset port #3: 0x000206e1, powered, pls 7, speed 1 [Full]
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82c20 (detail=0x1ad82c40)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7f000 (detail=0x1ad82bf0)
> /1ad7f000\ Start thread
> |1ad7f000| _free 0x1ad82c20 (detail=0x1ad82c40)
> \1ad7f000/ End thread
> _free 0x1ad7f000 (detail=0x1ad82bf0)
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82c20 (detail=0x1ad82c40)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7f000 (detail=0x1ad82bf0)
> /1ad7f000\ Start thread
> |1ad7f000| _free 0x1ad82c20 (detail=0x1ad82c40)
> \1ad7f000/ End thread
> _free 0x1ad7f000 (detail=0x1ad82bf0)
> |1ad81000| XHCI port #3: 0x00200603, powered, enabled, pls 0, speed 1 [Full]
> |1ad81000| set_address 0x1adcbfb0
> |1ad80000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82c20 (detail=0x1ad82c40)
> |1ad80000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7f000 (detail=0x1ad82bf0)
> /1ad7f000\ Start thread
> |1ad81000| _malloc zone=0x1ad8befc size=316 align=100 ret=0x1adcb900 (detail=0x1ad82bc0)
> |1ad81000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad82b90)
> |1ad81000| xhci_alloc_pipe: usbdev 0x1ad82ca0, ring 0x1adcb900, slotid 0, epid 1
> |1ad81000| _malloc zone=0x1ad8befc size=1024 align=400 ret=0x1adcb400 (detail=0x1ad82b60)
> |1ad81000| xhci_cmd_enable_slot:
> |1ad81000| xhci_trb_queue: ring 0x1adcbd00 [nidx 1, len 0]
> |1ad81000| xhci_process_events: status change port #1
> |1ad81000| xhci_process_events: status change port #2
> |1ad81000| xhci_process_events: status change port #3
> |1ad81000| xhci_process_events: status change port #1
> |1ad81000| xhci_process_events: status change port #7
> |1ad81000| xhci_process_events: status change port #3
> |1ad81000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd00, evt 0x1adcbe00, type 33, eidx 1, cc 1]
> |1ad81000| xhci_alloc_pipe: enable slot: got slotid 1
> |1ad81000| xhci_cmd_address_device: slotid 1
> |1ad81000| xhci_trb_queue: ring 0x1adcbd00 [nidx 2, len 0]
> |1ad81000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd10, evt 0x1adcbe00, type 33, eidx 2, cc 1]
> |1ad81000| _free 0x1ad82000 (detail=0x1ad82b90)
> |1ad81000| xhci_realloc_pipe: usbdev 0x1ad82ca0, ring 0x1adcb900, slotid 1, epid 1
> |1ad81000| config_usb: 0x1adcba20
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 1, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 2, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 3, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7c000| xhci_hub_reset port #2: 0x000206e1, powered, pls 7, speed 1 [Full]
> |1ad81000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb920, evt 0x1adcba00, type 32, eidx 3, cc 1]
> |1ad81000| device rev=0110 cls=09 sub=00 proto=00 size=8
> |1ad81000| xhci_realloc_pipe: usbdev 0x1ad82ca0, ring 0x1adcb900, slotid 1, epid 1
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 4, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 5, len 9]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 6, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad81000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb950, evt 0x1adcba00, type 32, eidx 6, cc 1]
> |1ad81000| xhci_process_events: status change port #2
> |1ad81000| _malloc zone=0x1ad8bf08 size=25 align=10 ret=0x1ad82b40 (detail=0x1ad82b90)
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 7, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 8, len 25]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 9, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7c000| XHCI port #2: 0x00200e03, powered, enabled, pls 0, speed 3 [High]
> |1ad7c000| set_address 0x1adcbfb0
> |1ad81000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb980, evt 0x1adcba00, type 32, eidx 9, cc 1]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 10, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 11, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7c000| _malloc zone=0x1ad8befc size=316 align=100 ret=0x1adcb200 (detail=0x1ad82b10)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad82ae0)
> |1ad7c000| xhci_alloc_pipe: usbdev 0x1ad82600, ring 0x1adcb200, slotid 0, epid 1
> |1ad7c000| _malloc zone=0x1ad8befc size=1024 align=400 ret=0x1adbac00 (detail=0x1ad82ab0)
> |1ad7c000| xhci_cmd_enable_slot:
> |1ad7c000| xhci_trb_queue: ring 0x1adcbd00 [nidx 3, len 0]
> |1ad7c000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb9a0, evt 0x1adcba00, type 32, eidx 11, cc 1]
> |1ad7c000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd20, evt 0x1adcbe00, type 33, eidx 3, cc 1]
> |1ad7c000| xhci_alloc_pipe: enable slot: got slotid 2
> |1ad7c000| xhci_cmd_address_device: slotid 2
> |1ad7c000| xhci_trb_queue: ring 0x1adcbd00 [nidx 4, len 0]
> |1ad81000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd30, evt 0x1adcbe00, type 33, eidx 4, cc 1]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 12, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 13, len 7]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 14, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7c000| _free 0x1ad82000 (detail=0x1ad82ae0)
> |1ad81000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb9d0, evt 0x1adcba00, type 32, eidx 14, cc 1]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 15, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [linked]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 1, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7c000| xhci_realloc_pipe: usbdev 0x1ad82600, ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| config_usb: 0x1adcb320
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 1, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 2, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 3, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb900, evt 0x1adcba00, type 32, eidx 1, cc 1]
> |1ad7c000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb220, evt 0x1adcb300, type 32, eidx 3, cc 1]
> |1ad7c000| device rev=0200 cls=09 sub=00 proto=02 size=64
> |1ad7c000| xhci_realloc_pipe: usbdev 0x1ad82600, ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 4, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 5, len 9]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 6, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7f000| XHCI port #7: 0x00021203, powered, enabled, pls 0, speed 4 [Super]
> |1ad7f000| set_address 0x1adcbfb0
> |1ad81000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb250, evt 0x1adcb300, type 32, eidx 6, cc 1]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 2, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 3, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7c000| _malloc zone=0x1ad8bf08 size=41 align=10 ret=0x1ad82a80 (detail=0x1ad82ae0)
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 7, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 8, len 41]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 9, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb920, evt 0x1adcba00, type 32, eidx 3, cc 1]
> |1ad7c000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb280, evt 0x1adcb300, type 32, eidx 9, cc 1]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 10, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 11, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7f000| _malloc zone=0x1ad8befc size=316 align=100 ret=0x1adcb000 (detail=0x1ad82a50)
> |1ad7f000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad82a20)
> |1ad7f000| xhci_alloc_pipe: usbdev 0x1ad82c20, ring 0x1adcb000, slotid 0, epid 1
> |1ad7f000| _malloc zone=0x1ad8befc size=1024 align=400 ret=0x1adba800 (detail=0x1ad829f0)
> |1ad7f000| xhci_cmd_enable_slot:
> |1ad7f000| xhci_trb_queue: ring 0x1adcbd00 [nidx 5, len 0]
> |1ad7f000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb2a0, evt 0x1adcb300, type 32, eidx 11, cc 1]
> |1ad7f000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd40, evt 0x1adcbe00, type 33, eidx 5, cc 1]
> |1ad7f000| xhci_alloc_pipe: enable slot: got slotid 3
> |1ad7f000| xhci_cmd_address_device: slotid 3
> |1ad7f000| xhci_trb_queue: ring 0x1adcbd00 [nidx 6, len 0]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 4, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 5, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad81000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd50, evt 0x1adcbe00, type 33, eidx 6, cc 1]
> |1ad81000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb940, evt 0x1adcba00, type 32, eidx 5, cc 1]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 6, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb900 [nidx 7, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 12, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 13, len 7]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 14, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb960, evt 0x1adcba00, type 32, eidx 7, cc 1]
> |1ad7c000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb2d0, evt 0x1adcb300, type 32, eidx 14, cc 1]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 15, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [linked]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 1, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7f000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb200, evt 0x1adcb300, type 32, eidx 1, cc 1]
> |1ad7f000| _free 0x1ad82000 (detail=0x1ad82a20)
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 2, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 3, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7f000| xhci_realloc_pipe: usbdev 0x1ad82c20, ring 0x1adcb000, slotid 3, epid 1
> |1ad7f000| config_usb: 0x1adcb120
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 1, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 2, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 3, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad7f000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb220, evt 0x1adcb300, type 32, eidx 3, cc 1]
> |1ad7f000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb020, evt 0x1adcb100, type 32, eidx 3, cc 1]
> |1ad7f000| device rev=0300 cls=00 sub=00 proto=00 size=512
> |1ad7f000| xhci_realloc_pipe: usbdev 0x1ad82c20, ring 0x1adcb000, slotid 3, epid 1
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 4, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 5, len 9]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 6, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad81000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad829d0 (detail=0x1ad82a20)
> |1ad81000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7d000 (detail=0x1ad829a0)
> /1ad7d000\ Start thread
> |1ad7d000| xhci_trb_queue: ring 0x1adcb900 [nidx 8, len 8]
> |1ad7d000| xhci_trb_queue: ring 0x1adcb900 [nidx 9, len 4]
> |1ad7d000| xhci_trb_queue: ring 0x1adcb900 [nidx 10, len 0]
> |1ad7d000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7d000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb050, evt 0x1adcb100, type 32, eidx 6, cc 1]
> |1ad7d000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb990, evt 0x1adcba00, type 32, eidx 10, cc 1]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 4, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 5, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7f000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb240, evt 0x1adcb300, type 32, eidx 5, cc 1]
> |1ad7f000| _malloc zone=0x1ad8bf08 size=44 align=10 ret=0x1ad82940 (detail=0x1ad82970)
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 7, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 8, len 44]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 9, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad81000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad828f0 (detail=0x1ad82910)
> |1ad81000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7b000 (detail=0x1ad828c0)
> /1ad7b000\ Start thread
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 11, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 12, len 4]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 13, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7b000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb080, evt 0x1adcb100, type 32, eidx 9, cc 1]
> |1ad7b000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb9c0, evt 0x1adcba00, type 32, eidx 13, cc 1]
> |1ad7b000| _free 0x1ad828f0 (detail=0x1ad82910)
> \1ad7b000/ End thread
> _free 0x1ad7b000 (detail=0x1ad828c0)
> |1ad7d000| xhci_trb_queue: ring 0x1adcb900 [nidx 14, len 8]
> |1ad7d000| xhci_trb_queue: ring 0x1adcb900 [nidx 15, len 4]
> |1ad7d000| xhci_trb_queue: ring 0x1adcb900 [linked]
> |1ad7d000| xhci_trb_queue: ring 0x1adcb900 [nidx 1, len 0]
> |1ad7d000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 6, len 8]
> |1ad7c000| xhci_trb_queue: ring 0x1adcb200 [nidx 7, len 0]
> |1ad7c000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7c000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb900, evt 0x1adcba00, type 32, eidx 1, cc 1]
> |1ad7c000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb260, evt 0x1adcb300, type 32, eidx 7, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 10, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 11, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad81000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad828f0 (detail=0x1ad82910)
> |1ad81000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7b000 (detail=0x1ad828c0)
> /1ad7b000\ Start thread
> |1ad7d000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb0a0, evt 0x1adcb100, type 32, eidx 11, cc 1]
> |1ad7d000| _free 0x1ad829d0 (detail=0x1ad82a20)
> \1ad7d000/ End thread
> _free 0x1ad7d000 (detail=0x1ad829a0)
> |1ad7f000| _malloc zone=0x1ad8bef8 size=316 align=100 ret=0x000ec200 (detail=0x1ad82a20)
> |1ad7f000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad829c0)
> |1ad7f000| xhci_alloc_pipe: usbdev 0x1ad82c20, ring 0x000ec200, slotid 0, epid 3
> |1ad7f000| xhci_cmd_configure_endpoint: slotid 3, add 0x9, del 0x0
> |1ad7f000| xhci_trb_queue: ring 0x1adcbd00 [nidx 7, len 0]
> |1ad81000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad829a0 (detail=0x1ad82890)
> |1ad81000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7d000 (detail=0x1ad82860)
> /1ad7d000\ Start thread
> |1ad7d000| xhci_trb_queue: ring 0x1adcb900 [nidx 2, len 8]
> |1ad7d000| xhci_trb_queue: ring 0x1adcb900 [nidx 3, len 4]
> |1ad7d000| xhci_trb_queue: ring 0x1adcb900 [nidx 4, len 0]
> |1ad7d000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7d000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd60, evt 0x1adcbe00, type 33, eidx 7, cc 1]
> |1ad7d000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb930, evt 0x1adcba00, type 32, eidx 4, cc 1]
> |1ad7d000| _free 0x1ad829a0 (detail=0x1ad82890)
> \1ad7d000/ End thread
> _free 0x1ad7d000 (detail=0x1ad82860)
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 5, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 6, len 4]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb900 [nidx 7, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adcb900, slotid 1, epid 1
> |1ad7c000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad829a0 (detail=0x1ad82890)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7d000 (detail=0x1ad82860)
> /1ad7d000\ Start thread
> |1ad7d000| xhci_trb_queue: ring 0x1adcb200 [nidx 8, len 8]
> |1ad7d000| xhci_trb_queue: ring 0x1adcb200 [nidx 9, len 4]
> |1ad7d000| xhci_trb_queue: ring 0x1adcb200 [nidx 10, len 0]
> |1ad7d000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7d000| xhci_process_events: ring 0x1adcb900 [trb 0x1adcb960, evt 0x1adcba00, type 32, eidx 7, cc 1]
> |1ad7d000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb290, evt 0x1adcb300, type 32, eidx 10, cc 1]
> |1ad7f000| _free 0x1ad82000 (detail=0x1ad829c0)
> |1ad7f000| _malloc zone=0x1ad8bef8 size=316 align=100 ret=0x000ec000 (detail=0x1ad829c0)
> |1ad7f000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad82830)
> |1ad7f000| xhci_alloc_pipe: usbdev 0x1ad82c20, ring 0x000ec000, slotid 0, epid 4
> |1ad7f000| xhci_cmd_configure_endpoint: slotid 3, add 0x11, del 0x0
> |1ad7f000| xhci_trb_queue: ring 0x1adcbd00 [nidx 8, len 0]
> |1ad7b000| _free 0x1ad828f0 (detail=0x1ad82910)
> \1ad7b000/ End thread
> _free 0x1ad7b000 (detail=0x1ad828c0)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad828f0 (detail=0x1ad82910)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7b000 (detail=0x1ad828c0)
> /1ad7b000\ Start thread
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 11, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 12, len 4]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 13, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7b000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd70, evt 0x1adcbe00, type 33, eidx 8, cc 1]
> |1ad7b000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb2c0, evt 0x1adcb300, type 32, eidx 13, cc 1]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 14, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 15, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7f000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb2e0, evt 0x1adcb300, type 32, eidx 15, cc 1]
> |1ad7f000| _free 0x1ad82000 (detail=0x1ad82830)
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 12, len 8]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 13, len 1]
> |1ad7f000| xhci_trb_queue: ring 0x1adcb000 [nidx 14, len 0]
> |1ad7f000| xhci_xfer_kick: ring 0x1adcb000, slotid 3, epid 1
> |1ad81000| Initialized USB HUB (0 ports used)
> |1ad81000| _free 0x1ad82b40 (detail=0x1ad82b90)
> |1ad81000| _free 0x1ad82ca0 (detail=0x1ad82cc0)
> \1ad81000/ End thread
> _free 0x1ad81000 (detail=0x1ad82c70)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82ca0 (detail=0x1ad82cc0)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad81000 (detail=0x1ad82c70)
> /1ad81000\ Start thread
> |1ad7b000| xhci_process_events: ring 0x1adcb000 [trb 0x1adcb0d0, evt 0x1adcb100, type 32, eidx 14, cc 1]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [linked]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 1, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 2, len 4]
> |1ad7b000| xhci_trb_queue: ring 0x1adcb200 [nidx 3, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7f000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb220, evt 0x1adcb300, type 32, eidx 3, cc 1]
> |1ad7f000| _malloc zone=0x1ad8bf00 size=48 align=10 ret=0x000f3800 (detail=0x1ad82b90)
> |1ad7f000| Searching bootorder for: /pci@i0cf8/usb@14/storage@7/*@0/*@0,0
> |1ad7f000| Searching bootorder for: /pci@i0cf8/usb@14/usb-*@7
> |1ad7f000| xhci_trb_queue: ring 0x000ec000 [nidx 1, len 31]
> |1ad7f000| xhci_xfer_kick: ring 0x000ec000, slotid 3, epid 4
> |1ad7c000| _malloc zone=0x1ad8bf08 size=32 align=10 ret=0x1ad82b40 (detail=0x1ad82830)
> |1ad7c000| _malloc zone=0x1ad8bf08 size=4096 align=1000 ret=0x1ad7a000 (detail=0x1ad82800)
> /1ad7a000\ Start thread
> |1ad7b000| xhci_process_events: ring 0x000ec000 [trb 0x000ec000, evt 0x000ec100, type 32, eidx 1, cc 1]
> |1ad7b000| set_address 0x1adcbfb0
> |1ad7d000| xhci_trb_queue: ring 0x1adcb200 [nidx 4, len 8]
> |1ad7d000| xhci_trb_queue: ring 0x1adcb200 [nidx 5, len 4]
> |1ad7d000| xhci_trb_queue: ring 0x1adcb200 [nidx 6, len 0]
> |1ad7d000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7f000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb250, evt 0x1adcb300, type 32, eidx 6, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x000ec200 [nidx 1, len 36]
> |1ad7f000| xhci_xfer_kick: ring 0x000ec200, slotid 3, epid 3
> |1ad7b000| _malloc zone=0x1ad8befc size=316 align=100 ret=0x1adba600 (detail=0x1ad827d0)
> |1ad7b000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad827a0)
> |1ad7b000| xhci_alloc_pipe: usbdev 0x1ad828f0, ring 0x1adba600, slotid 0, epid 1
> |1ad7b000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad7e800 (detail=0x1ad82770)
> |1ad7b000| xhci_cmd_configure_endpoint: slotid 2, add 0x1, del 0x0
> |1ad7b000| xhci_trb_queue: ring 0x1adcbd00 [nidx 9, len 0]
> |1ad7b000| xhci_process_events: ring 0x000ec200 [trb 0x000ec200, evt 0x000ec300, type 32, eidx 1, cc 1]
> |1ad7b000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd80, evt 0x1adcbe00, type 33, eidx 9, cc 1]
> |1ad7b000| _free 0x1ad7e800 (detail=0x1ad82770)
> |1ad7b000| _malloc zone=0x1ad8befc size=1024 align=400 ret=0x1adba000 (detail=0x1ad82770)
> |1ad7b000| xhci_cmd_enable_slot:
> |1ad7b000| xhci_trb_queue: ring 0x1adcbd00 [nidx 10, len 0]
> |1ad7d000| _free 0x1ad829a0 (detail=0x1ad82890)
> \1ad7d000/ End thread
> _free 0x1ad7d000 (detail=0x1ad82860)
> |1ad7f000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd90, evt 0x1adcbe00, type 33, eidx 10, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x000ec200 [nidx 2, len 13]
> |1ad7f000| xhci_xfer_kick: ring 0x000ec200, slotid 3, epid 3
> |1ad7f000| xhci_process_events: ring 0x000ec200 [trb 0x000ec210, evt 0x000ec300, type 32, eidx 2, cc 1]
> |1ad7f000| USB MSC vendor='Intenso' product='Ultra Line' rev='1.00' type=0 removable=1
> |1ad7f000| scsi_is_ready (drive=0x000f3800)
> |1ad7f000| xhci_trb_queue: ring 0x000ec000 [nidx 2, len 31]
> |1ad7f000| xhci_xfer_kick: ring 0x000ec000, slotid 3, epid 4
> |1ad7f000| xhci_process_events: ring 0x000ec000 [trb 0x000ec010, evt 0x000ec100, type 32, eidx 2, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x000ec200 [nidx 3, len 13]
> |1ad7f000| xhci_xfer_kick: ring 0x000ec200, slotid 3, epid 3
> |1ad7f000| xhci_process_events: ring 0x000ec200 [trb 0x000ec220, evt 0x000ec300, type 32, eidx 3, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x000ec000 [nidx 3, len 31]
> |1ad7f000| xhci_xfer_kick: ring 0x000ec000, slotid 3, epid 4
> |1ad7f000| xhci_process_events: ring 0x000ec000 [trb 0x000ec020, evt 0x000ec100, type 32, eidx 3, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x000ec200 [nidx 4, len 8]
> |1ad7f000| xhci_xfer_kick: ring 0x000ec200, slotid 3, epid 3
> |1ad7f000| xhci_process_events: ring 0x000ec200 [trb 0x000ec230, evt 0x000ec300, type 32, eidx 4, cc 1]
> |1ad7f000| xhci_trb_queue: ring 0x000ec200 [nidx 5, len 13]
> |1ad7f000| xhci_xfer_kick: ring 0x000ec200, slotid 3, epid 3
> |1ad7f000| xhci_process_events: ring 0x000ec200 [trb 0x000ec240, evt 0x000ec300, type 32, eidx 5, cc 1]
> |1ad7f000| USB MSC blksize=512 sectors=30310400
> |1ad7f000| _malloc zone=0x1ad8bf08 size=80 align=10 ret=0x1ad82720 (detail=0x1ad82890)
> |1ad7f000| _malloc zone=0x1ad8bf08 size=24 align=10 ret=0x1ad829a0 (detail=0x1ad82860)
> |1ad7f000| Registering bootable: USB MSC Drive Intenso Ultra Line 1.00 (type:2 prio:103 data:f3800)
> |1ad7f000| _free 0x1ad82940 (detail=0x1ad82970)
> |1ad7f000| _free 0x1ad82c20 (detail=0x1ad82c40)
> \1ad7f000/ End thread
> _free 0x1ad7f000 (detail=0x1ad82bf0)
> |1ad7a000| xhci_trb_queue: ring 0x1adcb200 [nidx 7, len 8]
> |1ad7a000| xhci_trb_queue: ring 0x1adcb200 [nidx 8, len 4]
> |1ad7a000| xhci_trb_queue: ring 0x1adcb200 [nidx 9, len 0]
> |1ad7a000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7b000| xhci_alloc_pipe: enable slot: got slotid 4
> |1ad7b000| xhci_cmd_address_device: slotid 4
> |1ad7b000| xhci_trb_queue: ring 0x1adcbd00 [nidx 11, len 0]
> |1ad7b000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb280, evt 0x1adcb300, type 32, eidx 9, cc 1]
> |1ad7b000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbda0, evt 0x1adcbe00, type 33, eidx 11, cc 1]
> |1ad7b000| _free 0x1ad82000 (detail=0x1ad827a0)
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 10, len 8]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 11, len 4]
> |1ad81000| xhci_trb_queue: ring 0x1adcb200 [nidx 12, len 0]
> |1ad81000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7b000| xhci_realloc_pipe: usbdev 0x1ad828f0, ring 0x1adba600, slotid 4, epid 1
> |1ad7b000| config_usb: 0x1adba720
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 1, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 2, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 3, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adba600, slotid 4, epid 1
> |1ad7b000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb2b0, evt 0x1adcb300, type 32, eidx 12, cc 1]
> |1ad7b000| xhci_process_events: ring 0x1adba600 [trb 0x1adba620, evt 0x1adba700, type 32, eidx 3, cc 1]
> |1ad7b000| device rev=0110 cls=00 sub=00 proto=00 size=8
> |1ad7b000| xhci_realloc_pipe: usbdev 0x1ad828f0, ring 0x1adba600, slotid 4, epid 1
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 4, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 5, len 9]
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 6, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adba600, slotid 4, epid 1
> |1ad81000| _free 0x1ad82ca0 (detail=0x1ad82cc0)
> \1ad81000/ End thread
> _free 0x1ad81000 (detail=0x1ad82c70)
> |1ad7b000| xhci_process_events: ring 0x1adba600 [trb 0x1adba650, evt 0x1adba700, type 32, eidx 6, cc 1]
> |1ad7b000| _malloc zone=0x1ad8bf08 size=59 align=10 ret=0x1ad82c80 (detail=0x1ad82cc0)
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 7, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 8, len 59]
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 9, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adba600, slotid 4, epid 1
> |1ad7a000| xhci_trb_queue: ring 0x1adcb200 [nidx 13, len 8]
> |1ad7a000| xhci_trb_queue: ring 0x1adcb200 [nidx 14, len 0]
> |1ad7a000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7a000| xhci_process_events: ring 0x1adba600 [trb 0x1adba680, evt 0x1adba700, type 32, eidx 9, cc 1]
> |1ad7a000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb2d0, evt 0x1adcb300, type 32, eidx 14, cc 1]
> |1ad7a000| xhci_trb_queue: ring 0x1adcb200 [nidx 15, len 8]
> |1ad7a000| xhci_trb_queue: ring 0x1adcb200 [linked]
> |1ad7a000| xhci_trb_queue: ring 0x1adcb200 [nidx 1, len 4]
> |1ad7a000| xhci_trb_queue: ring 0x1adcb200 [nidx 2, len 0]
> |1ad7a000| xhci_xfer_kick: ring 0x1adcb200, slotid 2, epid 1
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 10, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 11, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adba600, slotid 4, epid 1
> |1ad7b000| xhci_process_events: ring 0x1adcb200 [trb 0x1adcb210, evt 0x1adcb300, type 32, eidx 2, cc 1]
> |1ad7b000| xhci_process_events: ring 0x1adba600 [trb 0x1adba6a0, evt 0x1adba700, type 32, eidx 11, cc 1]
> |1ad7b000| usb_hid_setup 0x1adba720
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 12, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 13, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adba600, slotid 4, epid 1
> |1ad7a000| set_address 0x1adcbfb0
> |1ad7b000| xhci_process_events: ring 0x1adba600 [trb 0x1adba6c0, evt 0x1adba700, type 32, eidx 13, cc 1]
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 14, len 8]
> |1ad7b000| xhci_trb_queue: ring 0x1adba600 [nidx 15, len 0]
> |1ad7b000| xhci_xfer_kick: ring 0x1adba600, slotid 4, epid 1
> |1ad7a000| _malloc zone=0x1ad8befc size=316 align=100 ret=0x1adba400 (detail=0x1ad82c50)
> |1ad7a000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad82c20)
> |1ad7a000| xhci_alloc_pipe: usbdev 0x1ad82b40, ring 0x1adba400, slotid 0, epid 1
> |1ad7a000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad81800 (detail=0x1ad82bf0)
> |1ad7a000| xhci_cmd_configure_endpoint: slotid 2, add 0x1, del 0x0
> |1ad7a000| xhci_trb_queue: ring 0x1adcbd00 [nidx 12, len 0]
> |1ad7a000| xhci_process_events: ring 0x1adba600 [trb 0x1adba6e0, evt 0x1adba700, type 32, eidx 15, cc 1]
> |1ad7a000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbdb0, evt 0x1adcbe00, type 33, eidx 12, cc 1]
> |1ad7a000| _free 0x1ad81800 (detail=0x1ad82bf0)
> |1ad7a000| _malloc zone=0x1ad8befc size=1024 align=400 ret=0x1adb9c00 (detail=0x1ad82bf0)
> |1ad7a000| xhci_cmd_enable_slot:
> |1ad7a000| xhci_trb_queue: ring 0x1adcbd00 [nidx 13, len 0]
> |1ad7b000| _malloc zone=0x1ad8bef8 size=316 align=100 ret=0x000ebe00 (detail=0x1ad82970)
> |1ad7b000| _malloc zone=0x1ad8befc size=8 align=10 ret=0x1adcbfa0 (detail=0x1ad82940)
> |1ad7b000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad81800 (detail=0x1ad827a0)
> |1ad7b000| xhci_alloc_pipe: usbdev 0x1ad828f0, ring 0x000ebe00, slotid 0, epid 3
> |1ad7b000| xhci_cmd_configure_endpoint: slotid 4, add 0x9, del 0x0
> |1ad7a000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbdc0, evt 0x1adcbe00, type 33, eidx 13, cc 1]
> |1ad7a000| xhci_alloc_pipe: enable slot: got slotid 5
> |1ad7a000| xhci_cmd_address_device: slotid 5
> |1ad7a000| xhci_trb_queue: ring 0x1adcbd00 [nidx 14, len 0]
> |1ad7a000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbdd0, evt 0x1adcbe00, type 33, eidx 14, cc 1]
> |1ad7a000| _free 0x1ad82000 (detail=0x1ad82c20)
> |1ad7b000| xhci_trb_queue: ring 0x1adcbd00 [nidx 15, len 0]
> |1ad7a000| xhci_realloc_pipe: usbdev 0x1ad82b40, ring 0x1adba400, slotid 5, epid 1
> |1ad7a000| config_usb: 0x1adba520
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 1, len 8]
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 2, len 8]
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 3, len 0]
> |1ad7a000| xhci_xfer_kick: ring 0x1adba400, slotid 5, epid 1
> |1ad7a000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbde0, evt 0x1adcbe00, type 33, eidx 15, cc 1]
> |1ad7a000| xhci_process_events: ring 0x1adba400 [trb 0x1adba420, evt 0x1adba500, type 32, eidx 3, cc 1]
> |1ad7a000| device rev=0200 cls=00 sub=00 proto=00 size=8
> |1ad7a000| xhci_realloc_pipe: usbdev 0x1ad82b40, ring 0x1adba400, slotid 5, epid 1
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 4, len 8]
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 5, len 9]
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 6, len 0]
> |1ad7a000| xhci_xfer_kick: ring 0x1adba400, slotid 5, epid 1
> |1ad7b000| _free 0x1ad81800 (detail=0x1ad827a0)
> |1ad7b000| USB keyboard initialized
> |1ad7b000| _free 0x1ad82c80 (detail=0x1ad82cc0)
> |1ad7b000| _free 0x1ad828f0 (detail=0x1ad82910)
> \1ad7b000/ End thread
> _free 0x1ad7b000 (detail=0x1ad828c0)
> xhci_trb_queue: ring 0x000ebe00 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> |1ad7a000| xhci_process_events: ring 0x1adba400 [trb 0x1adba450, evt 0x1adba500, type 32, eidx 6, cc 1]
> |1ad7a000| xhci_process_events: ring 0x000ebe00 [trb 0x000ebe00, evt 0x000ebf00, type 32, eidx 1, cc 1]
> |1ad7a000| _malloc zone=0x1ad8bf08 size=34 align=10 ret=0x1ad82c90 (detail=0x1ad82cc0)
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 7, len 8]
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 8, len 34]
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 9, len 0]
> |1ad7a000| xhci_xfer_kick: ring 0x1adba400, slotid 5, epid 1
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x1adba400 [trb 0x1adba480, evt 0x1adba500, type 32, eidx 9, cc 1]
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe10, evt 0x000ebf00, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 10, len 8]
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 11, len 0]
> |1ad7a000| xhci_xfer_kick: ring 0x1adba400, slotid 5, epid 1
> |1ad7a000| xhci_process_events: ring 0x000ebe00 [trb 0x000ebe20, evt 0x000ebf00, type 32, eidx 3, cc 1]
> |1ad7a000| xhci_process_events: ring 0x1adba400 [trb 0x1adba4a0, evt 0x1adba500, type 32, eidx 11, cc 1]
> |1ad7a000| usb_hid_setup 0x1adba520
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 12, len 8]
> |1ad7a000| xhci_trb_queue: ring 0x1adba400 [nidx 13, len 0]
> |1ad7a000| xhci_xfer_kick: ring 0x1adba400, slotid 5, epid 1
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x1adba400 [trb 0x1adba4c0, evt 0x1adba500, type 32, eidx 13, cc 1]
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe30, evt 0x000ebf00, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> |1ad7a000| _malloc zone=0x1ad8bef8 size=316 align=100 ret=0x000ebc00 (detail=0x1ad82c20)
> |1ad7a000| _malloc zone=0x1ad8befc size=6 align=10 ret=0x1adcbf90 (detail=0x1ad82910)
> |1ad7a000| _malloc zone=0x1ad8bf08 size=1056 align=800 ret=0x1ad82000 (detail=0x1ad828e0)
> |1ad7a000| xhci_alloc_pipe: usbdev 0x1ad82b40, ring 0x000ebc00, slotid 0, epid 3
> |1ad7a000| xhci_cmd_configure_endpoint: slotid 5, add 0x9, del 0x0
> |1ad7a000| xhci_trb_queue: ring 0x1adcbd00 [linked]
> |1ad7a000| xhci_trb_queue: ring 0x1adcbd00 [nidx 1, len 0]
> |1ad7a000| xhci_process_events: ring 0x000ebe00 [trb 0x000ebe40, evt 0x000ebf00, type 32, eidx 5, cc 1]
> |1ad7a000| xhci_process_events: ring 0x1adcbd00 [trb 0x1adcbd00, evt 0x1adcbe00, type 33, eidx 1, cc 1]
> |1ad7a000| _free 0x1ad82000 (detail=0x1ad828e0)
> |1ad7a000| USB mouse initialized
> |1ad7a000| _free 0x1ad82c90 (detail=0x1ad82cc0)
> |1ad7a000| _free 0x1ad82b40 (detail=0x1ad82830)
> \1ad7a000/ End thread
> _free 0x1ad7a000 (detail=0x1ad82800)
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_trb_queue: ring 0x000ebc00 [nidx 1, len 6]
> xhci_xfer_kick: ring 0x000ebc00, slotid 5, epid 3
> |1ad7c000| Initialized USB HUB (2 ports used)
> |1ad7c000| _free 0x1ad82a80 (detail=0x1ad82ae0)
> |1ad7c000| _free 0x1ad82600 (detail=0x1ad7ee70)
> \1ad7c000/ End thread
> _free 0x1ad7c000 (detail=0x1ad7ee40)
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe50, evt 0x000ebf00, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> \1ad80000/ End thread
> _free 0x1ad80000 (detail=0x1ad82e40)
> All threads complete.
> Scan for option roms
> Attempting to init PCI bdf 00:00.0 (vd 8086:0f00)
> Attempting to map option rom on dev 00:00.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:11.0 (vd 8086:0f15)
> Attempting to map option rom on dev 00:11.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:12.0 (vd 8086:0f16)
> Attempting to map option rom on dev 00:12.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:13.0 (vd 8086:0f23)
> Attempting to map option rom on dev 00:13.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:14.0 (vd 8086:0f35)
> Attempting to map option rom on dev 00:14.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.0 (vd 8086:0f40)
> Attempting to map option rom on dev 00:18.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.1 (vd 8086:0f41)
> Attempting to map option rom on dev 00:18.1
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.2 (vd 8086:0f42)
> Attempting to map option rom on dev 00:18.2
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.3 (vd 8086:0f43)
> Attempting to map option rom on dev 00:18.3
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.4 (vd 8086:0f44)
> Attempting to map option rom on dev 00:18.4
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.5 (vd 8086:0f45)
> Attempting to map option rom on dev 00:18.5
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.6 (vd 8086:0f46)
> Attempting to map option rom on dev 00:18.6
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:18.7 (vd 8086:0f47)
> Attempting to map option rom on dev 00:18.7
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1a.0 (vd 8086:0f18)
> Attempting to map option rom on dev 00:1a.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1b.0 (vd 8086:0f04)
> Attempting to map option rom on dev 00:1b.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1c.0 (vd 8086:0f48)
> Attempting to map option rom on dev 00:1c.0
> Skipping non-normal pci device (type=81)
> Attempting to init PCI bdf 00:1e.0 (vd 8086:0f06)
> Attempting to map option rom on dev 00:1e.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1e.1 (vd 8086:0f08)
> Attempting to map option rom on dev 00:1e.1
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1e.2 (vd 8086:0f09)
> Attempting to map option rom on dev 00:1e.2
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1e.3 (vd 8086:0f0a)
> Attempting to map option rom on dev 00:1e.3
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1e.4 (vd 8086:0f0c)
> Attempting to map option rom on dev 00:1e.4
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1e.5 (vd 8086:0f0e)
> Attempting to map option rom on dev 00:1e.5
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1f.0 (vd 8086:0f1c)
> Attempting to map option rom on dev 00:1f.0
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 00:1f.3 (vd 8086:0f12)
> Attempting to map option rom on dev 00:1f.3
> Option rom sizing returned 0 0
> Attempting to init PCI bdf 01:00.0 (vd 8086:1538)
> Attempting to map option rom on dev 01:00.0
> Option rom sizing returned 0 0
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe60, evt 0x000ebf00, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
>
> Press F12 for boot menu.
>
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe70, evt 0x000ebf00, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe80, evt 0x000ebf00, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe90, evt 0x000ebf00, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebea0, evt 0x000ebf00, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebeb0, evt 0x000ebf00, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebec0, evt 0x000ebf00, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebed0, evt 0x000ebf00, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebee0, evt 0x000ebf00, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [linked]
> xhci_trb_queue: ring 0x000ebe00 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe00, evt 0x000ebf00, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe10, evt 0x000ebf00, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe20, evt 0x000ebf00, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe30, evt 0x000ebf00, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe40, evt 0x000ebf00, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe50, evt 0x000ebf00, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe60, evt 0x000ebf00, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe70, evt 0x000ebf00, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe80, evt 0x000ebf00, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe90, evt 0x000ebf00, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebea0, evt 0x000ebf00, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebeb0, evt 0x000ebf00, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebec0, evt 0x000ebf00, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebed0, evt 0x000ebf00, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebee0, evt 0x000ebf00, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [linked]
> xhci_trb_queue: ring 0x000ebe00 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe00, evt 0x000ebf00, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe10, evt 0x000ebf00, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe20, evt 0x000ebf00, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe30, evt 0x000ebf00, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe40, evt 0x000ebf00, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe50, evt 0x000ebf00, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe60, evt 0x000ebf00, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe70, evt 0x000ebf00, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe80, evt 0x000ebf00, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe90, evt 0x000ebf00, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebea0, evt 0x000ebf00, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebeb0, evt 0x000ebf00, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebec0, evt 0x000ebf00, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebed0, evt 0x000ebf00, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebee0, evt 0x000ebf00, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [linked]
> xhci_trb_queue: ring 0x000ebe00 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe00, evt 0x000ebf00, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe10, evt 0x000ebf00, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe20, evt 0x000ebf00, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe30, evt 0x000ebf00, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe40, evt 0x000ebf00, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe50, evt 0x000ebf00, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe60, evt 0x000ebf00, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe70, evt 0x000ebf00, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe80, evt 0x000ebf00, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> Searching bootorder for: HALT
> Mapping hd drive 0x000f3800 to 0
> drive 0x000f3800: PCHS=0/0/0 translation=lba LCHS=1024/255/63 s=30310400
> finalize PMM
> malloc finalize
> Add to e820 map: 0009fc00 00000400 2
> Space available for UMB: ce800-eb800, f30a0-f3800
> Add to e820 map: 1ad8c000 0002d000 1
> Returned 184320 bytes of ZoneHigh
> e820 map has 15 items:
> 0: 0000000000000000 - 000000000009fc00 = 1 RAM
> 1: 000000000009fc00 - 00000000000a0000 = 2 RESERVED
> 2: 00000000000f0000 - 0000000000100000 = 2 RESERVED
> 3: 0000000000100000 - 000000001adb9000 = 1 RAM
> 4: 000000001adb9000 - 0000000020000000 = 2 RESERVED
> 5: 00000000e0000000 - 00000000f0000000 = 2 RESERVED
> 6: 00000000feb00000 - 00000000fec01000 = 2 RESERVED
> 7: 00000000fed01000 - 00000000fed02000 = 2 RESERVED
> 8: 00000000fed03000 - 00000000fed04000 = 2 RESERVED
> 9: 00000000fed05000 - 00000000fed06000 = 2 RESERVED
> 10: 00000000fed08000 - 00000000fed09000 = 2 RESERVED
> 11: 00000000fed0c000 - 00000000fed10000 = 2 RESERVED
> 12: 00000000fed1c000 - 00000000fed1d000 = 2 RESERVED
> 13: 00000000fee00000 - 00000000fee01000 = 2 RESERVED
> 14: 00000000fef00000 - 0000000100000000 = 2 RESERVED
> Jump to int19
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe90, evt 0x000ebf00, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> enter handle_19:
> NULL
> Booting from Hard Disk...
> xhci_trb_queue: ring 0x000ec000 [nidx 4, len 31]
> xhci_xfer_kick: ring 0x000ec000, slotid 3, epid 4
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebea0, evt 0x000ebf00, type 32, eidx 11, cc 1]
> xhci_process_events: ring 0x000ec000 [trb 0x000ec030, evt 0x000ec100, type 32, eidx 4, cc 1]
> xhci_trb_queue: ring 0x000ec200 [nidx 6, len 512]
> xhci_xfer_kick: ring 0x000ec200, slotid 3, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec250, evt 0x000ec300, type 32, eidx 6, cc 1]
> xhci_trb_queue: ring 0x000ec200 [nidx 7, len 13]
> xhci_xfer_kick: ring 0x000ec200, slotid 3, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec260, evt 0x000ec300, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> Booting from 0000:7c00
> xhci_trb_queue: ring 0x000ec000 [nidx 5, len 31]
> xhci_xfer_kick: ring 0x000ec000, slotid 3, epid 4
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebeb0, evt 0x000ebf00, type 32, eidx 12, cc 1]
> xhci_process_events: ring 0x000ec000 [trb 0x000ec040, evt 0x000ec100, type 32, eidx 5, cc 1]
> xhci_trb_queue: ring 0x000ec200 [nidx 8, len 512]
> xhci_xfer_kick: ring 0x000ec200, slotid 3, epid 3
> xhci_process_events: ring 0x000ec200 [trb 0x000ec270, evt 0x000ec300, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed050 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_trb_queue: ring 0x000ec200 [nidx 9, len 13]
> xhci_xfer_kick: ring 0x000ec200, slotid 3, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebec0, evt 0x000ebf00, type 32, eidx 13, cc 1]
> xhci_process_events: ring 0x000ec200 [trb 0x000ec280, evt 0x000ec300, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebed0, evt 0x000ebf00, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebee0, evt 0x000ebf00, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [linked]
> xhci_trb_queue: ring 0x000ebe00 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe00, evt 0x000ebf00, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe10, evt 0x000ebf00, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe20, evt 0x000ebf00, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe30, evt 0x000ebf00, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe40, evt 0x000ebf00, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe50, evt 0x000ebf00, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe60, evt 0x000ebf00, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe70, evt 0x000ebf00, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe80, evt 0x000ebf00, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe90, evt 0x000ebf00, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebea0, evt 0x000ebf00, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebeb0, evt 0x000ebf00, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebec0, evt 0x000ebf00, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebed0, evt 0x000ebf00, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebee0, evt 0x000ebf00, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [linked]
> xhci_trb_queue: ring 0x000ebe00 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe00, evt 0x000ebf00, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe10, evt 0x000ebf00, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe20, evt 0x000ebf00, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe30, evt 0x000ebf00, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe40, evt 0x000ebf00, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe50, evt 0x000ebf00, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe60, evt 0x000ebf00, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe70, evt 0x000ebf00, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe80, evt 0x000ebf00, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe90, evt 0x000ebf00, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebea0, evt 0x000ebf00, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebeb0, evt 0x000ebf00, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebec0, evt 0x000ebf00, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebed0, evt 0x000ebf00, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebee0, evt 0x000ebf00, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [linked]
> xhci_trb_queue: ring 0x000ebe00 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe00, evt 0x000ebf00, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe10, evt 0x000ebf00, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe20, evt 0x000ebf00, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe30, evt 0x000ebf00, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe40, evt 0x000ebf00, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe50, evt 0x000ebf00, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe60, evt 0x000ebf00, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe70, evt 0x000ebf00, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe80, evt 0x000ebf00, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe90, evt 0x000ebf00, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebea0, evt 0x000ebf00, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebeb0, evt 0x000ebf00, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebec0, evt 0x000ebf00, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebed0, evt 0x000ebf00, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebee0, evt 0x000ebf00, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [linked]
> xhci_trb_queue: ring 0x000ebe00 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe00, evt 0x000ebf00, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe10, evt 0x000ebf00, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe20, evt 0x000ebf00, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe30, evt 0x000ebf00, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe40, evt 0x000ebf00, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe50, evt 0x000ebf00, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe60, evt 0x000ebf00, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe70, evt 0x000ebf00, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe80, evt 0x000ebf00, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe90, evt 0x000ebf00, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebea0, evt 0x000ebf00, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebeb0, evt 0x000ebf00, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebec0, evt 0x000ebf00, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebed0, evt 0x000ebf00, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebee0, evt 0x000ebf00, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [linked]
> xhci_trb_queue: ring 0x000ebe00 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe00, evt 0x000ebf00, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe10, evt 0x000ebf00, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe20, evt 0x000ebf00, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe30, evt 0x000ebf00, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe40, evt 0x000ebf00, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe50, evt 0x000ebf00, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe60, evt 0x000ebf00, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe70, evt 0x000ebf00, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe80, evt 0x000ebf00, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe90, evt 0x000ebf00, type 32, eidx 10, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 11, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebea0, evt 0x000ebf00, type 32, eidx 11, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 12, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebeb0, evt 0x000ebf00, type 32, eidx 12, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 13, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebec0, evt 0x000ebf00, type 32, eidx 13, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 14, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebed0, evt 0x000ebf00, type 32, eidx 14, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 15, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebee0, evt 0x000ebf00, type 32, eidx 15, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [linked]
> xhci_trb_queue: ring 0x000ebe00 [nidx 1, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe00, evt 0x000ebf00, type 32, eidx 1, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 2, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe10, evt 0x000ebf00, type 32, eidx 2, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 3, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe20, evt 0x000ebf00, type 32, eidx 3, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 4, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe30, evt 0x000ebf00, type 32, eidx 4, cc 1]
> xhci_poll_intr: st 1000000 ct 4038000 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 5, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe40, evt 0x000ebf00, type 32, eidx 5, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 6, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe50, evt 0x000ebf00, type 32, eidx 6, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 7, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe60, evt 0x000ebf00, type 32, eidx 7, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 8, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe70, evt 0x000ebf00, type 32, eidx 8, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 9, len 8]
> xhci_xfer_kick: ring 0x000ebe00, slotid 4, epid 3
> xhci_process_events: ring 0x000ebe00 [trb 0x000ebe80, evt 0x000ebf00, type 32, eidx 9, cc 1]
> xhci_poll_intr: st 1000000 ct 4038001 [ 0x000ed338 <= 0x1adcbfa0 / 8 ]
> xhci_trb_queue: ring 0x000ebe00 [nidx 10, len 8]
> xhci_xfer_kick: ring 0x000ebe0?
> --
> coreboot mailing list: coreboot(a)coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
4
6
Hi,
Please find the latest report on new defect(s) introduced to coreboot found with Coverity Scan.
12 new defect(s) introduced to coreboot found with Coverity Scan.
12 defect(s), reported by Coverity Scan earlier, were marked fixed in the recent build analyzed by Coverity Scan.
New defect(s) Reported-by: Coverity Scan
Showing 12 of 12 defect(s)
** CID 1255943: Dereference null return value (NULL_RETURNS)
/src/cpu/amd/agesa/s3_resume.c: 164 in move_stack_high_mem()
/src/cpu/amd/pi/s3_resume.c: 164 in move_stack_high_mem()
** CID 1262213: Out-of-bounds access (ARRAY_VS_SINGLETON)
/src/cpu/x86/car.c: 102 in do_car_migrate_variables()
** CID 1262212: Unchecked return value (CHECKED_RETURN)
/src/cpu/intel/hyperthreading/intel_sibling.c: 49 in intel_sibling_init()
** CID 1262211: Unchecked return value (CHECKED_RETURN)
/src/southbridge/intel/i82801gx/lpc.c: 220 in i82801gx_power_options()
** CID 1262210: Unchecked return value (CHECKED_RETURN)
/src/southbridge/intel/i82801gx/smihandler.c: 286 in southbridge_smi_sleep()
** CID 1262209: Logically dead code (DEADCODE)
/src/soc/intel/broadwell/igd.c: 429 in igd_cdclk_init_broadwell()
** CID 1262208: Division or modulo by zero (DIVIDE_BY_ZERO)
/payloads/libpayload/arch/arm64/main.c: 46 in test_exception()
** CID 1262207: Self assignment (NO_EFFECT)
/src/soc/intel/broadwell/finalize.c: 107 in broadwell_finalize()
** CID 1262206: Unsigned compared against 0 (NO_EFFECT)
/payloads/libpayload/libc/memory.c: 91 in default_memmove()
** CID 1262205: Dereference null return value (NULL_RETURNS)
/src/drivers/intel/fsp/fsp_util.c: 192 in print_fsp_info()
** CID 1262204: Dereference null return value (NULL_RETURNS)
/src/drivers/intel/fsp/fsp_util.c: 265 in find_fsp_hob_update_mrc()
** CID 1262203: Out-of-bounds read (OVERRUN)
/coreboot-builds/amd_olivehillplus/agesa/amdlib.c: 1411 in IdsErrorStop()
________________________________________________________________________________________________________
*** CID 1255943: Dereference null return value (NULL_RETURNS)
/src/cpu/amd/agesa/s3_resume.c: 164 in move_stack_high_mem()
158
159 static void move_stack_high_mem(void)
160 {
161 void *high_stack;
162
163 high_stack = cbmem_find(CBMEM_ID_RESUME_SCRATCH);
>>> CID 1255943: Dereference null return value (NULL_RETURNS)
>>> Dereferencing a pointer that might be null "high_stack" when calling "memcpy". [Note: The source code implementation of the function has been overridden by a builtin model.]
164 memcpy(high_stack, (void *)BSP_STACK_BASE_ADDR,
165 (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE));
166
167 __asm__
168 volatile ("add %0, %%esp; add %0, %%ebp; invd"::"g"
169 (high_stack - BSP_STACK_BASE_ADDR)
/src/cpu/amd/pi/s3_resume.c: 164 in move_stack_high_mem()
158
159 static void move_stack_high_mem(void)
160 {
161 void *high_stack;
162
163 high_stack = cbmem_find(CBMEM_ID_RESUME_SCRATCH);
>>> CID 1255943: Dereference null return value (NULL_RETURNS)
>>> Dereferencing a pointer that might be null "high_stack" when calling "memcpy". [Note: The source code implementation of the function has been overridden by a builtin model.]
164 memcpy(high_stack, (void *)BSP_STACK_BASE_ADDR,
165 (CONFIG_HIGH_SCRATCH_MEMORY_SIZE - BIOS_HEAP_SIZE));
166
167 __asm__
168 volatile ("add %0, %%esp; add %0, %%ebp; invd"::"g"
169 (high_stack - BSP_STACK_BASE_ADDR)
________________________________________________________________________________________________________
*** CID 1262213: Out-of-bounds access (ARRAY_VS_SINGLETON)
/src/cpu/x86/car.c: 102 in do_car_migrate_variables()
96 car_migrated = ~0;
97
98 /* Call all the migration functions. */
99 migrate_func = &_car_migrate_start;
100 while (*migrate_func != NULL) {
101 (*migrate_func)();
>>> CID 1262213: Out-of-bounds access (ARRAY_VS_SINGLETON)
>>> Using "migrate_func" as an array. This might corrupt or misinterpret adjacent memory locations.
102 migrate_func++;
103 }
104 }
105
106 void car_migrate_variables(void)
107 {
108 if (!IS_ENABLED(CONFIG_BROKEN_CAR_MIGRATE))
109 do_car_migrate_variables();
________________________________________________________________________________________________________
*** CID 1262212: Unchecked return value (CHECKED_RETURN)
/src/cpu/intel/hyperthreading/intel_sibling.c: 49 in intel_sibling_init()
43 unsigned i, siblings;
44 struct cpuid_result result;
45
46 /* On the bootstrap processor see if I want sibling cpus enabled */
47 if (first_time) {
48 first_time = 0;
>>> CID 1262212: Unchecked return value (CHECKED_RETURN)
>>> Calling "get_option" without checking return value (as is done elsewhere 15 out of 18 times).
49 get_option(&disable_siblings, "hyper_threading");
50 }
51 result = cpuid(1);
52 /* Is hyperthreading supported */
53 if (!(result.edx & (1 << 28))) {
54 return;
________________________________________________________________________________________________________
*** CID 1262211: Unchecked return value (CHECKED_RETURN)
/src/southbridge/intel/i82801gx/lpc.c: 220 in i82801gx_power_options()
214 // reg8 &= ~(1 << 2); /* PCI SERR# Enable */
215 reg8 |= (1 << 2); /* PCI SERR# Disable for now */
216 outb(reg8, 0x61);
217
218 reg8 = inb(0x70);
219 nmi_option = NMI_OFF;
>>> CID 1262211: Unchecked return value (CHECKED_RETURN)
>>> Calling "get_option" without checking return value (as is done elsewhere 15 out of 18 times).
220 get_option(&nmi_option, "nmi");
221 if (nmi_option) {
222 printk(BIOS_INFO, "NMI sources enabled.\n");
223 reg8 &= ~(1 << 7); /* Set NMI. */
224 } else {
225 printk(BIOS_INFO, "NMI sources disabled.\n");
________________________________________________________________________________________________________
*** CID 1262210: Unchecked return value (CHECKED_RETURN)
/src/southbridge/intel/i82801gx/smihandler.c: 286 in southbridge_smi_sleep()
280 u8 s5pwr = CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL;
281
282 // save and recover RTC port values
283 u8 tmp70, tmp72;
284 tmp70 = inb(0x70);
285 tmp72 = inb(0x72);
>>> CID 1262210: Unchecked return value (CHECKED_RETURN)
>>> Calling "get_option" without checking return value (as is done elsewhere 15 out of 18 times).
286 get_option(&s5pwr, "power_on_after_fail");
287 outb(tmp70, 0x70);
288 outb(tmp72, 0x72);
289
290 /* First, disable further SMIs */
291 reg8 = inb(pmbase + SMI_EN);
________________________________________________________________________________________________________
*** CID 1262209: Logically dead code (DEADCODE)
/src/soc/intel/broadwell/igd.c: 429 in igd_cdclk_init_broadwell()
423 /* CD clock frequency 675MHz not supported on ULT */
424 if (cpu_is_ult() && cdclk == GT_CDCLK_675)
425 cdclk = GT_CDCLK_540;
426
427 /* Set variables based on CD Clock setting */
428 switch (cdclk) {
>>> CID 1262209: Logically dead code (DEADCODE)
>>> Execution cannot reach this statement: "case 0:".
429 case GT_CDCLK_337:
430 cdset = 337;
431 lpcll = (1 << 27);
432 pwctl = 2;
433 dpdiv = 169;
434 break;
________________________________________________________________________________________________________
*** CID 1262208: Division or modulo by zero (DIVIDE_BY_ZERO)
/payloads/libpayload/arch/arm64/main.c: 46 in test_exception()
40 int test_exception(void);
41 int test_exception(void)
42 {
43 int a = 1;
44 int b = 0;
45 test_exc = 1;
>>> CID 1262208: Division or modulo by zero (DIVIDE_BY_ZERO)
>>> In expression "a / b", division by expression "b" which may be zero has undefined behavior.
46 return a/b;
47 }
48
49 /**
50 * This is our C entry function - set up the system
51 * and jump into the payload entry point.
________________________________________________________________________________________________________
*** CID 1262207: Self assignment (NO_EFFECT)
/src/soc/intel/broadwell/finalize.c: 107 in broadwell_finalize()
101 reg_script_run_on_dev(PCH_DEV_LPC, pch_finalize_script);
102
103 /* Read+Write the following registers */
104 MCHBAR32(0x6030) = MCHBAR32(0x6030);
105 MCHBAR32(0x6034) = MCHBAR32(0x6034);
106 MCHBAR32(0x6008) = MCHBAR32(0x6008);
>>> CID 1262207: Self assignment (NO_EFFECT)
>>> Assignment operation "*(u32 volatile *)0xfed1e1a4 = *(u32 volatile *)0xfed1e1a4" has no effect.
107 RCBA32(0x21a4) = RCBA32(0x21a4);
108
109 /* Re-init SPI after lockdown */
110 spi_init();
111
112 /* Lock down management engine */
________________________________________________________________________________________________________
*** CID 1262206: Unsigned compared against 0 (NO_EFFECT)
/payloads/libpayload/libc/memory.c: 91 in default_memmove()
85
86 offs = n - (n % sizeof(unsigned long));
87
88 for (i = (n % sizeof(unsigned long)) - 1; i >= 0; i--)
89 ((u8 *)dst)[i + offs] = ((u8 *)src)[i + offs];
90
>>> CID 1262206: Unsigned compared against 0 (NO_EFFECT)
>>> This greater-than-or-equal-to-zero comparison of an unsigned value is always true. "i >= 0UL".
91 for (i = n / sizeof(unsigned long) - 1; i >= 0; i--)
92 ((unsigned long *)dst)[i] = ((unsigned long *)src)[i];
93
94 return dst;
95 }
96
________________________________________________________________________________________________________
*** CID 1262205: Dereference null return value (NULL_RETURNS)
/src/drivers/intel/fsp/fsp_util.c: 192 in print_fsp_info()
186 if ((u32)fsp_header_ptr < 0xff) {
187 post_code(0x4F); /* output something in case there is no serial */
188 die("Can't find the FSP!\n");
189 }
190
191 if (FspHobListPtr == NULL) {
>>> CID 1262205: Dereference null return value (NULL_RETURNS)
>>> Dereferencing a null pointer "cbmem_find(1213153825U)".
192 FspHobListPtr = (void*)*((u32*) cbmem_find(CBMEM_ID_HOB_POINTER));
193 }
194
195 printk(BIOS_SPEW,"fsp_header_ptr: %p\n", fsp_header_ptr);
196 printk(BIOS_INFO,"FSP Header Version: %d\n", fsp_header_ptr->HeaderRevision);
197 printk(BIOS_INFO,"FSP Revision: %d.%d\n",
________________________________________________________________________________________________________
*** CID 1262204: Dereference null return value (NULL_RETURNS)
/src/drivers/intel/fsp/fsp_util.c: 265 in find_fsp_hob_update_mrc()
259 }
260 #endif /* CONFIG_ENABLE_MRC_CACHE */
261
262 static void find_fsp_hob_update_mrc(void *unused)
263 {
264 /* Set the global HOB list pointer */
>>> CID 1262204: Dereference null return value (NULL_RETURNS)
>>> Dereferencing a null pointer "cbmem_find(1213153825U)".
265 FspHobListPtr = (void*)*((u32*) cbmem_find(CBMEM_ID_HOB_POINTER));
266
267 if (!FspHobListPtr){
268 printk(BIOS_ERR, "ERROR: Could not find FSP HOB pointer in CBFS!\n");
269 } else {
270 /* 0x0000: Print all types */
________________________________________________________________________________________________________
*** CID 1262203: Out-of-bounds read (OVERRUN)
/coreboot-builds/amd_olivehillplus/agesa/amdlib.c: 1411 in IdsErrorStop()
1405 } post = {0xDEAD, FileCode, 0xDEAD, FileCode};
1406 UINT16 offset = 0;
1407 UINT16 j;
1408
1409 while(1) {
1410 offset %= sizeof(struct POST) / 2;
>>> CID 1262203: Out-of-bounds read (OVERRUN)
>>> Overrunning array of 3 4-byte elements at element index 15 (byte offset 60) by dereferencing pointer "(UINT32 *)(&post + offset)".
1411 WriteIo32(80, *((UINT32*)(&post+offset)));
1412 ++offset;
1413 for (j=0; j<250; ++j) {
1414 ReadIo8(80);
1415 }
1416 }
________________________________________________________________________________________________________
To view the defects in Coverity Scan visit, http://scan.coverity.com/projects/1016?tab=overview
To manage Coverity Scan email notifications for "coreboot(a)coreboot.org", click http://scan.coverity.com/subscriptions/edit?email=coreboot%40coreboot.org&t… .
1
0
So I was looking at our git log. I can fit two, maybe three commits if I'm
lucky. It's terrible. We have all this redundant information. We have both
"Reviewed-on" and "Change-Id" lines. Those only point to the same resource.
The "Tested-by" is useless. It's always Jenkins who tests changes. Then you
have a "Reviewed-by" for every person who ever bikeshed on said patch. Since
Paul has to say something on every single patch, he always has his own line in
almost every commit.
"Reviewed-by" is not the same as "Acked-by". I've seen acked-by used to let
linux folks know that some maintainer/big guy with more credentials than the
author already likes the patch. Though Acked-by is not necessary, even for
linux. Come to think of it, the only piece of information needed to find a
commit on our gerrit is the hash. All the other lines, except for the "Signed-
off-by" are redundant. "Reviewed-on" and "Change-Id" will take you to the same
place as the commit hash. All the crap added by gerrit is redundant.
Now add a patch that comes from our Chromium friends, and you've doubled the
size of said pork. Is it convenient to have all that information in the commit
message? Maybe. Is it necessary? Definitely not. Those lines are useful for
tracking a patch, but once it's +2'd and submitted, gerrit should strip out
all that pork. We might not even use gerrit anymore a few years down the road.
Adding all this crap is pointless.
It's time to drop the crap.
Alex
2
1
Fred, as long as the video output in Linux environment, it seems the video
controller is configured properly, so maybe something wrong in seabios in
configuring video to text mode (I remember seabios will configure video to
text mode as default, correct me if I am wrong).
I would suggest you enabling Boot Splash in coreboot, you might be able to
see the boot splash photo show up on your monitor.
Another suggestion, maybe you should check install_intel_vga_int15_handler
routine referring other coreboot projects and see how to modify/port it to
your project.
-Fei
On Wed, Jan 7, 2015 at 3:46 PM, Fred Young <Fred.Young(a)kaleidescape.com>
wrote:
> The last time that I synched my coreboot source was about 2 weeks ago. I
> just tried the latest FSP and I still have the same problem. When I load
> Linux, I do see video output.
>
>
>
> Here’s my serial output:
>
>
>
> coreboot-4.0-7555-g8916d0d-dirty Wed Jan 7 09:52:17 EST 2015 starting...
>
> POST: 0x44
>
> POST: 0x47
>
> POST: 0x48
>
> prev_sleep_state = S5
>
> POST: 0x4a
>
> Baytrail Chip Variant: Bay Trail-I (ISG/embedded)
>
> MRC v0.100
>
> 1 channels of DDR3 @ 1333MHz
>
> POST: 0x4b
>
> POST: 0x4c
>
> POST: 0x4d
>
> POST: 0x4e
>
> POST: 0x4f
>
> CBFS: loading stage fallback/ramstage @ 0x100000 (287632 bytes), entry @
> 0x100000
>
> POST: 0x80
>
> POST: 0x39
>
> coreboot-4.0-7555-g8916d0d-dirty Wed Jan 7 09:52:17 EST 2015 booting...
>
> POST: 0x40
>
> clocks_per_usec: 1916
>
> POST: 0x70
>
> POST: 0x71
>
> POST: 0x72
>
> Enumerating buses...
>
> POST: 0x24
>
> FSP Header Version: 1
>
> FSP Revision: 3.3
>
> POST: 0x25
>
> POST: 0x24
>
> POST: 0x25
>
> POST: 0x55
>
> POST: 0x24
>
> POST: 0x25
>
> POST: 0x55
>
> POST: 0x24
>
> POST: 0x25
>
> POST: 0x55
>
> POST: 0x24
>
> POST: 0x25
>
> POST: 0x24
>
> POST: 0x25
>
> POST: 0x24
>
> POST: 0x25
>
> POST: 0x55
>
> POST: 0x24
>
> POST: 0x25
>
> POST: 0x55
>
> POST: 0x24
>
> POST: 0x25
>
> POST: 0x55
>
> POST: 0x55
>
> POST: 0x55
>
> POST: 0x55
>
> done
>
> POST: 0x73
>
> Allocating resources...
>
> Reading resources...
>
> APIC: 00 missing read_resources
>
> Available memory below 4GB: 0x7ae00000 (1966M)
>
> Available memory above 4GB: 0M
>
> Done reading resources.
>
> Setting resources...
>
> PCI: 00:00.0 missing set_resources
>
> Done setting resources.
>
> Done allocating resources.
>
> POST: 0x74
>
> Enabling resources...
>
> done.
>
> POST: 0x75
>
> Initializing devices...
>
> POST: 0x75
>
> POST: 0x93
>
> Setting up local apic...done.
>
> POST: 0x9b
>
> CPU: Intel(R) Atom(TM) CPU E3845 @ 1.91GHz.
>
> AP: slot 1 apic_id 2.
>
> AP: slot 3 apic_id 6.
>
> AP: slot 2 apic_id 4.
>
> Initializing CPU #0
>
> CPU #0 initialized
>
> Initializing CPU #1
>
> Initializing CPU #3
>
> Turbo is unavailable
>
> CPU #3 initialized
>
> CPU #1 initialized
>
> Initializing CPU #2
>
> CPU #2 initialized
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> Unsupported software interrupt #0x15 eax 0x3005f35
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> Warning: PCI Device 2 does not have an IRQ entry, skipping it
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> POST: 0x75
>
> Devices initialized
>
> POST: 0x76
>
> Finalize devices...
>
> Devices finalized
>
> POST: 0x77
>
> POST: 0x79
>
> POST: 0x9c
>
> ACPI: Writing ACPI tables at 7add6000.
>
> ACPI: done.
>
> Root Device (Intel Bayley Bay CRB (FSP))
>
> CPU_CLUSTER: 0 (Intel BayTrail SoC)
>
> APIC: 00 (Intel BayTrail SoC)
>
> DOMAIN: 0000 (Intel BayTrail SoC)
>
> PCI: 00:00.0 (Intel BayTrail SoC)
>
> PCI: 00:02.0 (Intel BayTrail SoC)
>
> PCI: 00:03.0 (Intel BayTrail SoC)
>
> PCI: 00:10.0 (Intel BayTrail SoC)
>
> PCI: 00:11.0 (Intel BayTrail SoC)
>
> PCI: 00:12.0 (Intel BayTrail SoC)
>
> PCI: 00:13.0 (Intel BayTrail SoC)
>
> PCI: 00:14.0 (Intel BayTrail SoC)
>
> PCI: 00:15.0 (Intel BayTrail SoC)
>
> PCI: 00:16.0 (Intel BayTrail SoC)
>
> PCI: 00:17.0 (Intel BayTrail SoC)
>
> PCI: 00:18.0 (Intel BayTrail SoC)
>
> PCI: 00:18.1 (Intel BayTrail SoC)
>
> PCI: 00:18.2 (Intel BayTrail SoC)
>
> PCI: 00:18.3 (Intel BayTrail SoC)
>
> PCI: 00:18.4 (Intel BayTrail SoC)
>
> PCI: 00:18.5 (Intel BayTrail SoC)
>
> PCI: 00:18.6 (Intel BayTrail SoC)
>
> PCI: 00:18.7 (Intel BayTrail SoC)
>
> PCI: 00:1a.0 (Intel BayTrail SoC)
>
> PCI: 00:1b.0 (Intel BayTrail SoC)
>
> PCI: 00:1c.0 (Intel BayTrail SoC)
>
> PCI: 00:1c.1 (Intel BayTrail SoC)
>
> PCI: 00:1c.2 (Intel BayTrail SoC)
>
> PCI: 00:1c.3 (Intel BayTrail SoC)
>
> PCI: 00:1d.0 (Intel BayTrail SoC)
>
> PCI: 00:1e.0 (Intel BayTrail SoC)
>
> PCI: 00:1e.1 (Intel BayTrail SoC)
>
> PCI: 00:1e.2 (Intel BayTrail SoC)
>
> PCI: 00:1e.3 (Intel BayTrail SoC)
>
> PCI: 00:1e.4 (Intel BayTrail SoC)
>
> PCI: 00:1e.5 (Intel BayTrail SoC)
>
> PCI: 00:1f.0 (Intel BayTrail SoC)
>
> PCI: 00:1f.3 (Intel BayTrail SoC)
>
> PCI: 02:00.0 (unknown)
>
> PCI: 03:00.0 (unknown)
>
> PCI: 04:00.0 (unknown)
>
> PCI: 05:01.0 (unknown)
>
> PCI: 05:02.0 (unknown)
>
> PCI: 05:03.0 (unknown)
>
> PCI: 07:00.0 (unknown)
>
> APIC: 02 (unknown)
>
> APIC: 04 (unknown)
>
> APIC: 06 (unknown)
>
> POST: 0x9e
>
> POST: 0x9d
>
> POST: 0x7a
>
> selfload
>
> POST: 0x7b
>
> POST: 0xf8
>
>
>
>
>
> *From:* Yang, York [mailto:york.yang@intel.com]
> *Sent:* January-05-15 5:46 PM
> *To:* Fred Young; coreboot(a)coreboot.org
> *Subject:* Re: No video output with Bay Trail
>
>
>
> Did you use the latest code and Baytrail Gold3 FSP? I can see VGA output
> on Intel Bayley Bay board just selecting platform right and enable
> “configure defaults for Intel FSP” and gives all binary (FSP, VBIOS,
> microcode) correct path. Do you have serial debug message dump? It can
> help to identify some error.
>
>
>
> *From:* coreboot [mailto:coreboot-bounces@coreboot.org
> <coreboot-bounces(a)coreboot.org>] *On Behalf Of *Fred Young
> *Sent:* Monday, January 05, 2015 2:31 PM
> *To:* coreboot(a)coreboot.org
> *Subject:* [coreboot] No video output with Bay Trail
>
>
>
> I have an Aaeon EMB-BT1 with an Intel Atom E3845 CPU. I’ve successfully
> built coreboot specifying "Bayley Bay CRB (FSP)" as the “Mainboard model”.
>
>
>
> When I boot the machine after programming the flash with coreboot, I see
> lots of output on the serial line including output indicating that SeaBIOS
> has started.
>
>
>
> However, I don’t see any output on the video display on either HDMI or
> VGA. Here are my .config settings relating to video/VGA:
>
>
>
> CONFIG_VGA_BIOS_ID="8086,0f31"
>
> CONFIG_ONBOARD_VGA_IS_PRIMARY=y
>
> CONFIG_VGA_BIOS=y
>
> CONFIG_VGA_BIOS_FILE="../intel/cpu/baytrail/vbios/Vga.dat"
>
> CONFIG_VIDEO_MB=0
>
> CONFIG_VGA_ROM_RUN=y
>
>
>
> What do I need to do to get video output?
>
>
>
> --
> coreboot mailing list: coreboot(a)coreboot.org
> http://www.coreboot.org/mailman/listinfo/coreboot
>
1
0
Re: [coreboot] Internal Ethernet controller on Mohon Peak CRB failed to get activated
by Patrick Agrain 08 Jan '15
by Patrick Agrain 08 Jan '15
08 Jan '15
Hello Fei,
Thanks for your answer.
Indeed, the INCLUDE_ME and ME_PATH are not configured, because I do not
really know what is the constitution of a "descriptor.bin" file.
May anybody have any pointer which could explain me what it is ?
Thanks in advance.
Kind regards,
Patrick
Le 05/01/2015 13:40, WANG FEI a écrit :
> Patrick,
>
> The below message is reading from devicetree.cb, it's not from PCI
> enumeration.
>
> /- On POST 0x72 (after FSP insertion), they seem to be OK
> PCI: 00:14.0: enabled 1
> PCI: 00:14.1: enabled 1
> PCI: 00:14.2: enabled 1
> PCI: 00:14.3: enabled 1/
>
> I would suggest you hook a ITP on your Mohon Peak system and halt
> system before and after FSP API Init, then do a PCI scan via ITP
> command or script, I bet you will notice GbE devices does not exist on
> your system.
>
> I remember I encountered the similar issue before, the root cause is
> that I did not enable the descriptor mode, as long as I enclosed a
> proper descriptor bin on coreboot, GbE devices can be enumerated.
>
> Please review src\southbridge\intel\fsp_rangeley\Kconfig and make sure
> INCLUDE_ME and ME_PATH are configured properly.
>
> I hope this can help you solve you the issue.
>
> -Fei
>
> On Mon, Jan 5, 2015 at 9:14 AM, Patrick Agrain
> <patrick.agrain(a)alcatel-lucent.com
> <mailto:patrick.agrain@alcatel-lucent.com>> wrote:
>
> Hello all,
>
> Wish you a happy new year.
>
> Has anyone already experienced following behavior on Intel CRB
> Mohon Peak :
> - The internal GbE controllers seem not to be activated at the end
> of coreboot.
>
> Logs (below) shows that the ID of the controllers can not be
> retrieved during the PCI probe.
> - On POST 0x72 (after FSP insertion), they seem to be OK
> PCI: 00:14.0: enabled 1
> PCI: 00:14.1: enabled 1
> PCI: 00:14.2: enabled 1
> PCI: 00:14.3: enabled 1
> - But after we have
> PCI: Static device PCI: 00:14.0 not found, disabling it.
> PCI: Static device PCI: 00:14.1 not found, disabling it.
> PCI: Static device PCI: 00:14.2 not found, disabling it.
> PCI: Static device PCI: 00:14.3 not found, disabling it.
> Note: this message is located in
> ./src/device/pci_device.c:pci_probe_dev() and is the result of a
> bad pci_read of VENDOR_ID
>
> How can this occurs ?
>
> Just for informational purpose, a tianocore version, as well as an
> evaluation version of an AMI BIOS for this CRB are working well.
>
> Thanks in advance for your help.
> Kind regards,
> Patrick Agrain
>
> -----------------------
> Here are the relating logs from coreboot (I put almost all of
> them, but it is very verbose...) :
>
> coreboot-4.0-7647-gc9be93f-dirty Fri Dec 19 06:11:44 PST 2014
> starting...
> POST: 0x41
> POST: 0x42
> Setting up static southbridge registers... done.
> Disabling Watchdog timer... done.
> RTC Init
> POST: 0x46
> POST: 0x47
> Starting the Intel FSP (early_init)
> Configure Default UPD Data
> PcdEnableIQAT 1
> PcdEnableLan 1
> PcdEnableLan 1
> PcdEnableLan 1
> PcdEnableLan 1
> PcdEnableUsb20 1
> PcdEnableSata2 1
> PcdEnableSata3 1
> find_current_mrc_cache_local: No valid fast boot cache found.
> FSP MRC cache not present.
> romstage_main_continue.
> POST: 0x48
> romstage_main_continue status: 0 hob_list_ptr: 220000
> FSP Status: 0x0
> POST: 0x4b
> POST: 0x4c
> POST: 0x4d
> CBMEM: root @ 7fdff000 254 entries.
> POST: 0x4e
> POST: 0x4f
> Trying CBFS ramstage loader.
> CBFS: loading stage fallback/ramstage @ 0x100000 (258096 bytes),
> entry @ 0x100000
> POST: 0x80
> POST: 0x39
> coreboot-4.0-7647-gc9be93f-dirty Fri Dec 19 06:11:44 PST 2014
> booting...
> POST: 0x40
> CBMEM: recovering 3/254 entries from root @ 7fdff000
> Moving GDT to 7fdfc000...ok
> POST: 0x70
> BS: BS_PRE_DEVICE times (us): entry 4029 run 586 exit 0
> POST: 0x71
> BS: BS_DEV_INIT_CHIPS times (us): entry 0 run 587 exit 0
> POST: 0x72
> Enumerating buses...
> Show all devs...Before device enumeration.
> Root Device: enabled 1
> CPU_CLUSTER: 0: enabled 1
> APIC: 00: enabled 1
> APIC: acac: enabled 0
> DOMAIN: 0000: enabled 1
> PCI: 00:00.0: enabled 1
> PCI: 00:01.0: enabled 1
> PCI: 00:02.0: enabled 1
> PCI: 00:03.0: enabled 1
> PCI: 00:04.0: enabled 1
> PCI: 00:0b.0: enabled 1
> PCI: 00:0e.0: enabled 1
> PCI: 00:13.0: enabled 1
> PCI: 00:14.0: enabled 1
> PCI: 00:14.1: enabled 1
> PCI: 00:14.2: enabled 1
> PCI: 00:14.3: enabled 1
> PCI: 00:16.0: enabled 1
> PCI: 00:17.0: enabled 1
> PCI: 00:18.0: enabled 1
> PCI: 00:1f.0: enabled 1
> PCI: 00:1f.3: enabled 1
> Compare with tree...
> Root Device: enabled 1
> CPU_CLUSTER: 0: enabled 1
> APIC: 00: enabled 1
> APIC: acac: enabled 0
> DOMAIN: 0000: enabled 1
> PCI: 00:00.0: enabled 1
> PCI: 00:01.0: enabled 1
> PCI: 00:02.0: enabled 1
> PCI: 00:03.0: enabled 1
> PCI: 00:04.0: enabled 1
> PCI: 00:0b.0: enabled 1
> PCI: 00:0e.0: enabled 1
> PCI: 00:13.0: enabled 1
> PCI: 00:14.0: enabled 1
> PCI: 00:14.1: enabled 1
> PCI: 00:14.2: enabled 1
> PCI: 00:14.3: enabled 1
> PCI: 00:16.0: enabled 1
> PCI: 00:17.0: enabled 1
> PCI: 00:18.0: enabled 1
> PCI: 00:1f.0: enabled 1
> PCI: 00:1f.3: enabled 1
> scan_static_bus for Root Device
> CPU_CLUSTER: 0 enabled
> DOMAIN: 0000 enabled
> DOMAIN: 0000 scanning...
> PCI: pci_scan_bus for bus 00
> POST: 0x24
> PCI: 00:00.0 [8086/0000] ops
> PCI: 00:00.0 [8086/1f08] enabled
> Capability: type 0x10 @ 0x40
> Capability: type 0x01 @ 0x80
> Capability: type 0x0d @ 0x88
> Capability: type 0x05 @ 0x90
> Capability: type 0x10 @ 0x40
> PCI: 00:01.0 subordinate bus PCI Express
> PCI: 00:01.0 [8086/1f10] enabled
> PCI: Static device PCI: 00:02.0 not found, disabling it.
> Capability: type 0x10 @ 0x40
> Capability: type 0x01 @ 0x80
> Capability: type 0x0d @ 0x88
> Capability: type 0x05 @ 0x90
> Capability: type 0x10 @ 0x40
> PCI: 00:03.0 subordinate bus PCI Express
> PCI: 00:03.0 [8086/1f12] enabled
> PCI: Static device PCI: 00:04.0 not found, disabling it.
> PCI: 00:0b.0 [8086/1f18] enabled
> PCI: 00:0e.0 [8086/1f14] enabled
> PCI: 00:0f.0 [8086/1f16] enabled
> PCI: 00:13.0 [8086/1f15] enabled
> PCI: Static device PCI: 00:14.0 not found, disabling it.
> PCI: Static device PCI: 00:14.1 not found, disabling it.
> PCI: Static device PCI: 00:14.2 not found, disabling it.
> PCI: Static device PCI: 00:14.3 not found, disabling it.
> PCI: 00:16.0 [8086/1f2c] enabled
> PCI: 00:17.0 [8086/0000] ops
> PCI: 00:17.0 [8086/1f22] enabled
> PCI: 00:18.0 [8086/0000] ops
> PCI: 00:18.0 [8086/1f32] enabled
> PCI: 00:1f.0 [8086/0000] bus ops
> PCI: 00:1f.0 [8086/1f38] enabled
> PCI: 00:1f.3 [8086/1f3c] bus ops
> PCI: 00:1f.3 [8086/1f3c] enabled
> POST: 0x25
> do_pci_scan_bridge for PCI: 00:01.0
> PCI: pci_scan_bus for bus 01
> POST: 0x24
> PCI: 01:00.0 [10de/0a65] enabled
> PCI: 01:00.1 [10de/0be3] enabled
> POST: 0x25
> PCI: pci_scan_bus returning with max=001
> POST: 0x55
> Capability: type 0x01 @ 0x60
> Capability: type 0x05 @ 0x68
> Capability: type 0x10 @ 0x78
> Capability: type 0x10 @ 0x40
> Enabling Common Clock Configuration
> ASPM: Enabled L1
> Capability: type 0x01 @ 0x60
> Capability: type 0x05 @ 0x68
> Capability: type 0x10 @ 0x78
> Capability: type 0x10 @ 0x40
> Enabling Common Clock Configuration
> ASPM: Enabled L1
> do_pci_scan_bridge returns max 1
> do_pci_scan_bridge for PCI: 00:03.0
> PCI: pci_scan_bus for bus 02
> POST: 0x24
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> Capability: type 0x0d @ 0xa4
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> PCI: 02:00.0 subordinate bus PCI Express
> PCI: 02:00.0 [10b5/8624] enabled
> POST: 0x25
> do_pci_scan_bridge for PCI: 02:00.0
> PCI: pci_scan_bus for bus 03
> POST: 0x24
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> Capability: type 0x0d @ 0xa4
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> PCI: 03:04.0 subordinate bus PCI Express
> PCI: 03:04.0 [10b5/8624] enabled
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> Capability: type 0x0d @ 0xa4
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> PCI: 03:05.0 subordinate bus PCI Express
> PCI: 03:05.0 [10b5/8624] enabled
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> Capability: type 0x0d @ 0xa4
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> PCI: 03:08.0 subordinate bus PCI Express
> PCI: 03:08.0 [10b5/8624] enabled
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> Capability: type 0x0d @ 0xa4
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> PCI: 03:09.0 subordinate bus PCI Express
> PCI: 03:09.0 [10b5/8624] enabled
> POST: 0x25
> do_pci_scan_bridge for PCI: 03:04.0
> PCI: pci_scan_bus for bus 04
> POST: 0x24
> POST: 0x25
> PCI: pci_scan_bus returning with max=004
> POST: 0x55
> do_pci_scan_bridge returns max 4
> do_pci_scan_bridge for PCI: 03:05.0
> PCI: pci_scan_bus for bus 05
> POST: 0x24
> PCI: 05:00.0 [8086/1528] enabled
> PCI: 05:00.1 [8086/1528] enabled
> POST: 0x25
> PCI: pci_scan_bus returning with max=005
> POST: 0x55
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x50
> Capability: type 0x11 @ 0x70
> Capability: type 0x10 @ 0xa0
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> ASPM: Enabled L1
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x50
> Capability: type 0x11 @ 0x70
> Capability: type 0x10 @ 0xa0
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> ASPM: Enabled L1
> do_pci_scan_bridge returns max 5
> do_pci_scan_bridge for PCI: 03:08.0
> PCI: pci_scan_bus for bus 06
> POST: 0x24
> POST: 0x25
> PCI: pci_scan_bus returning with max=006
> POST: 0x55
> do_pci_scan_bridge returns max 6
> do_pci_scan_bridge for PCI: 03:09.0
> PCI: pci_scan_bus for bus 07
> POST: 0x24
> POST: 0x25
> PCI: pci_scan_bus returning with max=007
> POST: 0x55
> do_pci_scan_bridge returns max 7
> PCI: pci_scan_bus returning with max=007
> POST: 0x55
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> ASPM: Enabled None
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> ASPM: Enabled None
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> ASPM: Enabled None
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> ASPM: Enabled None
> do_pci_scan_bridge returns max 7
> PCI: pci_scan_bus returning with max=007
> POST: 0x55
> Capability: type 0x01 @ 0x40
> Capability: type 0x05 @ 0x48
> Capability: type 0x10 @ 0x68
> Capability: type 0x10 @ 0x40
> ASPM: Enabled None
> do_pci_scan_bridge returns max 7
> scan_static_bus for PCI: 00:1f.0
> scan_static_bus for PCI: 00:1f.0 done
> scan_static_bus for PCI: 00:1f.3
> scan_static_bus for PCI: 00:1f.3 done
> PCI: pci_scan_bus returning with max=007
> POST: 0x55
> scan_static_bus for Root Device done
> done
> BS: BS_DEV_ENUMERATE times (us): entry 0 run 364879 exit 0
> POST: 0x73
> found VGA at PCI: 01:00.0
> Setting up VGA for PCI: 01:00.0
> Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
> Setting PCI_BRIDGE_CTL_VGA for bridge DOMAIN: 0000
> Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
> Allocating resources...
> Reading resources...
> Root Device read_resources bus 0 link: 0
> CPU_CLUSTER: 0 read_resources bus 0 link: 0
> APIC: 00 missing read_resources
> CPU_CLUSTER: 0 read_resources bus 0 link: 0 done
> DOMAIN: 0000 read_resources bus 0 link: 0
> Top of Low Used DRAM (BMBOUND): 0x80000000
> Top of Upper Used DRAM (BMBOUND_HI): 0x180000000
> SMM memory location: 0x80000000 SMM memory size: 0x0
> Subtracting 0M for SMM
> Available memory below 4GB: 0x7fe00000 (2046M)
> Available memory above 4GB: 2048M
> Adding PCIe config bar base=0xe0000000 size=0x10000000
> PCI: 00:01.0 read_resources bus 1 link: 0
> PCI: 00:01.0 read_resources bus 1 link: 0 done
> PCI: 00:03.0 read_resources bus 2 link: 0
> PCI: 02:00.0 read_resources bus 3 link: 0
> PCI: 03:04.0 read_resources bus 4 link: 0
> PCI: 03:04.0 read_resources bus 4 link: 0 done
> PCI: 03:05.0 read_resources bus 5 link: 0
> PCI: 03:05.0 read_resources bus 5 link: 0 done
> PCI: 03:08.0 read_resources bus 6 link: 0
> PCI: 03:08.0 read_resources bus 6 link: 0 done
> PCI: 03:09.0 read_resources bus 7 link: 0
> PCI: 03:09.0 read_resources bus 7 link: 0 done
> PCI: 02:00.0 read_resources bus 3 link: 0 done
> PCI: 00:03.0 read_resources bus 2 link: 0 done
> DOMAIN: 0000 read_resources bus 0 link: 0 done
> Root Device read_resources bus 0 link: 0 done
> Done reading resources.
> Show resources in subtree (Root Device)...After reading.
> Root Device child on link 0 CPU_CLUSTER: 0
> CPU_CLUSTER: 0 child on link 0 APIC: 00
> APIC: 00
> APIC: acac
> DOMAIN: 0000 child on link 0 PCI: 00:00.0
> DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff
> flags 40040100 index 10000000
> DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit
> ffffffff flags 40040200 index 10000100
> PCI: 00:00.0
> PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0
> flags e0004200 index 0
> PCI: 00:00.0 resource base 100000 size 7fd00000 align 0 gran 0
> limit 0 flags e0004200 index 1
> PCI: 00:00.0 resource base 100000000 size 80000000 align 0 gran
> 0 limit 0 flags e0004200 index 3
> PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran
> 0 limit 0 flags f0000200 index 4
> PCI: 00:00.0 resource base fee00000 size 1000 align 0 gran 0
> limit 0 flags f0000200 index 5
> PCI: 00:00.0 resource base a0000 size 60000 align 0 gran 0
> limit 0 flags f0000200 index 6
> PCI: 00:01.0 child on link 0 PCI: 01:00.0
> PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff
> flags 80102 index 1c
> PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffffffffffff flags 81202 index 24
> PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffff flags 80202 index 20
> PCI: 00:01.0 resource base 0 size 20000 align 17 gran 17 limit
> ffffffffffffffff flags 201 index 10
> PCI: 01:00.0
> PCI: 01:00.0 resource base 0 size 1000000 align 24 gran 24
> limit ffffffff flags 200 index 10
> PCI: 01:00.0 resource base 0 size 10000000 align 28 gran 28
> limit ffffffffffffffff flags 1201 index 14
> PCI: 01:00.0 resource base 0 size 2000000 align 25 gran 25
> limit ffffffffffffffff flags 1201 index 1c
> PCI: 01:00.0 resource base 0 size 80 align 7 gran 7 limit ffff
> flags 100 index 24
> PCI: 01:00.0 resource base 0 size 80000 align 19 gran 19 limit
> ffffffff flags 2200 index 30
> PCI: 01:00.1
> PCI: 01:00.1 resource base 0 size 4000 align 14 gran 14 limit
> ffffffff flags 200 index 10
> PCI: 00:02.0
> PCI: 00:03.0 child on link 0 PCI: 02:00.0
> PCI: 00:03.0 resource base 0 size 0 align 12 gran 12 limit ffff
> flags 80102 index 1c
> PCI: 00:03.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffffffffffff flags 81202 index 24
> PCI: 00:03.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffff flags 80202 index 20
> PCI: 00:03.0 resource base 0 size 20000 align 17 gran 17 limit
> ffffffffffffffff flags 201 index 10
> PCI: 02:00.0 child on link 0 PCI: 03:04.0
> PCI: 02:00.0 resource base 0 size 0 align 12 gran 12 limit
> ffffffff flags 80102 index 1c
> PCI: 02:00.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffffffffffff flags 81202 index 24
> PCI: 02:00.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffff flags 80202 index 20
> PCI: 02:00.0 resource base 0 size 20000 align 17 gran 17 limit
> ffffffff flags 200 index 10
> PCI: 03:04.0
> PCI: 03:04.0 resource base 0 size 0 align 12 gran 12 limit
> ffffffff flags 80102 index 1c
> PCI: 03:04.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffffffffffff flags 81202 index 24
> PCI: 03:04.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffff flags 80202 index 20
> PCI: 03:05.0 child on link 0 PCI: 05:00.0
> PCI: 03:05.0 resource base 0 size 0 align 12 gran 12 limit
> ffffffff flags 80102 index 1c
> PCI: 03:05.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffffffffffff flags 81202 index 24
> PCI: 03:05.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffff flags 80202 index 20
> PCI: 05:00.0
> PCI: 05:00.0 resource base 0 size 200000 align 21 gran 21
> limit ffffffffffffffff flags 1201 index 10
> PCI: 05:00.0 resource base 0 size 20 align 5 gran 5 limit
> ffff flags 100 index 18
> PCI: 05:00.0 resource base 0 size 4000 align 14 gran 14
> limit ffffffffffffffff flags 1201 index 20
> PCI: 05:00.1
> PCI: 05:00.1 resource base 0 size 200000 align 21 gran 21
> limit ffffffffffffffff flags 1201 index 10
> PCI: 05:00.1 resource base 0 size 20 align 5 gran 5 limit
> ffff flags 100 index 18
> PCI: 05:00.1 resource base 0 size 4000 align 14 gran 14
> limit ffffffffffffffff flags 1201 index 20
> PCI: 03:08.0
> PCI: 03:08.0 resource base 0 size 0 align 12 gran 12 limit
> ffffffff flags 80102 index 1c
> PCI: 03:08.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffffffffffff flags 81202 index 24
> PCI: 03:08.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffff flags 80202 index 20
> PCI: 03:09.0
> PCI: 03:09.0 resource base 0 size 0 align 12 gran 12 limit
> ffffffff flags 80102 index 1c
> PCI: 03:09.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffffffffffff flags 81202 index 24
> PCI: 03:09.0 resource base 0 size 0 align 20 gran 20 limit
> ffffffff flags 80202 index 20
> PCI: 00:04.0
> PCI: 00:0b.0
> PCI: 00:0b.0 resource base 0 size 20000 align 17 gran 17 limit
> ffffffffffffffff flags 201 index 18
> PCI: 00:0b.0 resource base 0 size 4000 align 14 gran 14 limit
> ffffffffffffffff flags 201 index 20
> PCI: 00:0e.0
> PCI: 00:0f.0
> PCI: 00:13.0
> PCI: 00:13.0 resource base 0 size 400 align 10 gran 10 limit
> ffffffffffffffff flags 201 index 10
> PCI: 00:14.0
> PCI: 00:14.1
> PCI: 00:14.2
> PCI: 00:14.3
> PCI: 00:16.0
> PCI: 00:16.0 resource base 0 size 400 align 10 gran 10 limit
> ffffffff flags 200 index 10
> PCI: 00:17.0
> PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff
> flags 100 index 10
> PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff
> flags 100 index 14
> PCI: 00:17.0 resource base 0 size 8 align 3 gran 3 limit ffff
> flags 100 index 18
> PCI: 00:17.0 resource base 0 size 4 align 2 gran 2 limit ffff
> flags 100 index 1c
> PCI: 00:17.0 resource base 0 size 20 align 5 gran 5 limit ffff
> flags 100 index 20
> PCI: 00:17.0 resource base 0 size 800 align 11 gran 11 limit
> ffffffff flags 200 index 24
> PCI: 00:18.0
> PCI: 00:18.0 resource base 0 size 8 align 3 gran 3 limit ffff
> flags 100 index 10
> PCI: 00:18.0 resource base 0 size 4 align 2 gran 2 limit ffff
> flags 100 index 14
> PCI: 00:18.0 resource base 0 size 8 align 3 gran 3 limit ffff
> flags 100 index 18
> PCI: 00:18.0 resource base 0 size 4 align 2 gran 2 limit ffff
> flags 100 index 1c
> PCI: 00:18.0 resource base 0 size 20 align 5 gran 5 limit ffff
> flags 100 index 20
> PCI: 00:18.0 resource base 0 size 800 align 11 gran 11 limit
> ffffffff flags 200 index 24
> PCI: 00:1f.0
> PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0
> flags c0040100 index 10000000
> PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0
> limit 0 flags c0040200 index 10000100
> PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0
> limit 0 flags c0000200 index 3
> PCI: 00:1f.3
> PCI: 00:1f.3 resource base 0 size 20 align 5 gran 5 limit
> ffffffff flags 200 index 10
> PCI: 00:1f.3 resource base efa0 size 20 align 0 gran 0 limit 0
> flags f0000100 index 20
> DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran:
> 0 limit: ffff
> PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran:
> 12 limit: ffff
> PCI: 01:00.0 24 * [0x0 - 0x7f] io
> PCI: 00:01.0 compute_resources_io: base: 80 size: 1000 align: 12
> gran: 12 limit: ffff done
> PCI: 00:03.0 compute_resources_io: base: 0 size: 0 align: 12 gran:
> 12 limit: ffff
> PCI: 02:00.0 compute_resources_io: base: 0 size: 0 align: 12 gran:
> 12 limit: ffffffff
> PCI: 03:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran:
> 12 limit: ffffffff
> PCI: 03:04.0 compute_resources_io: base: 0 size: 0 align: 12 gran:
> 12 limit: ffffffff done
> PCI: 03:05.0 compute_resources_io: base: 0 size: 0 align: 12 gran:
> 12 limit: ffffffff
> PCI: 05:00.0 18 * [0x0 - 0x1f] io
> PCI: 05:00.1 18 * [0x20 - 0x3f] io
> PCI: 03:05.0 compute_resources_io: base: 40 size: 1000 align: 12
> gran: 12 limit: ffff done
> PCI: 03:08.0 compute_resources_io: base: 0 size: 0 align: 12 gran:
> 12 limit: ffffffff
> PCI: 03:08.0 compute_resources_io: base: 0 size: 0 align: 12 gran:
> 12 limit: ffffffff done
> PCI: 03:09.0 compute_resources_io: base: 0 size: 0 align: 12 gran:
> 12 limit: ffffffff
> PCI: 03:09.0 compute_resources_io: base: 0 size: 0 align: 12 gran:
> 12 limit: ffffffff done
> PCI: 03:05.0 1c * [0x0 - 0xfff] io
> PCI: 02:00.0 compute_resources_io: base: 1000 size: 1000 align: 12
> gran: 12 limit: ffff done
> PCI: 02:00.0 1c * [0x0 - 0xfff] io
> PCI: 00:03.0 compute_resources_io: base: 1000 size: 1000 align: 12
> gran: 12 limit: ffff done
> PCI: 00:01.0 1c * [0x0 - 0xfff] io
> PCI: 00:03.0 1c * [0x1000 - 0x1fff] io
> PCI: 00:17.0 20 * [0x2000 - 0x201f] io
> PCI: 00:18.0 20 * [0x2020 - 0x203f] io
> PCI: 00:17.0 10 * [0x2040 - 0x2047] io
> PCI: 00:17.0 18 * [0x2048 - 0x204f] io
> PCI: 00:18.0 10 * [0x2050 - 0x2057] io
> PCI: 00:18.0 18 * [0x2058 - 0x205f] io
> PCI: 00:17.0 14 * [0x2060 - 0x2063] io
> PCI: 00:17.0 1c * [0x2064 - 0x2067] io
> PCI: 00:18.0 14 * [0x2068 - 0x206b] io
> PCI: 00:18.0 1c * [0x206c - 0x206f] io
> DOMAIN: 0000 compute_resources_io: base: 2070 size: 2070 align: 12
> gran: 0 limit: ffff done
> DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran:
> 0 limit: ffffffff
> PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffffffffffff
> PCI: 01:00.0 14 * [0x0 - 0xfffffff] prefmem
> PCI: 01:00.0 1c * [0x10000000 - 0x11ffffff] prefmem
> PCI: 00:01.0 compute_resources_prefmem: base: 12000000 size:
> 12000000 align: 28 gran: 20 limit: ffffffffffffffff done
> PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff
> PCI: 01:00.0 10 * [0x0 - 0xffffff] mem
> PCI: 01:00.0 30 * [0x1000000 - 0x107ffff] mem
> PCI: 01:00.1 10 * [0x1080000 - 0x1083fff] mem
> PCI: 00:01.0 compute_resources_mem: base: 1084000 size: 1100000
> align: 24 gran: 20 limit: ffffffff done
> PCI: 00:03.0 compute_resources_prefmem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffffffffffff
> PCI: 02:00.0 compute_resources_prefmem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffffffffffff
> PCI: 03:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffffffffffff
> PCI: 03:04.0 compute_resources_prefmem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffffffffffff done
> PCI: 03:05.0 compute_resources_prefmem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffffffffffff
> PCI: 05:00.0 10 * [0x0 - 0x1fffff] prefmem
> PCI: 05:00.1 10 * [0x200000 - 0x3fffff] prefmem
> PCI: 05:00.0 20 * [0x400000 - 0x403fff] prefmem
> PCI: 05:00.1 20 * [0x404000 - 0x407fff] prefmem
> PCI: 03:05.0 compute_resources_prefmem: base: 408000 size: 500000
> align: 21 gran: 20 limit: ffffffffffffffff done
> PCI: 03:08.0 compute_resources_prefmem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffffffffffff
> PCI: 03:08.0 compute_resources_prefmem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffffffffffff done
> PCI: 03:09.0 compute_resources_prefmem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffffffffffff
> PCI: 03:09.0 compute_resources_prefmem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffffffffffff done
> PCI: 03:05.0 24 * [0x0 - 0x4fffff] prefmem
> PCI: 02:00.0 compute_resources_prefmem: base: 500000 size: 500000
> align: 21 gran: 20 limit: ffffffffffffffff done
> PCI: 02:00.0 24 * [0x0 - 0x4fffff] prefmem
> PCI: 00:03.0 compute_resources_prefmem: base: 500000 size: 500000
> align: 21 gran: 20 limit: ffffffffffffffff done
> PCI: 00:03.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff
> PCI: 02:00.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff
> PCI: 03:04.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff
> PCI: 03:04.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff done
> PCI: 03:05.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff
> PCI: 03:05.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff done
> PCI: 03:08.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff
> PCI: 03:08.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff done
> PCI: 03:09.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff
> PCI: 03:09.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff done
> PCI: 02:00.0 compute_resources_mem: base: 0 size: 0 align: 20
> gran: 20 limit: ffffffff done
> PCI: 02:00.0 10 * [0x0 - 0x1ffff] mem
> PCI: 00:03.0 compute_resources_mem: base: 20000 size: 100000
> align: 20 gran: 20 limit: ffffffff done
> PCI: 00:01.0 24 * [0x0 - 0x11ffffff] prefmem
> PCI: 00:01.0 20 * [0x12000000 - 0x130fffff] mem
> PCI: 00:03.0 24 * [0x13200000 - 0x136fffff] prefmem
> PCI: 00:03.0 20 * [0x13700000 - 0x137fffff] mem
> PCI: 00:01.0 10 * [0x13800000 - 0x1381ffff] mem
> PCI: 00:03.0 10 * [0x13820000 - 0x1383ffff] mem
> PCI: 00:0b.0 18 * [0x13840000 - 0x1385ffff] mem
> PCI: 00:0b.0 20 * [0x13860000 - 0x13863fff] mem
> PCI: 00:17.0 24 * [0x13864000 - 0x138647ff] mem
> PCI: 00:18.0 24 * [0x13864800 - 0x13864fff] mem
> PCI: 00:13.0 10 * [0x13865000 - 0x138653ff] mem
> PCI: 00:16.0 10 * [0x13865400 - 0x138657ff] mem
> PCI: 00:1f.3 10 * [0x13865800 - 0x1386581f] mem
> DOMAIN: 0000 compute_resources_mem: base: 13865820 size: 13865820
> align: 28 gran: 0 limit: ffffffff done
> avoid_fixed_resources: DOMAIN: 0000
> avoid_fixed_resources:@DOMAIN: 0000 10000000 limit 0000ffff
> avoid_fixed_resources:@DOMAIN: 0000 10000100 limit ffffffff
> constrain_resources: DOMAIN: 0000
> constrain_resources: PCI: 00:00.0
> constrain_resources: PCI: 00:01.0
> constrain_resources: PCI: 01:00.0
> constrain_resources: PCI: 01:00.1
> constrain_resources: PCI: 00:03.0
> constrain_resources: PCI: 02:00.0
> constrain_resources: PCI: 03:04.0
> constrain_resources: PCI: 03:05.0
> constrain_resources: PCI: 05:00.0
> constrain_resources: PCI: 05:00.1
> constrain_resources: PCI: 03:08.0
> constrain_resources: PCI: 03:09.0
> constrain_resources: PCI: 00:0b.0
> constrain_resources: PCI: 00:0e.0
> constrain_resources: PCI: 00:0f.0
> constrain_resources: PCI: 00:13.0
> constrain_resources: PCI: 00:16.0
> constrain_resources: PCI: 00:17.0
> constrain_resources: PCI: 00:18.0
> constrain_resources: PCI: 00:1f.0
> constrain_resources: PCI: 00:1f.3
> avoid_fixed_resources2: DOMAIN: 0000@10000000 limit 0000ffff
> lim->base 00001000 lim->limit 0000ef9f
> avoid_fixed_resources2: DOMAIN: 0000@10000100 limit ffffffff
> lim->base 7fe00000 lim->limit dfffffff
> Setting resources...
> DOMAIN: 0000 allocate_resources_io: base:1000 size:2070 align:12
> gran:0 limit:ef9f
> Assigned: PCI: 00:01.0 1c * [0x1000 - 0x1fff] io
> Assigned: PCI: 00:03.0 1c * [0x2000 - 0x2fff] io
> Assigned: PCI: 00:17.0 20 * [0x3000 - 0x301f] io
> Assigned: PCI: 00:18.0 20 * [0x3020 - 0x303f] io
> Assigned: PCI: 00:17.0 10 * [0x3040 - 0x3047] io
> Assigned: PCI: 00:17.0 18 * [0x3048 - 0x304f] io
> Assigned: PCI: 00:18.0 10 * [0x3050 - 0x3057] io
> Assigned: PCI: 00:18.0 18 * [0x3058 - 0x305f] io
> Assigned: PCI: 00:17.0 14 * [0x3060 - 0x3063] io
> Assigned: PCI: 00:17.0 1c * [0x3064 - 0x3067] io
> Assigned: PCI: 00:18.0 14 * [0x3068 - 0x306b] io
> Assigned: PCI: 00:18.0 1c * [0x306c - 0x306f] io
> DOMAIN: 0000 allocate_resources_io: next_base: 3070 size: 2070
> align: 12 gran: 0 done
> PCI: 00:01.0 allocate_resources_io: base:1000 size:1000 align:12
> gran:12 limit:ef9f
> Assigned: PCI: 01:00.0 24 * [0x1000 - 0x107f] io
> PCI: 00:01.0 allocate_resources_io: next_base: 1080 size: 1000
> align: 12 gran: 12 done
> PCI: 00:03.0 allocate_resources_io: base:2000 size:1000 align:12
> gran:12 limit:ef9f
> Assigned: PCI: 02:00.0 1c * [0x2000 - 0x2fff] io
> PCI: 00:03.0 allocate_resources_io: next_base: 3000 size: 1000
> align: 12 gran: 12 done
> PCI: 02:00.0 allocate_resources_io: base:2000 size:1000 align:12
> gran:12 limit:ef9f
> Assigned: PCI: 03:05.0 1c * [0x2000 - 0x2fff] io
> PCI: 02:00.0 allocate_resources_io: next_base: 3000 size: 1000
> align: 12 gran: 12 done
> PCI: 03:04.0 allocate_resources_io: base:ef9f size:0 align:12
> gran:12 limit:ef9f
> PCI: 03:04.0 allocate_resources_io: next_base: ef9f size: 0 align:
> 12 gran: 12 done
> PCI: 03:05.0 allocate_resources_io: base:2000 size:1000 align:12
> gran:12 limit:ef9f
> Assigned: PCI: 05:00.0 18 * [0x2000 - 0x201f] io
> Assigned: PCI: 05:00.1 18 * [0x2020 - 0x203f] io
> PCI: 03:05.0 allocate_resources_io: next_base: 2040 size: 1000
> align: 12 gran: 12 done
> PCI: 03:08.0 allocate_resources_io: base:ef9f size:0 align:12
> gran:12 limit:ef9f
> PCI: 03:08.0 allocate_resources_io: next_base: ef9f size: 0 align:
> 12 gran: 12 done
> PCI: 03:09.0 allocate_resources_io: base:ef9f size:0 align:12
> gran:12 limit:ef9f
> PCI: 03:09.0 allocate_resources_io: next_base: ef9f size: 0 align:
> 12 gran: 12 done
> DOMAIN: 0000 allocate_resources_mem: base:c0000000 size:13865820
> align:28 gran:0 limit:dfffffff
> Assigned: PCI: 00:01.0 24 * [0xc0000000 - 0xd1ffffff] prefmem
> Assigned: PCI: 00:01.0 20 * [0xd2000000 - 0xd30fffff] mem
> Assigned: PCI: 00:03.0 24 * [0xd3200000 - 0xd36fffff] prefmem
> Assigned: PCI: 00:03.0 20 * [0xd3700000 - 0xd37fffff] mem
> Assigned: PCI: 00:01.0 10 * [0xd3800000 - 0xd381ffff] mem
> Assigned: PCI: 00:03.0 10 * [0xd3820000 - 0xd383ffff] mem
> Assigned: PCI: 00:0b.0 18 * [0xd3840000 - 0xd385ffff] mem
> Assigned: PCI: 00:0b.0 20 * [0xd3860000 - 0xd3863fff] mem
> Assigned: PCI: 00:17.0 24 * [0xd3864000 - 0xd38647ff] mem
> Assigned: PCI: 00:18.0 24 * [0xd3864800 - 0xd3864fff] mem
> Assigned: PCI: 00:13.0 10 * [0xd3865000 - 0xd38653ff] mem
> Assigned: PCI: 00:16.0 10 * [0xd3865400 - 0xd38657ff] mem
> Assigned: PCI: 00:1f.3 10 * [0xd3865800 - 0xd386581f] mem
> DOMAIN: 0000 allocate_resources_mem: next_base: d3865820 size:
> 13865820 align: 28 gran: 0 done
> PCI: 00:01.0 allocate_resources_prefmem: base:c0000000
> size:12000000 align:28 gran:20 limit:dfffffff
> Assigned: PCI: 01:00.0 14 * [0xc0000000 - 0xcfffffff] prefmem
> Assigned: PCI: 01:00.0 1c * [0xd0000000 - 0xd1ffffff] prefmem
> PCI: 00:01.0 allocate_resources_prefmem: next_base: d2000000 size:
> 12000000 align: 28 gran: 20 done
> PCI: 00:01.0 allocate_resources_mem: base:d2000000 size:1100000
> align:24 gran:20 limit:dfffffff
> Assigned: PCI: 01:00.0 10 * [0xd2000000 - 0xd2ffffff] mem
> Assigned: PCI: 01:00.0 30 * [0xd3000000 - 0xd307ffff] mem
> Assigned: PCI: 01:00.1 10 * [0xd3080000 - 0xd3083fff] mem
> PCI: 00:01.0 allocate_resources_mem: next_base: d3084000 size:
> 1100000 align: 24 gran: 20 done
> PCI: 00:03.0 allocate_resources_prefmem: base:d3200000 size:500000
> align:21 gran:20 limit:dfffffff
> Assigned: PCI: 02:00.0 24 * [0xd3200000 - 0xd36fffff] prefmem
> PCI: 00:03.0 allocate_resources_prefmem: next_base: d3700000 size:
> 500000 align: 21 gran: 20 done
> PCI: 02:00.0 allocate_resources_prefmem: base:d3200000 size:500000
> align:21 gran:20 limit:dfffffff
> Assigned: PCI: 03:05.0 24 * [0xd3200000 - 0xd36fffff] prefmem
> PCI: 02:00.0 allocate_resources_prefmem: next_base: d3700000 size:
> 500000 align: 21 gran: 20 done
> PCI: 03:04.0 allocate_resources_prefmem: base:dfffffff size:0
> align:20 gran:20 limit:dfffffff
> PCI: 03:04.0 allocate_resources_prefmem: next_base: dfffffff size:
> 0 align: 20 gran: 20 done
> PCI: 03:05.0 allocate_resources_prefmem: base:d3200000 size:500000
> align:21 gran:20 limit:dfffffff
> Assigned: PCI: 05:00.0 10 * [0xd3200000 - 0xd33fffff] prefmem
> Assigned: PCI: 05:00.1 10 * [0xd3400000 - 0xd35fffff] prefmem
> Assigned: PCI: 05:00.0 20 * [0xd3600000 - 0xd3603fff] prefmem
> Assigned: PCI: 05:00.1 20 * [0xd3604000 - 0xd3607fff] prefmem
> PCI: 03:05.0 allocate_resources_prefmem: next_base: d3608000 size:
> 500000 align: 21 gran: 20 done
> PCI: 03:08.0 allocate_resources_prefmem: base:dfffffff size:0
> align:20 gran:20 limit:dfffffff
> PCI: 03:08.0 allocate_resources_prefmem: next_base: dfffffff size:
> 0 align: 20 gran: 20 done
> PCI: 03:09.0 allocate_resources_prefmem: base:dfffffff size:0
> align:20 gran:20 limit:dfffffff
> PCI: 03:09.0 allocate_resources_prefmem: next_base: dfffffff size:
> 0 align: 20 gran: 20 done
> PCI: 00:03.0 allocate_resources_mem: base:d3700000 size:100000
> align:20 gran:20 limit:dfffffff
> Assigned: PCI: 02:00.0 10 * [0xd3700000 - 0xd371ffff] mem
> PCI: 00:03.0 allocate_resources_mem: next_base: d3720000 size:
> 100000 align: 20 gran: 20 done
> PCI: 02:00.0 allocate_resources_mem: base:dfffffff size:0 align:20
> gran:20 limit:dfffffff
> PCI: 02:00.0 allocate_resources_mem: next_base: dfffffff size: 0
> align: 20 gran: 20 done
> PCI: 03:04.0 allocate_resources_mem: base:dfffffff size:0 align:20
> gran:20 limit:dfffffff
> PCI: 03:04.0 allocate_resources_mem: next_base: dfffffff size: 0
> align: 20 gran: 20 done
> PCI: 03:05.0 allocate_resources_mem: base:dfffffff size:0 align:20
> gran:20 limit:dfffffff
> PCI: 03:05.0 allocate_resources_mem: next_base: dfffffff size: 0
> align: 20 gran: 20 done
> PCI: 03:08.0 allocate_resources_mem: base:dfffffff size:0 align:20
> gran:20 limit:dfffffff
> PCI: 03:08.0 allocate_resources_mem: next_base: dfffffff size: 0
> align: 20 gran: 20 done
> PCI: 03:09.0 allocate_resources_mem: base:dfffffff size:0 align:20
> gran:20 limit:dfffffff
> PCI: 03:09.0 allocate_resources_mem: next_base: dfffffff size: 0
> align: 20 gran: 20 done
> Root Device assign_resources, bus 0 link: 0
> Top of Low Used DRAM (BMBOUND): 0x80000000
> Top of Upper Used DRAM (BMBOUND_HI): 0x180000000
> SMM memory location: 0x80000000 SMM memory size: 0x0
> Subtracting 0M for SMM
> Available memory below 4GB: 0x7fe00000 (2046M)
> Available memory above 4GB: 2048M
> Adding PCIe config bar base=0xe0000000 size=0x10000000
> DOMAIN: 0000 assign_resources, bus 0 link: 0
> PCI: 00:01.0 1c <- [0x0000001000 - 0x0000001fff] size 0x00001000
> gran 0x0c bus 01 io
> PCI: 00:01.0 24 <- [0x00c0000000 - 0x00d1ffffff] size 0x12000000
> gran 0x14 bus 01 prefmem
> PCI: 00:01.0 20 <- [0x00d2000000 - 0x00d30fffff] size 0x01100000
> gran 0x14 bus 01 mem
> PCI: 00:01.0 10 <- [0x00d3800000 - 0x00d381ffff] size 0x00020000
> gran 0x11 mem64
> PCI: 00:01.0 assign_resources, bus 1 link: 0
> PCI: 01:00.0 10 <- [0x00d2000000 - 0x00d2ffffff] size 0x01000000
> gran 0x18 mem
> PCI: 01:00.0 14 <- [0x00c0000000 - 0x00cfffffff] size 0x10000000
> gran 0x1c prefmem64
> PCI: 01:00.0 1c <- [0x00d0000000 - 0x00d1ffffff] size 0x02000000
> gran 0x19 prefmem64
> PCI: 01:00.0 24 <- [0x0000001000 - 0x000000107f] size 0x00000080
> gran 0x07 io
> PCI: 01:00.0 30 <- [0x00d3000000 - 0x00d307ffff] size 0x00080000
> gran 0x13 romem
> PCI: 01:00.1 10 <- [0x00d3080000 - 0x00d3083fff] size 0x00004000
> gran 0x0e mem
> PCI: 00:01.0 assign_resources, bus 1 link: 0
> PCI: 00:03.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000
> gran 0x0c bus 02 io
> PCI: 00:03.0 24 <- [0x00d3200000 - 0x00d36fffff] size 0x00500000
> gran 0x14 bus 02 prefmem
> PCI: 00:03.0 20 <- [0x00d3700000 - 0x00d37fffff] size 0x00100000
> gran 0x14 bus 02 mem
> PCI: 00:03.0 10 <- [0x00d3820000 - 0x00d383ffff] size 0x00020000
> gran 0x11 mem64
> PCI: 00:03.0 assign_resources, bus 2 link: 0
> PCI: 02:00.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000
> gran 0x0c bus 03 io
> PCI: 02:00.0 24 <- [0x00d3200000 - 0x00d36fffff] size 0x00500000
> gran 0x14 bus 03 prefmem
> PCI: 02:00.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000
> gran 0x14 bus 03 mem
> PCI: 02:00.0 10 <- [0x00d3700000 - 0x00d371ffff] size 0x00020000
> gran 0x11 mem
> PCI: 02:00.0 assign_resources, bus 3 link: 0
> PCI: 03:04.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000
> gran 0x0c bus 04 io
> PCI: 03:04.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000
> gran 0x14 bus 04 prefmem
> PCI: 03:04.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000
> gran 0x14 bus 04 mem
> PCI: 03:05.0 1c <- [0x0000002000 - 0x0000002fff] size 0x00001000
> gran 0x0c bus 05 io
> PCI: 03:05.0 24 <- [0x00d3200000 - 0x00d36fffff] size 0x00500000
> gran 0x14 bus 05 prefmem
> PCI: 03:05.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000
> gran 0x14 bus 05 mem
> PCI: 03:05.0 assign_resources, bus 5 link: 0
> PCI: 05:00.0 10 <- [0x00d3200000 - 0x00d33fffff] size 0x00200000
> gran 0x15 prefmem64
> PCI: 05:00.0 18 <- [0x0000002000 - 0x000000201f] size 0x00000020
> gran 0x05 io
> PCI: 05:00.0 20 <- [0x00d3600000 - 0x00d3603fff] size 0x00004000
> gran 0x0e prefmem64
> PCI: 05:00.1 10 <- [0x00d3400000 - 0x00d35fffff] size 0x00200000
> gran 0x15 prefmem64
> PCI: 05:00.1 18 <- [0x0000002020 - 0x000000203f] size 0x00000020
> gran 0x05 io
> PCI: 05:00.1 20 <- [0x00d3604000 - 0x00d3607fff] size 0x00004000
> gran 0x0e prefmem64
> PCI: 03:05.0 assign_resources, bus 5 link: 0
> PCI: 03:08.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000
> gran 0x0c bus 06 io
> PCI: 03:08.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000
> gran 0x14 bus 06 prefmem
> PCI: 03:08.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000
> gran 0x14 bus 06 mem
> PCI: 03:09.0 1c <- [0x000000ef9f - 0x000000ef9e] size 0x00000000
> gran 0x0c bus 07 io
> PCI: 03:09.0 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000
> gran 0x14 bus 07 prefmem
> PCI: 03:09.0 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000
> gran 0x14 bus 07 mem
> PCI: 02:00.0 assign_resources, bus 3 link: 0
> PCI: 00:03.0 assign_resources, bus 2 link: 0
> PCI: 00:0b.0 18 <- [0x00d3840000 - 0x00d385ffff] size 0x00020000
> gran 0x11 mem64
> PCI: 00:0b.0 20 <- [0x00d3860000 - 0x00d3863fff] size 0x00004000
> gran 0x0e mem64
> PCI: 00:13.0 10 <- [0x00d3865000 - 0x00d38653ff] size 0x00000400
> gran 0x0a mem64
> PCI: 00:16.0 10 <- [0x00d3865400 - 0x00d38657ff] size 0x00000400
> gran 0x0a mem
> PCI: 00:17.0 10 <- [0x0000003040 - 0x0000003047] size 0x00000008
> gran 0x03 io
> PCI: 00:17.0 14 <- [0x0000003060 - 0x0000003063] size 0x00000004
> gran 0x02 io
> PCI: 00:17.0 18 <- [0x0000003048 - 0x000000304f] size 0x00000008
> gran 0x03 io
> PCI: 00:17.0 1c <- [0x0000003064 - 0x0000003067] size 0x00000004
> gran 0x02 io
> PCI: 00:17.0 20 <- [0x0000003000 - 0x000000301f] size 0x00000020
> gran 0x05 io
> PCI: 00:17.0 24 <- [0x00d3864000 - 0x00d38647ff] size 0x00000800
> gran 0x0b mem
> PCI: 00:18.0 10 <- [0x0000003050 - 0x0000003057] size 0x00000008
> gran 0x03 io
> PCI: 00:18.0 14 <- [0x0000003068 - 0x000000306b] size 0x00000004
> gran 0x02 io
> PCI: 00:18.0 18 <- [0x0000003058 - 0x000000305f] size 0x00000008
> gran 0x03 io
> PCI: 00:18.0 1c <- [0x000000306c - 0x000000306f] size 0x00000004
> gran 0x02 io
> PCI: 00:18.0 20 <- [0x0000003020 - 0x000000303f] size 0x00000020
> gran 0x05 io
> PCI: 00:18.0 24 <- [0x00d3864800 - 0x00d3864fff] size 0x00000800
> gran 0x0b mem
> PCI: 00:1f.3 10 <- [0x00d3865800 - 0x00d386581f] size 0x00000020
> gran 0x05 mem
> DOMAIN: 0000 assign_resources, bus 0 link: 0
> Root Device assign_resources, bus 0 link: 0
> Done setting resources.
> Show resources in subtree (Root Device)...After assigning values.
> Root Device child on link 0 CPU_CLUSTER: 0
> CPU_CLUSTER: 0 child on link 0 APIC: 00
> APIC: 00
> APIC: acac
> DOMAIN: 0000 child on link 0 PCI: 00:00.0
> DOMAIN: 0000 resource base 1000 size 2070 align 12 gran 0 limit
> ef9f flags 40040100 index 10000000
> DOMAIN: 0000 resource base c0000000 size 13865820 align 28 gran
> 0 limit dfffffff flags 40040200 index 10000100
> DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0
> flags e0004200 index 0
> DOMAIN: 0000 resource base 100000 size 7fd00000 align 0 gran 0
> limit 0 flags e0004200 index 1
> DOMAIN: 0000 resource base 100000000 size 80000000 align 0 gran
> 0 limit 0 flags e0004200 index 3
> DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0
> limit 0 flags f0000200 index 4
> DOMAIN: 0000 resource base fee00000 size 1000 align 0 gran 0
> limit 0 flags f0000200 index 5
> DOMAIN: 0000 resource base a0000 size 60000 align 0 gran 0 limit
> 0 flags f0000200 index 6
> PCI: 00:00.0
> PCI: 00:00.0 resource base 0 size a0000 align 0 gran 0 limit 0
> flags e0004200 index 0
> PCI: 00:00.0 resource base 100000 size 7fd00000 align 0 gran 0
> limit 0 flags e0004200 index 1
> PCI: 00:00.0 resource base 100000000 size 80000000 align 0 gran
> 0 limit 0 flags e0004200 index 3
> PCI: 00:00.0 resource base e0000000 size 10000000 align 0 gran
> 0 limit 0 flags f0000200 index 4
> PCI: 00:00.0 resource base fee00000 size 1000 align 0 gran 0
> limit 0 flags f0000200 index 5
> PCI: 00:00.0 resource base a0000 size 60000 align 0 gran 0
> limit 0 flags f0000200 index 6
> PCI: 00:01.0 child on link 0 PCI: 01:00.0
> PCI: 00:01.0 resource base 1000 size 1000 align 12 gran 12
> limit ef9f flags 60080102 index 1c
> PCI: 00:01.0 resource base c0000000 size 12000000 align 28 gran
> 20 limit dfffffff flags 60081202 index 24
> PCI: 00:01.0 resource base d2000000 size 1100000 align 24 gran
> 20 limit dfffffff flags 60080202 index 20
> PCI: 00:01.0 resource base d3800000 size 20000 align 17 gran 17
> limit dfffffff flags 60000201 index 10
> PCI: 01:00.0
> PCI: 01:00.0 resource base d2000000 size 1000000 align 24 gran
> 24 limit dfffffff flags 60000200 index 10
> PCI: 01:00.0 resource base c0000000 size 10000000 align 28
> gran 28 limit dfffffff flags 60001201 index 14
> PCI: 01:00.0 resource base d0000000 size 2000000 align 25 gran
> 25 limit dfffffff flags 60001201 index 1c
> PCI: 01:00.0 resource base 1000 size 80 align 7 gran 7 limit
> ef9f flags 60000100 index 24
> PCI: 01:00.0 resource base d3000000 size 80000 align 19 gran
> 19 limit dfffffff flags 60002200 index 30
> PCI: 01:00.1
> PCI: 01:00.1 resource base d3080000 size 4000 align 14 gran 14
> limit dfffffff flags 60000200 index 10
> PCI: 00:02.0
> PCI: 00:03.0 child on link 0 PCI: 02:00.0
> PCI: 00:03.0 resource base 2000 size 1000 align 12 gran 12
> limit ef9f flags 60080102 index 1c
> PCI: 00:03.0 resource base d3200000 size 500000 align 21 gran
> 20 limit dfffffff flags 60081202 index 24
> PCI: 00:03.0 resource base d3700000 size 100000 align 20 gran
> 20 limit dfffffff flags 60080202 index 20
> PCI: 00:03.0 resource base d3820000 size 20000 align 17 gran 17
> limit dfffffff flags 60000201 index 10
> PCI: 02:00.0 child on link 0 PCI: 03:04.0
> PCI: 02:00.0 resource base 2000 size 1000 align 12 gran 12
> limit ef9f flags 60080102 index 1c
> PCI: 02:00.0 resource base d3200000 size 500000 align 21 gran
> 20 limit dfffffff flags 60081202 index 24
> PCI: 02:00.0 resource base dfffffff size 0 align 20 gran 20
> limit dfffffff flags 60080202 index 20
> PCI: 02:00.0 resource base d3700000 size 20000 align 17 gran
> 17 limit dfffffff flags 60000200 index 10
> PCI: 03:04.0
> PCI: 03:04.0 resource base ef9f size 0 align 12 gran 12 limit
> ef9f flags 60080102 index 1c
> PCI: 03:04.0 resource base dfffffff size 0 align 20 gran 20
> limit dfffffff flags 60081202 index 24
> PCI: 03:04.0 resource base dfffffff size 0 align 20 gran 20
> limit dfffffff flags 60080202 index 20
> PCI: 03:05.0 child on link 0 PCI: 05:00.0
> PCI: 03:05.0 resource base 2000 size 1000 align 12 gran 12
> limit ef9f flags 60080102 index 1c
> PCI: 03:05.0 resource base d3200000 size 500000 align 21 gran
> 20 limit dfffffff flags 60081202 index 24
> PCI: 03:05.0 resource base dfffffff size 0 align 20 gran 20
> limit dfffffff flags 60080202 index 20
> PCI: 05:00.0
> PCI: 05:00.0 resource base d3200000 size 200000 align 21
> gran 21 limit dfffffff flags 60001201 index 10
> PCI: 05:00.0 resource base 2000 size 20 align 5 gran 5 limit
> ef9f flags 60000100 index 18
> PCI: 05:00.0 resource base d3600000 size 4000 align 14 gran
> 14 limit dfffffff flags 60001201 index 20
> PCI: 05:00.1
> PCI: 05:00.1 resource base d3400000 size 200000 align 21
> gran 21 limit dfffffff flags 60001201 index 10
> PCI: 05:00.1 resource base 2020 size 20 align 5 gran 5 limit
> ef9f flags 60000100 index 18
> PCI: 05:00.1 resource base d3604000 size 4000 align 14 gran
> 14 limit dfffffff flags 60001201 index 20
> PCI: 03:08.0
> PCI: 03:08.0 resource base ef9f size 0 align 12 gran 12 limit
> ef9f flags 60080102 index 1c
> PCI: 03:08.0 resource base dfffffff size 0 align 20 gran 20
> limit dfffffff flags 60081202 index 24
> PCI: 03:08.0 resource base dfffffff size 0 align 20 gran 20
> limit dfffffff flags 60080202 index 20
> PCI: 03:09.0
> PCI: 03:09.0 resource base ef9f size 0 align 12 gran 12 limit
> ef9f flags 60080102 index 1c
> PCI: 03:09.0 resource base dfffffff size 0 align 20 gran 20
> limit dfffffff flags 60081202 index 24
> PCI: 03:09.0 resource base dfffffff size 0 align 20 gran 20
> limit dfffffff flags 60080202 index 20
> PCI: 00:04.0
> PCI: 00:0b.0
> PCI: 00:0b.0 resource base d3840000 size 20000 align 17 gran 17
> limit dfffffff flags 60000201 index 18
> PCI: 00:0b.0 resource base d3860000 size 4000 align 14 gran 14
> limit dfffffff flags 60000201 index 20
> PCI: 00:0e.0
> PCI: 00:0f.0
> PCI: 00:13.0
> PCI: 00:13.0 resource base d3865000 size 400 align 10 gran 10
> limit dfffffff flags 60000201 index 10
> PCI: 00:14.0
> PCI: 00:14.1
> PCI: 00:14.2
> PCI: 00:14.3
> PCI: 00:16.0
> PCI: 00:16.0 resource base d3865400 size 400 align 10 gran 10
> limit dfffffff flags 60000200 index 10
> PCI: 00:17.0
> PCI: 00:17.0 resource base 3040 size 8 align 3 gran 3 limit
> ef9f flags 60000100 index 10
> PCI: 00:17.0 resource base 3060 size 4 align 2 gran 2 limit
> ef9f flags 60000100 index 14
> PCI: 00:17.0 resource base 3048 size 8 align 3 gran 3 limit
> ef9f flags 60000100 index 18
> PCI: 00:17.0 resource base 3064 size 4 align 2 gran 2 limit
> ef9f flags 60000100 index 1c
> PCI: 00:17.0 resource base 3000 size 20 align 5 gran 5 limit
> ef9f flags 60000100 index 20
> PCI: 00:17.0 resource base d3864000 size 800 align 11 gran 11
> limit dfffffff flags 60000200 index 24
> PCI: 00:18.0
> PCI: 00:18.0 resource base 3050 size 8 align 3 gran 3 limit
> ef9f flags 60000100 index 10
> PCI: 00:18.0 resource base 3068 size 4 align 2 gran 2 limit
> ef9f flags 60000100 index 14
> PCI: 00:18.0 resource base 3058 size 8 align 3 gran 3 limit
> ef9f flags 60000100 index 18
> PCI: 00:18.0 resource base 306c size 4 align 2 gran 2 limit
> ef9f flags 60000100 index 1c
> PCI: 00:18.0 resource base 3020 size 20 align 5 gran 5 limit
> ef9f flags 60000100 index 20
> PCI: 00:18.0 resource base d3864800 size 800 align 11 gran 11
> limit dfffffff flags 60000200 index 24
> PCI: 00:1f.0
> PCI: 00:1f.0 resource base 0 size 1000 align 0 gran 0 limit 0
> flags c0040100 index 10000000
> PCI: 00:1f.0 resource base ff800000 size 800000 align 0 gran 0
> limit 0 flags c0040200 index 10000100
> PCI: 00:1f.0 resource base fec00000 size 1000 align 0 gran 0
> limit 0 flags c0000200 index 3
> PCI: 00:1f.3
> PCI: 00:1f.3 resource base d3865800 size 20 align 5 gran 5
> limit dfffffff flags 60000200 index 10
> PCI: 00:1f.3 resource base efa0 size 20 align 0 gran 0 limit 0
> flags f0000100 index 20
> Done allocating resources.
> BS: BS_DEV_RESOURCES times (us): entry 0 run 1749749 exit 0
> POST: 0x74
> Enabling resources...
> PCI: 00:00.0 subsystem <- 0000/0000
> PCI: 00:00.0 cmd <- 07
> PCI: 00:01.0 bridge ctrl <- 000b
> PCI: 00:01.0 cmd <- 07
> PCI: 00:03.0 bridge ctrl <- 0003
> PCI: 00:03.0 cmd <- 07
> PCI: 00:0b.0 subsystem <- 0000/0000
> PCI: 00:0b.0 cmd <- 102
> PCI: 00:0e.0 subsystem <- 0000/0000
> PCI: 00:0e.0 cmd <- 00
> PCI: 00:0f.0 cmd <- 04
> PCI: 00:13.0 subsystem <- 0000/0000
> PCI: 00:13.0 cmd <- 106
> PCI: 00:16.0 subsystem <- 0000/0000
> PCI: 00:16.0 cmd <- 102
> PCI: 00:17.0 subsystem <- 0000/0000
> PCI: 00:17.0 cmd <- 103
> PCI: 00:18.0 subsystem <- 0000/0000
> PCI: 00:18.0 cmd <- 103
> PCI: 00:1f.0 subsystem <- 0000/0000
> PCI: 00:1f.0 cmd <- 107
> PCI: 00:1f.3 subsystem <- 0000/0000
> PCI: 00:1f.3 cmd <- 103
> PCI: 01:00.0 cmd <- 03
> PCI: 01:00.1 cmd <- 02
> PCI: 02:00.0 bridge ctrl <- 0003
> PCI: 02:00.0 cmd <- 07
> PCI: 03:04.0 bridge ctrl <- 0003
> PCI: 03:04.0 cmd <- 00
> PCI: 03:05.0 bridge ctrl <- 0003
> PCI: 03:05.0 cmd <- 07
> PCI: 03:08.0 bridge ctrl <- 0003
> PCI: 03:08.0 cmd <- 00
> PCI: 03:09.0 bridge ctrl <- 0003
> PCI: 03:09.0 cmd <- 00
> PCI: 05:00.0 cmd <- 03
> PCI: 05:00.1 cmd <- 03
> done.
> BS: BS_DEV_ENABLE times (us): entry 0 run 54672 exit 0
> POST: 0x75
> Initializing devices...
> Root Device init
> Root Device init 875 usecs
> POST: 0x75
> CPU_CLUSTER: 0 init
> start_eip=0x00001000, code_size=0x00000031
> Initializing CPU #0
> CPU: vendor Intel device 406d8
> CPU: family 06, model 4d, stepping 08
> POST: 0x60
> Enabling cache
> CPU: Genuine Intel(R) CPU @ 2.40GHz.
>
> MTRR check
> Fixed MTRRs : Enabled
> Variable MTRRs: Enabled
>
> POST: 0x93
> Setting up local apic... apic_id: 0x00 done.
> POST: 0x9b
> Disabling VMX
> CPU: 0 has 8 cores, 1 threads per core
> CPU: 0 has core 2
> CPU1: stack_base 00139000, stack_end 00139ff8
> Asserting INIT.
> Waiting for send to finish...
> +Deasserting INIT.
> Waiting for send to finish...
> +#startup loops: 2.
> Sending STARTUP #1 to 2.
> After apic_write.
> Initializing CPU #1
> Startup point 1.
> Waiting for send to finish...
> +CPU: vendor Intel device 406d8
> Sending STARTUP #2 to 2.
> After apic_write.
> CPU: family 06, model 4d, stepping 08
> Startup point 1.
> Waiting for send to finish...
> +POST: 0xAfter Startup.
> CPU: 0 has core 4
> CPU2: stack_base 00138000, stack_end 00138ff8
> 60Asserting INIT.
> Waiting for send to finish...
> +
> Enabling cache
> CPU: Genuine Intel(R) CPU @ 2.40GHz.
>
> MTRR check
> Fixed MTRRs : Enabled
> Variable MTRRs: Enabled
>
> POST: 0x93
> Setting up local apic... apic_id: 0x02 done.
> POST: 0x9b
> Disabling VMX
> Deasserting INIT.
> Waiting for send to finish...
> +CPU #1 initialized
> #startup loops: 2.
> Sending STARTUP #1 to 4.
> After apic_write.
> Initializing CPU #2
> Startup point 1.
> Waiting for send to finish...
> +CPU: vendor Intel device 406d8
> Sending STARTUP #2 to 4.
> After apic_write.
> CPU: family 06, model 4d, stepping 08
> Startup point 1.
> Waiting for send to finish...
> +POST: 0xAfter Startup.
> CPU: 0 has core 6
> CPU3: stack_base 00137000, stack_end 00137ff8
> 60Asserting INIT.
> Waiting for send to finish...
> +
> Enabling cache
> CPU: Genuine Intel(R) CPU @ 2.40GHz.
>
> MTRR check
> Fixed MTRRs : Enabled
> Variable MTRRs: Enabled
>
> POST: 0x93
> Setting up local apic... apic_id: 0x04 done.
> POST: 0x9b
> Disabling VMX
> Deasserting INIT.
> CPU #2 initialized
> Waiting for send to finish...
> +#startup loops: 2.
> Sending STARTUP #1 to 6.
> After apic_write.
> Initializing CPU #3
> Startup point 1.
> Waiting for send to finish...
> +CPU: vendor Intel device 406d8
> Sending STARTUP #2 to 6.
> After apic_write.
> CPU: family 06, model 4d, stepping 08
> Startup point 1.
> Waiting for send to finish...
> +POST: 0xAfter Startup.
> CPU: 0 has core 8
> CPU4: stack_base 00136000, stack_end 00136ff8
> 60Asserting INIT.
> Waiting for send to finish...
> +
> Enabling cache
> CPU: Genuine Intel(R) CPU @ 2.40GHz.
>
> MTRR check
> Fixed MTRRs : Enabled
> Variable MTRRs: Enabled
>
> POST: 0x93
> Setting up local apic... apic_id: 0x06 done.
> POST: 0x9b
> Disabling VMX
> Deasserting INIT.
> CPU #3 initialized
> Waiting for send to finish...
> +#startup loops: 2.
> Sending STARTUP #1 to 8.
> After apic_write.
> Initializing CPU #4
> Startup point 1.
> Waiting for send to finish...
> +CPU: vendor Intel device 406d8
> Sending STARTUP #2 to 8.
> After apic_write.
> CPU: family 06, model 4d, stepping 08
> Startup point 1.
> Waiting for send to finish...
> +POST: 0xAfter Startup.
> CPU: 0 has core 10
> CPU5: stack_base 00135000, stack_end 00135ff8
> 60Asserting INIT.
> Waiting for send to finish...
> +
> Enabling cache
> CPU: Genuine Intel(R) CPU @ 2.40GHz.
>
> MTRR check
> Fixed MTRRs : Enabled
> Variable MTRRs: Enabled
>
> POST: 0x93
> Setting up local apic... apic_id: 0x08 done.
> POST: 0x9b
> Disabling VMX
> Deasserting INIT.
> CPU #4 initialized
> Waiting for send to finish...
> +#startup loops: 2.
> Sending STARTUP #1 to 10.
> After apic_write.
> Initializing CPU #5
> Startup point 1.
> Waiting for send to finish...
> +CPU: vendor Intel device 406d8
> Sending STARTUP #2 to 10.
> After apic_write.
> CPU: family 06, model 4d, stepping 08
> Startup point 1.
> Waiting for send to finish...
> +POST: 0xAfter Startup.
> CPU: 0 has core 12
> CPU6: stack_base 00134000, stack_end 00134ff8
> 60Asserting INIT.
> Waiting for send to finish...
> +
> Enabling cache
> CPU: Genuine Intel(R) CPU @ 2.40GHz.
>
> MTRR check
> Fixed MTRRs : Enabled
> Variable MTRRs: Enabled
>
> POST: 0x93
> Setting up local apic... apic_id: 0x0a done.
> POST: 0x9b
> Disabling VMX
> Deasserting INIT.
> CPU #5 initialized
> Waiting for send to finish...
> +#startup loops: 2.
> Sending STARTUP #1 to 12.
> After apic_write.
> Initializing CPU #6
> Startup point 1.
> Waiting for send to finish...
> +CPU: vendor Intel device 406d8
> Sending STARTUP #2 to 12.
> After apic_write.
> CPU: family 06, model 4d, stepping 08
> Startup point 1.
> Waiting for send to finish...
> +POST: 0xAfter Startup.
> CPU: 0 has core 14
> CPU7: stack_base 00133000, stack_end 00133ff8
> 60Asserting INIT.
> Waiting for send to finish...
> +
> Enabling cache
> CPU: Genuine Intel(R) CPU @ 2.40GHz.
>
> MTRR check
> Fixed MTRRs : Enabled
> Variable MTRRs: Enabled
>
> POST: 0x93
> Setting up local apic... apic_id: 0x0c done.
> POST: 0x9b
> Disabling VMX
> Deasserting INIT.
> CPU #6 initialized
> Waiting for send to finish...
> +#startup loops: 2.
> Sending STARTUP #1 to 14.
> After apic_write.
> Initializing CPU #7
> Startup point 1.
> Waiting for send to finish...
> +CPU: vendor Intel device 406d8
> Sending STARTUP #2 to 14.
> After apic_write.
> CPU: family 06, model 4d, stepping 08
> Startup point 1.
> Waiting for send to finish...
> +POST: 0xAfter Startup.
> CPU #0 initialized
> Waiting for 1 CPUS to stop
> 60
> Enabling cache
> CPU: Genuine Intel(R) CPU @ 2.40GHz.
>
> MTRR check
> Fixed MTRRs : Enabled
> Variable MTRRs: Enabled
>
> POST: 0x93
> Setting up local apic... apic_id: 0x0e done.
> POST: 0x9b
> Disabling VMX
> CPU #7 initialized
> All AP CPUs stopped (1151 loops)
> CPU1: stack: 00139000 - 0013a000, lowest used address 00139d18,
> stack used: 744 bytes
> CPU2: stack: 00138000 - 00139000, lowest used address 00138d18,
> stack used: 744 bytes
> CPU3: stack: 00137000 - 00138000, lowest used address 00137d18,
> stack used: 744 bytes
> CPU4: stack: 00136000 - 00137000, lowest used address 00136d18,
> stack used: 744 bytes
> CPU5: stack: 00135000 - 00136000, lowest used address 00135d18,
> stack used: 744 bytes
> CPU6: stack: 00134000 - 00135000, lowest used address 00134d18,
> stack used: 744 bytes
> CPU7: stack: 00133000 - 00134000, lowest used address 00133d18,
> stack used: 744 bytes
> CPU_CLUSTER: 0 init 313669 usecs
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> PCI: 00:00.0 init
> PCI: 00:00.0 init 924 usecs
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> PCI: 00:0b.0 init
> PCI: 00:0b.0 init 923 usecs
> POST: 0x75
> PCI: 00:0e.0 init
> PCI: 00:0e.0 init 923 usecs
> POST: 0x75
> PCI: 00:0f.0 init
> PCI: 00:0f.0 init 923 usecs
> POST: 0x75
> PCI: 00:13.0 init
> PCI: 00:13.0 init 924 usecs
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> PCI: 00:16.0 init
> PCI: 00:16.0 init 923 usecs
> POST: 0x75
> PCI: 00:17.0 init
> SATA: Initializing...
> SATA: Controller in AHCI mode.
> ABAR: D3864000
> PCI: 00:17.0 init 4378 usecs
> POST: 0x75
> PCI: 00:18.0 init
> SATA: Initializing...
> SATA: Controller in AHCI mode.
> ABAR: D3864800
> PCI: 00:18.0 init 4377 usecs
> POST: 0x75
> PCI: 00:1f.0 init
> soc: lpc_init
> Southbridge APIC ID = 2
> Dumping IOAPIC registers
> reg 0x0000: 0x02000000
> reg 0x0001: 0x00170020
> reg 0x0002: 0x00170020
> Start writing IRQ assignments
> PIRQ A B C D E F G H
> IRQ 10 11 10 11 14 15 14 15
>
> PIRQ[A-H] routed to each INT_PIN[A-D]
> Dev INTA (IRQ) INTB (IRQ) INTC (IRQ) INTD (IRQ)
> 1: A (10) B (11) C (10) D (11)
> 2: D (11) C (10) B (11) A (10)
> 3: E (14) F (15) G (14) H (15)
> 4: H (15) G (14) F (15) E (14)
> 11: E (14) F (15) G (14) H (15)
> 14: H (15) A (10) A (10) A (10)
> 19: B (11) A (10) A (10) A (10)
> 20: C (10) D (11) E (14) F (15)
> 22: G (14) A (10) A (10) A (10)
> 23: H (15) A (10) A (10) A (10)
> 31: H (15) G (14) B (11) C (10)
> Finished writing IRQ assignments
> PCI_CFG IRQ: Write PCI config space IRQ assignments
> PCI IRQ: Found device 0:01.00 using PIN A
> INT_PIN : 1 (PIN A)
> PIRQ : A
> INT_LINE : 0xA (IRQ 10)
> PCI IRQ: Found device 0:03.00 using PIN A
> INT_PIN : 1 (PIN A)
> PIRQ : E
> INT_LINE : 0xE (IRQ 14)
> PCI IRQ: Found device 0:0B.00 using PIN A
> INT_PIN : 1 (PIN A)
> PIRQ : E
> INT_LINE : 0xE (IRQ 14)
> PCI IRQ: Found device 0:13.00 using PIN A
> INT_PIN : 1 (PIN A)
> PIRQ : B
> INT_LINE : 0xB (IRQ 11)
> PCI IRQ: Found device 0:16.00 using PIN A
> INT_PIN : 1 (PIN A)
> PIRQ : G
> INT_LINE : 0xE (IRQ 14)
> PCI IRQ: Found device 0:17.00 using PIN A
> INT_PIN : 1 (PIN A)
> PIRQ : H
> INT_LINE : 0xF (IRQ 15)
> PCI IRQ: Found device 0:18.00 using PIN A
> Warning: PCI Device 24 does not have an IRQ entry, skipping it
> PCI IRQ: Found device 0:1F.03 using PIN B
> INT_PIN : 2 (PIN B)
> PIRQ : G
> INT_LINE : 0xE (IRQ 14)
> PCI IRQ: Found device 0:0F.00 using PIN A
> Warning: PCI Device 15 does not have an IRQ entry, skipping it
> PCI IRQ: Found device 1:00.00 using PIN A
> With INT_PIN swizzled to PIN A
> Attached to bridge device 0:01h.00h
> INT_PIN : 1 (PIN A)
> Swizzled to : 1 (PIN A)
> PIRQ : A
> INT_LINE : 0xA (IRQ 10)
> PCI IRQ: Found device 1:00.01 using PIN B
> With INT_PIN swizzled to PIN B
> Attached to bridge device 0:01h.00h
> INT_PIN : 2 (PIN B)
> Swizzled to : 2 (PIN B)
> PIRQ : B
> INT_LINE : 0xB (IRQ 11)
> PCI IRQ: Found device 2:00.00 using PIN A
> With INT_PIN swizzled to PIN A
> Attached to bridge device 0:03h.00h
> INT_PIN : 1 (PIN A)
> Swizzled to : 1 (PIN A)
> PIRQ : E
> INT_LINE : 0xE (IRQ 14)
> PCI IRQ: Found device 3:04.00 using PIN A
> With INT_PIN swizzled to PIN A
> Attached to bridge device 2:00h.00h
> With INT_PIN swizzled to PIN A
> Attached to bridge device 0:03h.00h
> INT_PIN : 1 (PIN A)
> Swizzled to : 1 (PIN A)
> PIRQ : E
> INT_LINE : 0xE (IRQ 14)
> PCI IRQ: Found device 3:05.00 using PIN A
> With INT_PIN swizzled to PIN B
> Attached to bridge device 2:00h.00h
> With INT_PIN swizzled to PIN B
> Attached to bridge device 0:03h.00h
> INT_PIN : 1 (PIN A)
> Swizzled to : 2 (PIN B)
> PIRQ : F
> INT_LINE : 0xF (IRQ 15)
> PCI IRQ: Found device 3:08.00 using PIN A
> With INT_PIN swizzled to PIN A
> Attached to bridge device 2:00h.00h
> With INT_PIN swizzled to PIN A
> Attached to bridge device 0:03h.00h
> INT_PIN : 1 (PIN A)
> Swizzled to : 1 (PIN A)
> PIRQ : E
> INT_LINE : 0xE (IRQ 14)
> PCI IRQ: Found device 3:09.00 using PIN A
> With INT_PIN swizzled to PIN B
> Attached to bridge device 2:00h.00h
> With INT_PIN swizzled to PIN B
> Attached to bridge device 0:03h.00h
> INT_PIN : 1 (PIN A)
> Swizzled to : 2 (PIN B)
> PIRQ : F
> INT_LINE : 0xF (IRQ 15)
> PCI IRQ: Found device 5:00.00 using PIN A
> With INT_PIN swizzled to PIN A
> Attached to bridge device 3:05h.00h
> With INT_PIN swizzled to PIN B
> Attached to bridge device 2:00h.00h
> With INT_PIN swizzled to PIN B
> Attached to bridge device 0:03h.00h
> INT_PIN : 1 (PIN A)
> Swizzled to : 2 (PIN B)
> PIRQ : F
> INT_LINE : 0xF (IRQ 15)
> PCI IRQ: Found device 5:00.01 using PIN B
> With INT_PIN swizzled to PIN B
> Attached to bridge device 3:05h.00h
> With INT_PIN swizzled to PIN C
> Attached to bridge device 2:00h.00h
> With INT_PIN swizzled to PIN C
> Attached to bridge device 0:03h.00h
> INT_PIN : 2 (PIN B)
> Swizzled to : 3 (PIN C)
> PIRQ : G
> INT_LINE : 0xE (IRQ 14)
> PCI_CFG IRQ: Finished writing PCI config space IRQ assignments
> NMI sources disabled.
> Enabling BIOS updates outside of SMM... PCI: 00:1f.0 init 213502 usecs
> POST: 0x75
> POST: 0x75
> PCI: 01:00.0 init
> PCI: 01:00.0 init 923 usecs
> POST: 0x75
> PCI: 01:00.1 init
> PCI: 01:00.1 init 924 usecs
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> POST: 0x75
> PCI: 05:00.0 init
> PCI: 05:00.0 init 923 usecs
> POST: 0x75
> PCI: 05:00.1 init
> PCI: 05:00.1 init 924 usecs
> Devices initialized
> Show all devs...After init.
> Root Device: enabled 1
> CPU_CLUSTER: 0: enabled 1
> APIC: 00: enabled 1
> APIC: acac: enabled 0
> DOMAIN: 0000: enabled 1
> PCI: 00:00.0: enabled 1
> PCI: 00:01.0: enabled 1
> PCI: 00:02.0: enabled 0
> PCI: 00:03.0: enabled 1
> PCI: 00:04.0: enabled 0
> PCI: 00:0b.0: enabled 1
> PCI: 00:0e.0: enabled 1
> PCI: 00:13.0: enabled 1
> PCI: 00:14.0: enabled 0
> PCI: 00:14.1: enabled 0
> PCI: 00:14.2: enabled 0
> PCI: 00:14.3: enabled 0
> PCI: 00:16.0: enabled 1
> PCI: 00:17.0: enabled 1
> PCI: 00:18.0: enabled 1
> PCI: 00:1f.0: enabled 1
> PCI: 00:1f.3: enabled 1
> PCI: 00:0f.0: enabled 1
> PCI: 01:00.0: enabled 1
> PCI: 01:00.1: enabled 1
> PCI: 02:00.0: enabled 1
> PCI: 03:04.0: enabled 1
> PCI: 03:05.0: enabled 1
> PCI: 03:08.0: enabled 1
> PCI: 03:09.0: enabled 1
> PCI: 05:00.0: enabled 1
> PCI: 05:00.1: enabled 1
> APIC: 02: enabled 1
> APIC: 04: enabled 1
> APIC: 06: enabled 1
> APIC: 08: enabled 1
> APIC: 0a: enabled 1
> APIC: 0c: enabled 1
> APIC: 0e: enabled 1
> BS: BS_DEV_INIT times (us): entry 0 run 639905 exit 0
> POST: 0x76
> Finalize devices...
> DOMAIN: 0000 final
> FspNotify(EnumInitPhaseAfterPciEnumeration)
> Returned from FspNotify(EnumInitPhaseAfterPciEnumeration)
> Devices finalized
> BS: BS_POST_DEVICE times (us): entry 0 run 8736 exit 0
> POST: 0x77
> BS: BS_OS_RESUME_CHECK times (us): entry 0 run 586 exit 0
>
> === FSP HOB Data Structure ===
> FSP Hoblistptr: 0x220000
> HOB 0x220000 is an EFI_HOB_TYPE_HANDOFF (type 0x1)
> HOB 0x220038 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
> HOB 0x220100 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
> HOB 0x220418 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
> HOB 0x2204c0 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x2204d8 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x220528 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x220540 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x2206b8 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x2206d0 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x220718 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x220728 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x220738 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x220750 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x220760 is an EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (type 0x3)
> Resource EFI_RESOURCE_SYSTEM_MEMORY (0x0) has attributes 0x3c07
> at location 0x0 with length 0xa0000
> HOB 0x220790 is an EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (type 0x3)
> Resource EFI_RESOURCE_MEMORY_RESERVED (0x5) has attributes 0x3c07
> at location 0xa0000 with length 0x60000
> HOB 0x2207c0 is an EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (type 0x3)
> Resource EFI_RESOURCE_SYSTEM_MEMORY (0x0) has attributes 0x3c07
> at location 0x100000 with length 0x7ff00000
> HOB 0x2207f0 is an EFI_HOB_TYPE_RESOURCE_DESCRIPTOR (type 0x3)
> Resource EFI_RESOURCE_SYSTEM_MEMORY (0x0) has attributes 0x3c03
> at location 0x0 with length 0x80000000
> HOB 0x220820 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
> HOB 0x2211d0 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
> HOB 0x223450 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x200000 with length 0x20000
> HOB 0x223480 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffff000 with length 0x1000
> HOB 0x2234b0 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7fff7000 with length 0x8000
> HOB 0x2234e0 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
> HOB 0x2274f8 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
> HOB 0x229790 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7fff3000 with length 0x4000
> HOB 0x2297c0 is an EFI_HOB_TYPE_GUID_EXTENSION (type 0x4)
> HOB 0x229970 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffef000 with length 0x4000
> HOB 0x2299a0 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffeb000 with length 0x4000
> HOB 0x2299d0 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffe8000 with length 0x3000
> HOB 0x229a00 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x229a18 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffe4000 with length 0x4000
> HOB 0x229a48 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffe1000 with length 0x3000
> HOB 0x229a78 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffdf000 with length 0x2000
> HOB 0x229aa8 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffdb000 with length 0x4000
> HOB 0x229ad8 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffd5000 with length 0x6000
> HOB 0x229b08 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffd0000 with length 0x5000
> HOB 0x229b38 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x229b48 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffcc000 with length 0x4000
> HOB 0x229b78 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffc8000 with length 0x4000
> HOB 0x229ba8 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffc5000 with length 0x3000
> HOB 0x229bd8 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x229fe0 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffb5000 with length 0x10000
> HOB 0x22a010 is an EFI_HOB_TYPE_MEMORY_POOL (type 0x7)
> HOB 0x22a120 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffb1000 with length 0x4000
> HOB 0x22a150 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffae000 with length 0x3000
> HOB 0x22a180 is an EFI_HOB_TYPE_MEMORY_ALLOCATION (type 0x2)
> Memory type EfiBootServicesData (0x4)
> at location 0x7ffac000 with length 0x2000
> HOB 0x22a1b0 is an EFI_HOB_TYPE_END_OF_HOB_LIST (type 0xffff)
> === End of FSP HOB Data Structure ===
>
> Memory Configure Data Hob at 00227510 (size = 0x2298).
> Copy FSP MRC DATA to HOB (source addr 00227510, dest addr
> 7fdf9000, 8864 bytes)
> Fast boot data (includes align and checksum):
> <...>
>
> --
> coreboot mailing list: coreboot(a)coreboot.org
> <mailto:coreboot@coreboot.org>
> http://www.coreboot.org/mailman/listinfo/coreboot
>
>
3
3
The last time that I synched my coreboot source was about 2 weeks ago. I just tried the latest FSP and I still have the same problem. When I load Linux, I do see video output.
Here's my serial output:
coreboot-4.0-7555-g8916d0d-dirty Wed Jan 7 09:52:17 EST 2015 starting...
POST: 0x44
POST: 0x47
POST: 0x48
prev_sleep_state = S5
POST: 0x4a
Baytrail Chip Variant: Bay Trail-I (ISG/embedded)
MRC v0.100
1 channels of DDR3 @ 1333MHz
POST: 0x4b
POST: 0x4c
POST: 0x4d
POST: 0x4e
POST: 0x4f
CBFS: loading stage fallback/ramstage @ 0x100000 (287632 bytes), entry @ 0x100000
POST: 0x80
POST: 0x39
coreboot-4.0-7555-g8916d0d-dirty Wed Jan 7 09:52:17 EST 2015 booting...
POST: 0x40
clocks_per_usec: 1916
POST: 0x70
POST: 0x71
POST: 0x72
Enumerating buses...
POST: 0x24
FSP Header Version: 1
FSP Revision: 3.3
POST: 0x25
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x24
POST: 0x25
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x24
POST: 0x25
POST: 0x55
POST: 0x55
POST: 0x55
POST: 0x55
done
POST: 0x73
Allocating resources...
Reading resources...
APIC: 00 missing read_resources
Available memory below 4GB: 0x7ae00000 (1966M)
Available memory above 4GB: 0M
Done reading resources.
Setting resources...
PCI: 00:00.0 missing set_resources
Done setting resources.
Done allocating resources.
POST: 0x74
Enabling resources...
done.
POST: 0x75
Initializing devices...
POST: 0x75
POST: 0x93
Setting up local apic...done.
POST: 0x9b
CPU: Intel(R) Atom(TM) CPU E3845 @ 1.91GHz.
AP: slot 1 apic_id 2.
AP: slot 3 apic_id 6.
AP: slot 2 apic_id 4.
Initializing CPU #0
CPU #0 initialized
Initializing CPU #1
Initializing CPU #3
Turbo is unavailable
CPU #3 initialized
CPU #1 initialized
Initializing CPU #2
CPU #2 initialized
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
Unsupported software interrupt #0x15 eax 0x3005f35
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
Warning: PCI Device 2 does not have an IRQ entry, skipping it
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
POST: 0x75
Devices initialized
POST: 0x76
Finalize devices...
Devices finalized
POST: 0x77
POST: 0x79
POST: 0x9c
ACPI: Writing ACPI tables at 7add6000.
ACPI: done.
Root Device (Intel Bayley Bay CRB (FSP))
CPU_CLUSTER: 0 (Intel BayTrail SoC)
APIC: 00 (Intel BayTrail SoC)
DOMAIN: 0000 (Intel BayTrail SoC)
PCI: 00:00.0 (Intel BayTrail SoC)
PCI: 00:02.0 (Intel BayTrail SoC)
PCI: 00:03.0 (Intel BayTrail SoC)
PCI: 00:10.0 (Intel BayTrail SoC)
PCI: 00:11.0 (Intel BayTrail SoC)
PCI: 00:12.0 (Intel BayTrail SoC)
PCI: 00:13.0 (Intel BayTrail SoC)
PCI: 00:14.0 (Intel BayTrail SoC)
PCI: 00:15.0 (Intel BayTrail SoC)
PCI: 00:16.0 (Intel BayTrail SoC)
PCI: 00:17.0 (Intel BayTrail SoC)
PCI: 00:18.0 (Intel BayTrail SoC)
PCI: 00:18.1 (Intel BayTrail SoC)
PCI: 00:18.2 (Intel BayTrail SoC)
PCI: 00:18.3 (Intel BayTrail SoC)
PCI: 00:18.4 (Intel BayTrail SoC)
PCI: 00:18.5 (Intel BayTrail SoC)
PCI: 00:18.6 (Intel BayTrail SoC)
PCI: 00:18.7 (Intel BayTrail SoC)
PCI: 00:1a.0 (Intel BayTrail SoC)
PCI: 00:1b.0 (Intel BayTrail SoC)
PCI: 00:1c.0 (Intel BayTrail SoC)
PCI: 00:1c.1 (Intel BayTrail SoC)
PCI: 00:1c.2 (Intel BayTrail SoC)
PCI: 00:1c.3 (Intel BayTrail SoC)
PCI: 00:1d.0 (Intel BayTrail SoC)
PCI: 00:1e.0 (Intel BayTrail SoC)
PCI: 00:1e.1 (Intel BayTrail SoC)
PCI: 00:1e.2 (Intel BayTrail SoC)
PCI: 00:1e.3 (Intel BayTrail SoC)
PCI: 00:1e.4 (Intel BayTrail SoC)
PCI: 00:1e.5 (Intel BayTrail SoC)
PCI: 00:1f.0 (Intel BayTrail SoC)
PCI: 00:1f.3 (Intel BayTrail SoC)
PCI: 02:00.0 (unknown)
PCI: 03:00.0 (unknown)
PCI: 04:00.0 (unknown)
PCI: 05:01.0 (unknown)
PCI: 05:02.0 (unknown)
PCI: 05:03.0 (unknown)
PCI: 07:00.0 (unknown)
APIC: 02 (unknown)
APIC: 04 (unknown)
APIC: 06 (unknown)
POST: 0x9e
POST: 0x9d
POST: 0x7a
selfload
POST: 0x7b
POST: 0xf8
From: Yang, York [mailto:york.yang@intel.com]
Sent: January-05-15 5:46 PM
To: Fred Young; coreboot(a)coreboot.org
Subject: Re: No video output with Bay Trail
Did you use the latest code and Baytrail Gold3 FSP? I can see VGA output on Intel Bayley Bay board just selecting platform right and enable "configure defaults for Intel FSP" and gives all binary (FSP, VBIOS, microcode) correct path. Do you have serial debug message dump? It can help to identify some error.
From: coreboot [mailto:coreboot-bounces@coreboot.org] On Behalf Of Fred Young
Sent: Monday, January 05, 2015 2:31 PM
To: coreboot(a)coreboot.org<mailto:coreboot@coreboot.org>
Subject: [coreboot] No video output with Bay Trail
I have an Aaeon EMB-BT1 with an Intel Atom E3845 CPU. I've successfully built coreboot specifying "Bayley Bay CRB (FSP)" as the "Mainboard model".
When I boot the machine after programming the flash with coreboot, I see lots of output on the serial line including output indicating that SeaBIOS has started.
However, I don't see any output on the video display on either HDMI or VGA. Here are my .config settings relating to video/VGA:
CONFIG_VGA_BIOS_ID="8086,0f31"
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
CONFIG_VGA_BIOS=y
CONFIG_VGA_BIOS_FILE="../intel/cpu/baytrail/vbios/Vga.dat"
CONFIG_VIDEO_MB=0
CONFIG_VGA_ROM_RUN=y
What do I need to do to get video output?
1
0
Intel: After suspend/resume `cbmem -l` fails with `Program cbmem tried to access /dev/mem between f0000->1f0000.`
by Paul Menzel 07 Jan '15
by Paul Menzel 07 Jan '15
07 Jan '15
Dear coreboot folks,
first of all I wish everyone a happy new year!
On the i945 based Lenovo X60, running `cbmem -l` (or any other option)
works fine. Suspending and resuming the system, running any `cbmem`
commands does *not* work anymore.
$ sudo pm-suspend
$ sudo cbmem -l
Failed to mmap /dev/mem: Operation not permitted
$ dmesg | tail -1
[ 2834.560179] Program cbmem tried to access /dev/mem between f0000->1f0000.
I think in Prague, it could also be reproduced on Vladimir’s Lenovo
X230(?).
Do you have any idea, why this happens? Is that a Linux error?
It’d be great if you Intel device owners, could try to reproduce it.
Thanks,
Paul
$ sudo cbmem -l
CBMEM table of contents:
ID START LENGTH
0. CBMEM ROOT 7f7ff000 00001000
1. CAR GLOBALS 7f7fe000 00001000
2. CONSOLE 7f7de000 00020000
3. TIME STAMP 7f7dd000 00001000
4. ROMSTAGE 7f7dc000 00001000
5. GDT 7f7db000 00001000
6. IRQ TABLE 7f7da000 00001000
7. SMP TABLE 7f7d9000 00001000
8. ACPI 7f7cd000 0000c000
9. SMBIOS 7f7cc000 00001000
10. ACPI RESUME 7f6cc000 00100000
11. COREBOOT 7f6c4000 00008000
$ more /proc/iomem
00000000-00000fff : reserved
00001000-0009fbff : System RAM
0009fc00-0009ffff : reserved
000a0000-000bffff : PCI Bus 0000:00
000a0000-000bffff : Video RAM area
000c0000-000c7fff : Video ROM
000c0000-000c3fff : PCI Bus 0000:00
000c4000-000c7fff : PCI Bus 0000:00
000c8000-000cbfff : PCI Bus 0000:00
000cc000-000cffff : PCI Bus 0000:00
000d0000-000d3fff : PCI Bus 0000:00
000d4000-000d7fff : PCI Bus 0000:00
000d8000-000dbfff : PCI Bus 0000:00
000dc000-000dffff : PCI Bus 0000:00
000e0000-000e3fff : PCI Bus 0000:00
000e4000-000e7fff : PCI Bus 0000:00
000e8000-000ebfff : PCI Bus 0000:00
000ec000-000effff : PCI Bus 0000:00
000f0000-000fffff : PCI Bus 0000:00
000f0000-000fffff : reserved
000f0000-000fffff : System ROM
00100000-7f6c2fff : System RAM
01000000-01490f89 : Kernel code
01490f8a-0167c73f : Kernel data
0172d000-017a1fff : Kernel bss
7f6c3000-7fffffff : reserved
7f800000-7ffbffff : Graphics Stolen Memory
80000000-febfffff : PCI Bus 0000:00
80000000-801fffff : PCI Bus 0000:01
84000000-87ffffff : PCI CardBus 0000:06
88000000-8bffffff : PCI CardBus 0000:06
d0000000-dfffffff : 0000:00:02.0
e0000000-e20fffff : PCI Bus 0000:05
e2000000-e2000fff : 0000:05:00.0
e2000000-e2000fff : yenta_socket
e2001000-e20017ff : 0000:05:00.1
e2001000-e20017ff : firewire_ohci
e2001800-e20018ff : 0000:05:00.2
e2001800-e20018ff : mmc0
e2100000-e40fffff : PCI Bus 0000:05
e4100000-e41fffff : PCI Bus 0000:01
e4100000-e411ffff : 0000:01:00.0
e4100000-e411ffff : e1000e
e4200000-e42fffff : PCI Bus 0000:02
e4200000-e4200fff : 0000:02:00.0
e4200000-e4200fff : iwl3945
e4300000-e437ffff : 0000:00:02.0
e4380000-e43fffff : 0000:00:02.1
e4400000-e443ffff : 0000:00:02.0
e4440000-e4443fff : 0000:00:1b.0
e4440000-e4443fff : ICH HD audio
e4444000-e44443ff : 0000:00:1d.7
e4444000-e44443ff : ehci_hcd
e4444400-e44447ff : 0000:00:1f.2
e4444400-e44447ff : ahci
f0000000-f3ffffff : PCI MMCONFIG 0000 [bus 00-3f]
f0000000-f3ffffff : reserved
f0000000-f3ffffff : pnp 00:00
fec00000-fec003ff : IOAPIC 0
fed00000-fed003ff : HPET 0
fed00000-fed003ff : pnp 00:01
fed14000-fed17fff : pnp 00:00
fed18000-fed18fff : pnp 00:00
fed19000-fed19fff : pnp 00:00
fed1c000-fed1ffff : pnp 00:00
fed1f410-fed1f414 : iTCO_wdt
fed1f410-fed1f414 : iTCO_wdt
fed20000-fed3ffff : pnp 00:00
fed40000-fed44fff : PCI Bus 0000:00
fed40000-fed44fff : pnp 00:00
fed45000-fed8ffff : pnp 00:00
fee00000-fee00fff : Local APIC
ff000000-ffffffff : INT0800:00
$ sudo pm-suspend
$ sudo cbmem -l
Failed to mmap /dev/mem: Operation not permitted
$ dmesg | tail -1
[ 2834.560179] Program cbmem tried to access /dev/mem between f0000->1f0000.
$ sudo strace cbmem -l
[…]
open("/lib/i386-linux-gnu/i686/cmov/libc.so.6", O_RDONLY|O_CLOEXEC) = 3
read(3, "\177ELF\1\1\1\3\0\0\0\0\0\0\0\0\3\0\3\0\1\0\0\0\300\233\1\0004\0\0\0"..., 512) = 512
fstat64(3, {st_mode=S_IFREG|0755, st_size=1742588, ...}) = 0
mmap2(NULL, 1747580, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0xb756e000
mmap2(0xb7713000, 12288, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x1a5000) = 0xb7713000
mmap2(0xb7716000, 10876, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_ANONYMOUS, -1, 0) = 0xb7716000
close(3) = 0
mmap2(NULL, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0xb756d000
set_thread_area({entry_number:-1, base_addr:0xb756d940, limit:1048575, seg_32bit:1, contents:0, read_exec_only:0, limit_in_pages:1, seg_not_present:0, useable:1}) = 0 (entry_number:6)
mprotect(0xb7713000, 8192, PROT_READ) = 0
mprotect(0xb775e000, 4096, PROT_READ) = 0
munmap(0xb7719000, 130429) = 0
open("/dev/mem", O_RDONLY) = 3
mmap2(NULL, 1048576, PROT_READ, MAP_SHARED, 3, 0) = 0xb746d000
munmap(0xb746d000, 1048576) = 0
mmap2(NULL, 1048576, PROT_READ, MAP_SHARED, 3, 0xf0000) = -1 EPERM (Operation not permitted)
write(2, "Failed to mmap /dev/mem: Operati"..., 49Failed to mmap /dev/mem: Operation not permitted
) = 49
exit_group(1) = ?
+++ exited with 1 +++
2
4
Did you use the latest code and Baytrail Gold3 FSP? I can see VGA output on Intel Bayley Bay board just selecting platform right and enable "configure defaults for Intel FSP" and gives all binary (FSP, VBIOS, microcode) correct path. Do you have serial debug message dump? It can help to identify some error.
From: coreboot [mailto:coreboot-bounces@coreboot.org] On Behalf Of Fred Young
Sent: Monday, January 05, 2015 2:31 PM
To: coreboot(a)coreboot.org
Subject: [coreboot] No video output with Bay Trail
I have an Aaeon EMB-BT1 with an Intel Atom E3845 CPU. I've successfully built coreboot specifying "Bayley Bay CRB (FSP)" as the "Mainboard model".
When I boot the machine after programming the flash with coreboot, I see lots of output on the serial line including output indicating that SeaBIOS has started.
However, I don't see any output on the video display on either HDMI or VGA. Here are my .config settings relating to video/VGA:
CONFIG_VGA_BIOS_ID="8086,0f31"
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
CONFIG_VGA_BIOS=y
CONFIG_VGA_BIOS_FILE="../intel/cpu/baytrail/vbios/Vga.dat"
CONFIG_VIDEO_MB=0
CONFIG_VGA_ROM_RUN=y
What do I need to do to get video output?
1
0