coreboot January 2013

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Patch set updated for coreboot: de9b5f6 armv7: Add SPI driver for Exynos.
by Hung-Te Lin 30 Jan '13

30 Jan '13

Hung-Te Lin (hungte(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2229 -gerrit commit de9b5f6d24af2fef352dcff56812a771a5ac04c7 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Wed Jan 30 20:02:02 2013 +0800 armv7: Add SPI driver for Exynos. The SPI flash driver for Exynos chipset. Verified to boot on snow/armv7. Change-Id: I7eef67a9c57f825d09f13ea44c2b59b54345fa7b Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- src/cpu/samsung/exynos5-common/spi.c | 253 +++++++++++++++++++++++++++++++++- src/cpu/samsung/exynos5-common/spi.h | 13 ++ src/mainboard/google/snow/bootblock.c | 251 +-------------------------------- 3 files changed, 268 insertions(+), 249 deletions(-) diff --git a/src/cpu/samsung/exynos5-common/spi.c b/src/cpu/samsung/exynos5-common/spi.c index e13eadf..d5d0d58 100644 --- a/src/cpu/samsung/exynos5-common/spi.c +++ b/src/cpu/samsung/exynos5-common/spi.c @@ -1,7 +1,254 @@ -#include <cbfs.h> +/* + * Copyright (C) 2011 Samsung Electronics + * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ -/* TODO provide a real SPI driver here for firmware media. */ +/* FIXME(dhendrix): pulled in a lot of extra crap such as partition and string + libs*/ +#include <assert.h> +#include <common.h> +#include <stdlib.h> +#include <string.h> + +#include <console/console.h> +#include <console/loglevel.h> + +#include <config.h> +#include <spi.h> + +#include <cpu/samsung/exynos5250/gpio.h> +#include <cpu/samsung/exynos5250/clk.h> +#include <cpu/samsung/exynos5250/cpu.h> +#include <cpu/samsung/exynos5250/periph.h> +#include <cpu/samsung/exynos5250/pinmux.h> + +#include <cpu/samsung/exynos5-common/cpu.h> +#include <cpu/samsung/exynos5-common/exynos5-common.h> +#include <cpu/samsung/exynos5-common/spi.h> + +#include <system.h> +#include <arch/io.h> +#include <lib.h> + +#define OM_STAT (0x1f << 1) +#define EXYNOS_BASE_SPI1 ((void *)0x12d30000) + +#if defined(CONFIG_DEBUG_SPI) && CONFIG_DEBUG_SPI +# define DEBUG_SPI(x,...) printk(BIOS_DEBUG, "EXYNOS_SPI: " x) +#else +# define DEBUG_SPI(x,...) +#endif + +static void exynos_spi_rx_tx(struct exynos_spi *regs, int todo, + void *dinp, void const *doutp, int i) +{ + int rx_lvl, tx_lvl; + uint *rxp = (uint *)(dinp + (i * (32 * 1024))); + uint out_bytes, in_bytes; + + // TODO In currrent implementation, every read/write must be aligned to + // 4 bytes, otherwise you may get timeout or other unexpected results. + assert(todo % 4 == 0); + + out_bytes = in_bytes = todo; + setbits_le32(&regs->ch_cfg, SPI_CH_RST); + clrbits_le32(&regs->ch_cfg, SPI_CH_RST); + writel(((todo * 8) / 32) | SPI_PACKET_CNT_EN, &regs->pkt_cnt); + + while (in_bytes) { + uint32_t spi_sts; + int temp; + + spi_sts = readl(&regs->spi_sts); + rx_lvl = ((spi_sts >> 15) & 0x7f); + tx_lvl = ((spi_sts >> 6) & 0x7f); + while (tx_lvl < 32 && out_bytes) { + // TODO The "writing" (tx) is not supported now; that's + // why we write garbage to keep driving FIFO clock. + temp = 0xffffffff; + writel(temp, &regs->tx_data); + out_bytes -= 4; + tx_lvl += 4; + } + while (rx_lvl >= 4 && in_bytes) { + temp = readl(&regs->rx_data); + if (rxp) + *rxp++ = temp; + in_bytes -= 4; + rx_lvl -= 4; + } + } +} + +int exynos_spi_open(struct exynos_spi *regs) +{ + clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ + /* set the spi1 GPIO */ + + // TODO Some of these should be done in board's bootblock file. + // We should fix-up the mainboard-specific vs. exynos-specific parts in a + // follow-up CL. + +// exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE); + gpio_cfg_pin(GPIO_A24, 0x2); + gpio_cfg_pin(GPIO_A25, 0x2); + gpio_cfg_pin(GPIO_A26, 0x2); + gpio_cfg_pin(GPIO_A27, 0x2); + + /* set pktcnt and enable it */ + writel(4 | SPI_PACKET_CNT_EN, &regs->pkt_cnt); + /* set FB_CLK_SEL */ + writel(SPI_FB_DELAY_180, &regs->fb_clk); + /* set CH_WIDTH and BUS_WIDTH as word */ + setbits_le32(&regs->mode_cfg, + SPI_MODE_CH_WIDTH_WORD | SPI_MODE_BUS_WIDTH_WORD); + clrbits_le32(&regs->ch_cfg, SPI_CH_CPOL_L); /* CPOL: active high */ + + /* clear rx and tx channel if set priveously */ + clrbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON); + + setbits_le32(&regs->swap_cfg, + SPI_RX_SWAP_EN | SPI_RX_BYTE_SWAP | SPI_RX_HWORD_SWAP); + + /* do a soft reset */ + setbits_le32(&regs->ch_cfg, SPI_CH_RST); + clrbits_le32(&regs->ch_cfg, SPI_CH_RST); + + /* now set rx and tx channel ON */ + setbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON | SPI_CH_HS_EN); + clrbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT); /* CS low */ + return 0; +} + +int exynos_spi_read(struct exynos_spi *regs, void *dest, u32 len, u32 off) +{ + int upto, todo; + int i; + /* Send read instruction (0x3h) followed by a 24 bit addr */ + writel((SF_READ_DATA_CMD << 24) | off, &regs->tx_data); + + /* waiting for TX done */ + while (!(readl(&regs->spi_sts) & SPI_ST_TX_DONE)); + + for (upto = 0, i = 0; upto < len; upto += todo, i++) { + todo = MIN(len - upto, (1 << 15)); + exynos_spi_rx_tx(regs, todo, dest, (void *)(off), i); + } + + setbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT);/* make the CS high */ + + /* + * Let put controller mode to BYTE as + * SPI driver does not support WORD mode yet + */ + clrbits_le32(&regs->mode_cfg, + SPI_MODE_CH_WIDTH_WORD | SPI_MODE_BUS_WIDTH_WORD); + writel(0, &regs->swap_cfg); + + return len; +} + +int exynos_spi_close(struct exynos_spi *regs) +{ + /* + * Flush spi tx, rx fifos and reset the SPI controller + * and clear rx/tx channel + */ + clrsetbits_le32(&regs->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST); + clrbits_le32(&regs->ch_cfg, SPI_CH_RST); + clrbits_le32(&regs->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON); + return 0; +} + +// SPI as CBFS media. +struct exynos_spi_media { + struct exynos_spi *regs; + struct cbfs_simple_buffer buffer; +}; + +static int exynos_spi_cbfs_open(struct cbfs_media *media) { + struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; + DEBUG_SPI("exynos_spi_cbfs_open\n"); + return exynos_spi_open(spi->regs); +} + +static int exynos_spi_cbfs_close(struct cbfs_media *media) { + struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; + DEBUG_SPI("exynos_spi_cbfs_close\n"); + return exynos_spi_close(spi->regs); +} + +static size_t exynos_spi_cbfs_read(struct cbfs_media *media, void *dest, + size_t offset, size_t count) { + struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; + int bytes; + DEBUG_SPI("exynos_spi_cbfs_read(%u)\n", count); + bytes = exynos_spi_read(spi->regs, dest, count, offset); + // Flush and re-open the device. + exynos_spi_close(spi->regs); + exynos_spi_open(spi->regs); + return bytes; +} + +static void *exynos_spi_cbfs_map(struct cbfs_media *media, size_t offset, + size_t count) { + struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; + DEBUG_SPI("exynos_spi_cbfs_map\n"); + // See exynos_spi_rx_tx for I/O alignment limitation. + if (count % 4) + count += 4 - (count % 4); + return cbfs_simple_buffer_map(&spi->buffer, media, offset, count); +} + +static void *exynos_spi_cbfs_unmap(struct cbfs_media *media, + const void *address) { + struct exynos_spi_media *spi = (struct exynos_spi_media*)media->context; + DEBUG_SPI("exynos_spi_cbfs_unmap\n"); + return cbfs_simple_buffer_unmap(&spi->buffer, address); +} + +int initialize_exynos_spi_cbfs_media(struct cbfs_media *media, + void *buffer_address, + size_t buffer_size) { + // TODO Replace static variable to support multiple streams. + static struct exynos_spi_media context; + DEBUG_SPI("initialize_exynos_spi_cbfs_media\n"); + + context.regs = EXYNOS_BASE_SPI1; + context.buffer.allocated = context.buffer.last_allocate = 0; + context.buffer.buffer = buffer_address; + context.buffer.size = buffer_size; + media->context = (void*)&context; + media->open = exynos_spi_cbfs_open; + media->close = exynos_spi_cbfs_close; + media->read = exynos_spi_cbfs_read; + media->map = exynos_spi_cbfs_map; + media->unmap = exynos_spi_cbfs_unmap; + + return 0; +} int init_default_cbfs_media(struct cbfs_media *media) { - return -1; + return initialize_exynos_spi_cbfs_media( + media, + (void*)CONFIG_CBFS_CACHE_ADDRESS, + CONFIG_CBFS_CACHE_SIZE); } diff --git a/src/cpu/samsung/exynos5-common/spi.h b/src/cpu/samsung/exynos5-common/spi.h index 3f36759..e021888 100644 --- a/src/cpu/samsung/exynos5-common/spi.h +++ b/src/cpu/samsung/exynos5-common/spi.h @@ -22,6 +22,9 @@ #ifndef __ASSEMBLER__ +// This driver serves as a CBFS media source. +#include <cbfs.h> + /* SPI peripheral register map; padded to 64KB */ struct exynos_spi { unsigned int ch_cfg; /* 0x00 */ @@ -85,5 +88,15 @@ struct exynos_spi { #define SPI_RX_BYTE_SWAP (1 << 6) #define SPI_RX_HWORD_SWAP (1 << 7) +/* API */ +int exynos_spi_open(struct exynos_spi *regs); +int exynos_spi_read(struct exynos_spi *regs, void *dest, u32 len, u32 off); +int exynos_spi_close(struct exynos_spi *regs); + +/* Serve as CBFS Media */ +int initialize_exynos_spi_cbfs_media(struct cbfs_media *media, + void *buffer_address, + size_t buffer_size); + #endif /* __ASSEMBLER__ */ #endif diff --git a/src/mainboard/google/snow/bootblock.c b/src/mainboard/google/snow/bootblock.c index 5b3efa0..3887e7e 100644 --- a/src/mainboard/google/snow/bootblock.c +++ b/src/mainboard/google/snow/bootblock.c @@ -17,11 +17,10 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define uchar unsigned char -#define uint unsigned int - #include <stdlib.h> #include <types.h> +#include <assert.h> +#include <arch/armv7/include/common.h> #include <arch/io.h> #include "cpu/samsung/exynos5250/clk.h" #include "cpu/samsung/exynos5250/cpu.h" @@ -46,87 +45,6 @@ /* TODO Move to Makefile.inc once we support adding bootblock stage files. */ #include "cpu/samsung/exynos5-common/spi.c" -/* FIXME(dhendrix): Can we move this SPI stuff elsewhere? */ -static void spi_rx_tx(struct exynos_spi *regs, int todo, - void *dinp, void const *doutp, int i) -{ - unsigned int *rxp = (unsigned int *)(dinp + (i * (32 * 1024))); - int rx_lvl, tx_lvl; - unsigned int out_bytes, in_bytes; - - out_bytes = in_bytes = todo; - setbits_le32(&regs->ch_cfg, SPI_CH_RST); - clrbits_le32(&regs->ch_cfg, SPI_CH_RST); - writel(((todo * 8) / 32) | SPI_PACKET_CNT_EN, &regs->pkt_cnt); - - while (in_bytes) { - uint32_t spi_sts; - int temp; - - spi_sts = readl(&regs->spi_sts); - rx_lvl = ((spi_sts >> 15) & 0x7f); - tx_lvl = ((spi_sts >> 6) & 0x7f); - while (tx_lvl < 32 && out_bytes) { - temp = 0xffffffff; - writel(temp, &regs->tx_data); - out_bytes -= 4; - tx_lvl += 4; - } - while (rx_lvl >= 4 && in_bytes) { - temp = readl(&regs->rx_data); - if (rxp) - *rxp++ = temp; - in_bytes -= 4; - rx_lvl -= 4; - } - } -} - -#if 0 -void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned divisor) -{ - struct exynos5_clock *clk = - (struct exynos5_clock *)samsung_get_base_clock(); - unsigned shift; - unsigned mask = 0xff; - u32 *reg; - - /* - * For now we only handle a very small subset of peipherals here. - * Others will need to (and do) mangle the clock registers - * themselves, At some point it is hoped that this function can work - * from a table or calculated register offset / mask. For now this - * is at least better than spreading clock control code around - * U-Boot. - */ - switch (periph_id) { - case PERIPH_ID_SPI0: - reg = &clk->div_peric1; - shift = 8; - break; - case PERIPH_ID_SPI1: - reg = &clk->div_peric1; - shift = 24; - break; - case PERIPH_ID_SPI2: - reg = &clk->div_peric2; - shift = 8; - break; - case PERIPH_ID_SPI3: - reg = &clk->sclk_div_isp; - shift = 4; - break; - case PERIPH_ID_SPI4: - reg = &clk->sclk_div_isp; - shift = 16; - break; - default: - debug("%s: Unsupported peripheral ID %d\n", __func__, - periph_id); - return; - } -} -#endif void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned divisor) { struct exynos5_clock *clk = @@ -140,43 +58,6 @@ void clock_ll_set_pre_ratio(enum periph_id periph_id, unsigned divisor) clrsetbits_le32(reg, mask << shift, (divisor & mask) << shift); } -#if 0 -void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor) -{ - struct exynos5_clock *clk = - (struct exynos5_clock *)samsung_get_base_clock(); - unsigned shift; - unsigned mask = 0xff; - u32 *reg; - - switch (periph_id) { - case PERIPH_ID_SPI0: - reg = &clk->div_peric1; - shift = 0; - break; - case PERIPH_ID_SPI1: - reg = &clk->div_peric1; - shift = 16; - break; - case PERIPH_ID_SPI2: - reg = &clk->div_peric2; - shift = 0; - break; - case PERIPH_ID_SPI3: - reg = &clk->sclk_div_isp; - shift = 0; - break; - case PERIPH_ID_SPI4: - reg = &clk->sclk_div_isp; - shift = 12; - break; - default: - debug("%s: Unsupported peripheral ID %d\n", __func__, - periph_id); - return; - } -} -#endif void clock_ll_set_ratio(enum periph_id periph_id, unsigned divisor) { struct exynos5_clock *clk = @@ -253,44 +134,6 @@ static int clock_calc_best_scalar(unsigned int main_scaler_bits, return best_main_scalar; } -#if 0 -int clock_set_rate(enum periph_id periph_id, unsigned int rate) -{ - int main; - unsigned int fine; - - switch (periph_id) { - case PERIPH_ID_SPI0: - case PERIPH_ID_SPI1: - case PERIPH_ID_SPI2: - case PERIPH_ID_SPI3: - case PERIPH_ID_SPI4: - main = clock_calc_best_scalar(4, 8, 400000000, rate, &fine); - if (main < 0) { - debug("%s: Cannot set clock rate for periph %d", - __func__, periph_id); - return -1; - } - clock_ll_set_ratio(periph_id, main - 1); - clock_ll_set_pre_ratio(periph_id, fine - 1); - break; - default: - debug("%s: Unsupported peripheral ID %d\n", __func__, - periph_id); - return -1; - } - main = clock_calc_best_scalar(4, 8, 400000000, rate, &fine); - if (main < 0) { - debug("%s: Cannot set clock rate for periph %d", - __func__, periph_id); - return -1; - } - clock_ll_set_ratio(PERIPH_ID_SPI1, main - 1); - clock_ll_set_pre_ratio(PERIPH_ID_SPI1, fine - 1); - - return 0; -} -#endif int clock_set_rate(enum periph_id periph_id, unsigned int rate) { int main; @@ -362,77 +205,6 @@ void gpio_cfg_pin(int gpio, int cfg) writel(value, &bank->con); } -//static void exynos_spi_copy(unsigned int uboot_size) -static void copy_romstage(uint32_t spi_addr, uint32_t sram_addr, unsigned int len) -{ - int upto, todo; - int i; -// struct exynos_spi *regs = (struct exynos_spi *)samsung_get_base_spi1(); - struct exynos_spi *regs = (struct exynos_spi *)0x12d30000; - - clock_set_rate(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */ - /* set the spi1 GPIO */ -// exynos_pinmux_config(PERIPH_ID_SPI1, PINMUX_FLAG_NONE); - gpio_cfg_pin(GPIO_A24, 0x2); - gpio_cfg_pin(GPIO_A25, 0x2); - gpio_cfg_pin(GPIO_A26, 0x2); - gpio_cfg_pin(GPIO_A27, 0x2); - - /* set pktcnt and enable it */ - writel(4 | SPI_PACKET_CNT_EN, &regs->pkt_cnt); - /* set FB_CLK_SEL */ - writel(SPI_FB_DELAY_180, &regs->fb_clk); - /* set CH_WIDTH and BUS_WIDTH as word */ - setbits_le32(&regs->mode_cfg, SPI_MODE_CH_WIDTH_WORD | - SPI_MODE_BUS_WIDTH_WORD); - clrbits_le32(&regs->ch_cfg, SPI_CH_CPOL_L); /* CPOL: active high */ - - /* clear rx and tx channel if set priveously */ - clrbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON); - - setbits_le32(&regs->swap_cfg, SPI_RX_SWAP_EN | - SPI_RX_BYTE_SWAP | - SPI_RX_HWORD_SWAP); - - /* do a soft reset */ - setbits_le32(&regs->ch_cfg, SPI_CH_RST); - clrbits_le32(&regs->ch_cfg, SPI_CH_RST); - - /* now set rx and tx channel ON */ - setbits_le32(&regs->ch_cfg, SPI_RX_CH_ON | SPI_TX_CH_ON | SPI_CH_HS_EN); - clrbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT); /* CS low */ - - /* Send read instruction (0x3h) followed by a 24 bit addr */ - writel((SF_READ_DATA_CMD << 24) | spi_addr, &regs->tx_data); - - /* waiting for TX done */ - while (!(readl(&regs->spi_sts) & SPI_ST_TX_DONE)); - - for (upto = 0, i = 0; upto < len; upto += todo, i++) { - todo = MIN(len - upto, (1 << 15)); - spi_rx_tx(regs, todo, (void *)(sram_addr), - (void *)(spi_addr), i); - } - - setbits_le32(&regs->cs_reg, SPI_SLAVE_SIG_INACT);/* make the CS high */ - - /* - * Let put controller mode to BYTE as - * SPI driver does not support WORD mode yet - */ - clrbits_le32(&regs->mode_cfg, SPI_MODE_CH_WIDTH_WORD | - SPI_MODE_BUS_WIDTH_WORD); - writel(0, &regs->swap_cfg); - - /* - * Flush spi tx, rx fifos and reset the SPI controller - * and clear rx/tx channel - */ - clrsetbits_le32(&regs->ch_cfg, SPI_CH_HS_EN, SPI_CH_RST); - clrbits_le32(&regs->ch_cfg, SPI_CH_RST); - clrbits_le32(&regs->ch_cfg, SPI_TX_CH_ON | SPI_RX_CH_ON); -} - /* Pull mode */ #define EXYNOS_GPIO_PULL_NONE 0x0 #define EXYNOS_GPIO_PULL_DOWN 0x1 @@ -854,21 +626,15 @@ void do_barriers(void) ); } -void sdelay(unsigned long loops); -void sdelay(unsigned long loops) -{ - __asm__ volatile ("1:\n" "subs %0, %1, #1\n" - "bne 1b":"=r" (loops):"0"(loops)); -} - /* is this right? meh, it seems to work well enough... */ void my_udelay(unsigned int n); void my_udelay(unsigned int n) { - sdelay(n * 1000); + n *= 1000; + __asm__ volatile ("1:\n" "subs %0, %1, #1\n" + "bne 1b":"=r" (n):"0"(n)); } - void i2c_init(int speed, int slaveadd) { struct s3c24x0_i2c_bus *i2c = &i2c0; @@ -2145,13 +1911,6 @@ void bootblock_mainboard_init(void) do_serial(); printk(BIOS_INFO, "%s: UART initialized\n", __func__); - /* Copy romstage data from SPI ROM to SRAM */ - printk(BIOS_INFO, "Copying romstage:\n" - "\tSPI offset: 0x%06x\n" - "\tiRAM offset: 0x%08x\n" - "\tSize: 0x%x\n", - 0, CONFIG_SPI_IMAGE_HACK, CONFIG_ROMSTAGE_SIZE); - copy_romstage(0x0, CONFIG_SPI_IMAGE_HACK, CONFIG_ROMSTAGE_SIZE); #if 0 /* FIXME: dump SRAM content for sanity checking */ uint32_t u;

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Patch set updated for coreboot: 76332a5 libpayload: New CBFS to support multiple firmware media source.
by Hung-Te Lin 30 Jan '13

30 Jan '13

Hung-Te Lin (hungte(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2191 -gerrit commit 76332a5d8f29769ee6d320ab25a580b4bb58deed Author: Hung-Te Lin <hungte(a)chromium.org> Date: Fri Jan 25 12:42:40 2013 +0800 libpayload: New CBFS to support multiple firmware media source. Upgrade CBFS in libpayload to use new media-based implementation from coreboot ( http://review.coreboot.org/#/c/2182/ ). Old CBFS functions (cbfs_find, cbfs_find_file, get_cbfs_header) are still supported, although the recommended way is to use new CBFS API. To migrate your existing x86 payload source: - Change cbfs_find to cbfs_get_file - Change cbfs_find_file to cbfs_get_file_content - Prefix every CBFS call with a CBFS_DEFAULT_MEDIA argument. Ex, char *jpeg_data = cbfs_find_file("splash.jpg", CBFS_TYPE_BOOTSPLASH); => char *jpeg_data = cbfs_get_file_content( CBFS_DEFAULT_MEDIA, "splash.jpg", CBFS_TYPE_BOOTSPLASH); The legacy setup_cbfs_from_{ram,flash} is also supported, although the better equivalent is to make a new media instance: struct cbfs_media ram_media; init_cbfs_ram_media(&ram_media, start, size); char *data = cbfs_get_file_content(&ram_media, "myfile", my_type); Change-Id: If797bc7e3ba975d7e3be905c59424f7a93b8ce11 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> --- payloads/libpayload/arch/x86/Makefile.inc | 2 + payloads/libpayload/arch/x86/rom_media.c | 103 ++++++++++++ payloads/libpayload/include/cbfs.h | 102 ++++++++++-- payloads/libpayload/include/cbfs_core.h | 74 ++++++--- payloads/libpayload/include/stdint.h | 1 + payloads/libpayload/libcbfs/Makefile.inc | 1 + payloads/libpayload/libcbfs/cbfs.c | 266 ++++++++++++++++++++++-------- payloads/libpayload/libcbfs/cbfs_core.c | 198 +++++++++++++--------- payloads/libpayload/libcbfs/ram_media.c | 106 ++++++++++++ 9 files changed, 672 insertions(+), 181 deletions(-) diff --git a/payloads/libpayload/arch/x86/Makefile.inc b/payloads/libpayload/arch/x86/Makefile.inc index 8f68b07..0977eb1 100644 --- a/payloads/libpayload/arch/x86/Makefile.inc +++ b/payloads/libpayload/arch/x86/Makefile.inc @@ -33,5 +33,7 @@ libc-y += timer.c coreboot.c util.S libc-y += exec.S virtual.c libc-y += string.c +libcbfs-$(CONFIG_CBFS) += rom_media.c + # Multiboot support is configurable libc-$(CONFIG_MULTIBOOT) += multiboot.c diff --git a/payloads/libpayload/arch/x86/rom_media.c b/payloads/libpayload/arch/x86/rom_media.c new file mode 100644 index 0000000..7792142 --- /dev/null +++ b/payloads/libpayload/arch/x86/rom_media.c @@ -0,0 +1,103 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ +#define LIBPAYLOAD + +#include <cbfs.h> +#include <string.h> + +#ifdef LIBPAYLOAD +# define printk(x...) +# define init_default_cbfs_media libpayload_init_default_cbfs_media + extern int libpayload_init_default_cbfs_media(struct cbfs_media *media); +#else +# include <console/console.h> +#endif + +// Implementation of memory-mapped ROM media source on X86. + +static int x86_rom_open(struct cbfs_media *media) { + return 0; +} + +static void *x86_rom_map(struct cbfs_media *media, size_t offset, size_t count) { + void *ptr; + // Some address (ex, pointer to master header) may be given in memory + // mapped location. To workaround that, we handle >0xf0000000 as real + // memory pointer. + + if ((uint32_t)offset > (uint32_t)0xf0000000) + ptr = (void*)offset; + else + ptr = (void*)(0 - (uint32_t)media->context + offset); + return ptr; +} + +static void *x86_rom_unmap(struct cbfs_media *media, const void *address) { + return NULL; +} + +static size_t x86_rom_read(struct cbfs_media *media, void *dest, size_t offset, + size_t count) { + void *ptr = x86_rom_map(media, offset, count); + memcpy(dest, ptr, count); + x86_rom_unmap(media, ptr); + return count; +} + +static int x86_rom_close(struct cbfs_media *media) { + return 0; +} + +int init_x86rom_cbfs_media(struct cbfs_media *media); +int init_x86rom_cbfs_media(struct cbfs_media *media) { + // On X86, we always keep a reference of pointer to CBFS header in + // 0xfffffffc, and the pointer is still a memory-mapped address. + // Since the CBFS core always use ROM offset, we need to figure out + // header->romsize even before media is initialized. + struct cbfs_header *header = (struct cbfs_header*) + *(uint32_t*)(0xfffffffc); + if (CBFS_HEADER_MAGIC != ntohl(header->magic)) { +#if defined(CONFIG_ROM_SIZE) + printk(BIOS_ERR, "Invalid CBFS master header at %p\n", header); + media->context = (void*)CONFIG_ROM_SIZE; +#else + return -1; +#endif + } else { + uint32_t romsize = ntohl(header->romsize); + media->context = (void*)romsize; +#if defined(CONFIG_ROM_SIZE) + if (CONFIG_ROM_SIZE != romsize) + printk(BIOS_INFO, "Warning: rom size unmatch (%d/%d)\n", + CONFIG_ROM_SIZE, romsize); +#endif + } + media->open = x86_rom_open; + media->close = x86_rom_close; + media->map = x86_rom_map; + media->unmap = x86_rom_unmap; + media->read = x86_rom_read; + return 0; +} + +int init_default_cbfs_media(struct cbfs_media *media) { + return init_x86rom_cbfs_media(media); +} diff --git a/payloads/libpayload/include/cbfs.h b/payloads/libpayload/include/cbfs.h index cf0584e..c9c7d8d 100644 --- a/payloads/libpayload/include/cbfs.h +++ b/payloads/libpayload/include/cbfs.h @@ -1,16 +1,92 @@ -#include <arch/types.h> +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2008 Jordan Crouse <jordan(a)cosmicpenguin.net> + * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * + * This file is dual-licensed. You can choose between: + * - The GNU GPL, version 2, as published by the Free Software Foundation + * - The revised BSD license (without advertising clause) + * + * --------------------------------------------------------------------------- + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + * --------------------------------------------------------------------------- + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * --------------------------------------------------------------------------- + */ + +#ifndef _CBFS_H_ +#define _CBFS_H_ + +#include <cbfs_core.h> + +/* legacy APIs */ +struct cbfs_header *get_cbfs_header(); +struct cbfs_file *cbfs_find(const char *name); +void *cbfs_find_file(const char *name, int type); + +int cbfs_execute_stage(struct cbfs_media *media, const char *name); +void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, + uint16_t device, void * dest); +void *cbfs_load_payload(struct cbfs_media *media, const char *name); +void *cbfs_load_stage(struct cbfs_media *media, const char *name); + +/* Simple buffer for streaming media. */ +struct cbfs_simple_buffer { + char *buffer; + size_t allocated; + size_t size; + size_t last_allocate; +}; + +void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, + struct cbfs_media *media, + size_t offset, size_t count); + +void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, + const void *address); + +// Utility functions +int run_address(void *f); + +/* Defined in src/lib/selfboot.c */ +struct lb_memory; +int selfboot(struct lb_memory *mem, struct cbfs_payload *payload); + +/* Defined in individual arch / board implementation. */ +int init_default_cbfs_media(struct cbfs_media *media); -/* FIXME: workaround for coreboot/libpayload Kconfig differences */ -#ifndef CONFIG_ARCH_ARMV7 -#define CONFIG_ARCH_ARMV7 0 -#endif -#ifndef CONFIG_ARCH_POWERPC -#define CONFIG_ARCH_POWERPC 0 -#endif -#ifndef CONFIG_ARCH_X86 -#define CONFIG_ARCH_X86 0 #endif -#include "cbfs_core.h" -void setup_cbfs_from_ram(void* start, uint32_t size); -void setup_cbfs_from_flash(void); diff --git a/payloads/libpayload/include/cbfs_core.h b/payloads/libpayload/include/cbfs_core.h index a3c54b1..395eef3 100644 --- a/payloads/libpayload/include/cbfs_core.h +++ b/payloads/libpayload/include/cbfs_core.h @@ -1,8 +1,9 @@ /* - * This file is part of the coreboot project. + * This file is part of the libpayload project. * * Copyright (C) 2008 Jordan Crouse <jordan(a)cosmicpenguin.net> * Copyright (C) 2012 Google, Inc. + * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. * * This file is dual-licensed. You can choose between: * - The GNU GPL, version 2, as published by the Free Software Foundation @@ -50,6 +51,10 @@ #ifndef _CBFS_CORE_H_ #define _CBFS_CORE_H_ +#include <endian.h> +#include <stddef.h> +#include <stdint.h> + /** These are standard values for the known compression alogrithms that coreboot knows about for stages and payloads. Of course, other CBFS users can use whatever @@ -74,24 +79,18 @@ #define CBFS_COMPONENT_CMOS_DEFAULT 0xaa #define CBFS_COMPONENT_CMOS_LAYOUT 0x01aa - -/** this is the master cbfs header - it need to be - located somewhere in the bootblock. Where it - actually lives is up to coreboot. On x86, a - pointer to this header will live at 0xFFFFFFFC, - so we can easily find it. */ - #define CBFS_HEADER_MAGIC 0x4F524243 -#if CONFIG_ARCH_X86 -#define CBFS_HEADPTR_ADDR 0xFFFFFFFC -#elif CONFIG_ARCH_ARMV7 -/* FIXME: This could also be 0xFFFF0000 with HIVECS enabled */ -#define CBFS_HEADPTR_ADDR 0x0000000C -#endif #define CBFS_HEADER_VERSION1 0x31313131 #define CBFS_HEADER_VERSION2 0x31313132 #define CBFS_HEADER_VERSION CBFS_HEADER_VERSION2 +#define CBFS_HEADER_INVALID_ADDRESS ((void*)(0xffffffff)) + +/** this is the master cbfs header - it need to be located somewhere available + to bootblock (to load romstage). Where it actually lives is up to coreboot. + On x86, a pointer to this header will live at 0xFFFFFFFC. + For other platforms, you need to define CONFIG_CBFS_HEADER_ROM_OFFSET */ + struct cbfs_header { uint32_t magic; uint32_t version; @@ -181,16 +180,49 @@ struct cbfs_optionrom { #define CBFS_NAME(_c) (((char *) (_c)) + sizeof(struct cbfs_file)) #define CBFS_SUBHEADER(_p) ( (void *) ((((uint8_t *) (_p)) + ntohl((_p)->offset))) ) -/* returns pointer to file inside CBFS or NULL */ -struct cbfs_file *cbfs_find(const char *name); +#define CBFS_MEDIA_INVALID_MAP_ADDRESS ((void*)(0xffffffff)) +#define CBFS_DEFAULT_MEDIA ((void*)(0x0)) + +/* Media for CBFS to load files. */ +struct cbfs_media { + + /* implementation dependent context, to hold resource references */ + void *context; -/* returns pointer to file data inside CBFS */ -void *cbfs_get_file(const char *name); + /* opens media and returns 0 on success, -1 on failure */ + int (*open)(struct cbfs_media *media); -/* returns pointer to file data inside CBFS after if type is correct */ -void *cbfs_find_file(const char *name, int type); + /* returns number of bytes read from media into dest, starting from + * offset for count of bytes */ + size_t (*read)(struct cbfs_media *media, void *dest, size_t offset, + size_t count); + + /* returns a pointer to memory with count of bytes from media source + * starting from offset, or CBFS_MEDIA_INVALID_MAP_ADDRESS on failure. + * Note: mapped data can't be free unless unmap is called, even if you + * do close first. */ + void * (*map)(struct cbfs_media *media, size_t offset, size_t count); + + /* returns NULL and releases the memory by address, which was allocated + * by map */ + void * (*unmap)(struct cbfs_media *media, const void *address); + + /* closes media and returns 0 on success, -1 on failure. */ + int (*close)(struct cbfs_media *media); +}; + +/* returns pointer to a file entry inside CBFS or NULL */ +struct cbfs_file *cbfs_get_file(struct cbfs_media *media, const char *name); + +/* returns pointer to file content inside CBFS after if type is correct */ +void *cbfs_get_file_content(struct cbfs_media *media, const char *name, + int type); /* returns 0 on success, -1 on failure */ int cbfs_decompress(int algo, void *src, void *dst, int len); -struct cbfs_header *get_cbfs_header(void); + +/* returns a pointer to CBFS master header, or CBFS_HEADER_INVALID_ADDRESS + * on failure */ +const struct cbfs_header *cbfs_get_header(struct cbfs_media *media); + #endif diff --git a/payloads/libpayload/include/stdint.h b/payloads/libpayload/include/stdint.h index 8e5083e..dd7439d 100644 --- a/payloads/libpayload/include/stdint.h +++ b/payloads/libpayload/include/stdint.h @@ -32,4 +32,5 @@ #include <arch/types.h> typedef unsigned long uintptr_t; +typedef long intptr_t; #endif diff --git a/payloads/libpayload/libcbfs/Makefile.inc b/payloads/libpayload/libcbfs/Makefile.inc index 50f4821..0d3e1ec 100644 --- a/payloads/libpayload/libcbfs/Makefile.inc +++ b/payloads/libpayload/libcbfs/Makefile.inc @@ -28,4 +28,5 @@ ## libcbfs-$(CONFIG_CBFS) += cbfs.c +libcbfs-$(CONFIG_CBFS) += ram_media.c diff --git a/payloads/libpayload/libcbfs/cbfs.c b/payloads/libpayload/libcbfs/cbfs.c index 026b73c..1ddfd94 100644 --- a/payloads/libpayload/libcbfs/cbfs.c +++ b/payloads/libpayload/libcbfs/cbfs.c @@ -1,105 +1,237 @@ /* * This file is part of the libpayload project. * - * Copyright (C) 2011 secunet Security Networks AG + * Copyright (C) 2008, Jordan Crouse <jordan(a)cosmicpenguin.net> + * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE - * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA */ +#define LIBPAYLOAD + +#ifdef LIBPAYLOAD +# include <libpayload-config.h> +# ifdef CONFIG_LZMA +# include <lzma.h> +# define CBFS_CORE_WITH_LZMA +# endif +# define CBFS_MINI_BUILD +#elif defined(__SMM__) +# define CBFS_MINI_BUILD +#else +# define CBFS_CORE_WITH_LZMA +# include <lib.h> +#endif -#include <endian.h> -#include <stdio.h> -#include <string.h> #include <cbfs.h> +#include <string.h> -#ifdef CONFIG_LZMA -#define CBFS_CORE_WITH_LZMA -#include <lzma.h> +#ifdef LIBPAYLOAD +# include <stdio.h> +# define DEBUG(x...) +# define LOG(x...) printf(x) +# define ERROR(x...) printf(x) +#else +# include <console/console.h> +# define ERROR(x...) printk(BIOS_ERR, "CBFS: " x) +# define LOG(x...) printk(BIOS_INFO, "CBFS: " x) +# if CONFIG_DEBUG_CBFS +# define DEBUG(x...) printk(BIOS_SPEW, "CBFS: " x) +# else +# define DEBUG(x...) +# endif #endif -#define ERROR(x...) printf(x) -#define LOG(x...) - -static uint32_t host_virt_to_phys(void *addr); -static void *host_phys_to_virt(uint32_t addr); +#if defined(CONFIG_CBFS_HEADER_ROM_OFFSET) && (CONFIG_CBFS_HEADER_ROM_OFFSET) +# define CBFS_HEADER_ROM_ADDRESS (CONFIG_CBFS_HEADER_ROM_OFFSET) +#else +// Indirect address: only works on 32bit top-aligned systems. +# define CBFS_HEADER_ROM_ADDRESS (*(uint32_t*)0xfffffffc) +#endif -uint32_t romstart(void); -uint32_t romend(void); +#include "cbfs_core.c" -#include <arch/virtual.h> -static uint32_t host_virt_to_phys(void *addr) +#ifndef __SMM__ +static inline int tohex4(unsigned int c) { - return virt_to_phys(addr); + return (c <= 9) ? (c + '0') : (c - 10 + 'a'); } -static void *host_phys_to_virt(uint32_t addr) +static void tohex16(unsigned int val, char* dest) { - return phys_to_virt(addr); + dest[0] = tohex4(val>>12); + dest[1] = tohex4((val>>8) & 0xf); + dest[2] = tohex4((val>>4) & 0xf); + dest[3] = tohex4(val & 0xf); } -#undef virt_to_phys -#undef phys_to_virt -uint32_t (*virt_to_phys)(void *) = host_virt_to_phys; -void* (*phys_to_virt)(uint32_t) = host_phys_to_virt; +void *cbfs_load_optionrom(struct cbfs_media *media, uint16_t vendor, + uint16_t device, void *dest) +{ + char name[17] = "pciXXXX,XXXX.rom"; + struct cbfs_optionrom *orom; + uint8_t *src; + + tohex16(vendor, name+3); + tohex16(device, name+8); + orom = (struct cbfs_optionrom *) + cbfs_get_file_content(media, name, CBFS_TYPE_OPTIONROM); -uint32_t _romstart = 0xffffffff; -uint32_t _romend = 0; + if (orom == NULL) + return NULL; -uint32_t romstart(void) -{ - return _romstart; + /* They might have specified a dest address. If so, we can decompress. + * If not, there's not much hope of decompressing or relocating the rom. + * in the common case, the expansion rom is uncompressed, we + * pass 0 in for the dest, and all we have to do is find the rom and + * return a pointer to it. + */ + + /* BUG: the cbfstool is (not yet) including a cbfs_optionrom header */ + src = (uint8_t*)orom; // + sizeof(struct cbfs_optionrom); + + if (! dest) + return src; + + if (cbfs_decompress(ntohl(orom->compression), + src, + dest, + ntohl(orom->len))) + return NULL; + + return dest; } -uint32_t romend(void) +void * cbfs_load_stage(struct cbfs_media *media, const char *name) { - return _romend; + struct cbfs_stage *stage = (struct cbfs_stage *) + cbfs_get_file_content(media, name, CBFS_TYPE_STAGE); + /* this is a mess. There is no ntohll. */ + /* for now, assume compatible byte order until we solve this. */ + uint32_t entry; + + if (stage == NULL) + return (void *) -1; + + LOG("loading stage %s @ 0x%x (%d bytes), entry @ 0x%llx\n", + name, + (uint32_t) stage->load, stage->memlen, + stage->entry); + memset((void *) (uint32_t) stage->load, 0, stage->memlen); + + if (cbfs_decompress(stage->compression, + ((unsigned char *) stage) + + sizeof(struct cbfs_stage), + (void *) (uint32_t) stage->load, + stage->len)) + return (void *) -1; + + DEBUG("stage loaded.\n"); + + entry = stage->entry; + // entry = ntohll(stage->entry); + + return (void *) entry; } -#include "cbfs_core.c" +int cbfs_execute_stage(struct cbfs_media *media, const char *name) +{ + struct cbfs_stage *stage = (struct cbfs_stage *) + cbfs_get_file_content(media, name, CBFS_TYPE_STAGE); -static uint32_t ram_cbfs_offset; + if (stage == NULL) + return 1; -static uint32_t ram_virt_to_phys(void *addr) -{ - return (uint32_t)addr - ram_cbfs_offset; + if (ntohl(stage->compression) != CBFS_COMPRESS_NONE) { + LOG("Unable to run %s: Compressed file" + "Not supported for in-place execution\n", name); + return 1; + } + + /* FIXME: This isn't right */ + LOG("run @ %p\n", (void *) ntohl((uint32_t) stage->entry)); + return run_address((void *)(uintptr_t)ntohll(stage->entry)); } -static void *ram_phys_to_virt(uint32_t addr) +void *cbfs_load_payload(struct cbfs_media *media, const char *name) { - return (void*)addr + ram_cbfs_offset; + return (struct cbfs_payload *)cbfs_get_file_content( + media, name, CBFS_TYPE_PAYLOAD); } -void setup_cbfs_from_ram(void* start, uint32_t size) -{ - /* assumes rollover */ - ram_cbfs_offset = (uint32_t)start + size; - virt_to_phys = ram_virt_to_phys; - phys_to_virt = ram_phys_to_virt; +struct cbfs_file *cbfs_find(const char *name) { + return cbfs_get_file(CBFS_DEFAULT_MEDIA, name); +} + +void *cbfs_find_file(const char *name, int type) { + return cbfs_get_file_content(CBFS_DEFAULT_MEDIA, name, type); +} + +struct cbfs_header *get_cbfs_header() { + return cbfs_get_header(CBFS_DEFAULT_MEDIA); } -void setup_cbfs_from_flash(void) +/* Simple buffer */ + +void *cbfs_simple_buffer_map(struct cbfs_simple_buffer *buffer, + struct cbfs_media *media, + size_t offset, size_t count) { + void *address = buffer->buffer + buffer->allocated;; + DEBUG("simple_buffer_map(offset=%d, count=%d): " + "allocated=%d, size=%d, last_allocate=%d\n", + offset, count, buffer->allocated, buffer->size, + buffer->last_allocate); + if (buffer->allocated + count >= buffer->size) + return CBFS_MEDIA_INVALID_MAP_ADDRESS; + if (media->read(media, address, offset, count) != count) { + ERROR("simple_buffer: fail to read %zd bytes from 0x%zx\n", + count, offset); + return CBFS_MEDIA_INVALID_MAP_ADDRESS; + } + buffer->allocated += count; + buffer->last_allocate = count; + return address; +} + +void *cbfs_simple_buffer_unmap(struct cbfs_simple_buffer *buffer, + const void *address) { + // TODO Add simple buffer management so we can free more than last + // allocated one. + DEBUG("simple_buffer_unmap(address=0x%p): " + "allocated=%d, size=%d, last_allocate=%d\n", + address, buffer->allocated, buffer->size, + buffer->last_allocate); + if ((buffer->buffer + buffer->allocated - buffer->last_allocate) == + address) { + buffer->allocated -= buffer->last_allocate; + buffer->last_allocate = 0; + } + return NULL; +} + +/** + * run_address is passed the address of a function taking no parameters and + * jumps to it, returning the result. + * @param f the address to call as a function. + * @return value returned by the function. + */ + +int run_address(void *f) { - virt_to_phys = host_virt_to_phys; - phys_to_virt = host_phys_to_virt; + int (*v) (void); + v = f; + return v(); } + +#endif diff --git a/payloads/libpayload/libcbfs/cbfs_core.c b/payloads/libpayload/libcbfs/cbfs_core.c index 4bf755b..3a95def 100644 --- a/payloads/libpayload/libcbfs/cbfs_core.c +++ b/payloads/libpayload/libcbfs/cbfs_core.c @@ -2,6 +2,7 @@ * This file is part of the libpayload project. * * Copyright (C) 2011 secunet Security Networks AG + * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions @@ -27,119 +28,153 @@ * SUCH DAMAGE. */ -/* The CBFS core requires a couple of #defines or functions to adapt it to the target environment: +/* The CBFS core requires a couple of #defines or functions to adapt it to the + * target environment: * * CBFS_CORE_WITH_LZMA (must be #define) * if defined, ulzma() must exist for decompression of data streams * - * phys_to_virt(x), virt_to_phys(x) - * translate physical addresses to virtual and vice versa - * can be idempotent if no mapping is necessary. + * CBFS_HEADER_ROM_ADDRESS + * ROM address (offset) of CBFS header. Underlying CBFS media may interpret + * it in other way so we call this "address". * * ERROR(x...) * print an error message x (in printf format) * * LOG(x...) - * print a debug message x (in printf format) + * print a message x (in printf format) * - * romstart() - * returns the start address of the ROM image, or 0xffffffff if ROM is - * top-aligned. This is a physical address. + * DEBUG(x...) + * print a debug message x (in printf format) * - * romend() - * returns the highest address of the ROM image + 1, for use if - * romstart() == 0xffffffff. This is a physical address. */ -#include <cbfs_core.h> +#include <cbfs.h> +#include <string.h> - -/* returns pointer to master header or 0xffffffff if not found */ -struct cbfs_header *get_cbfs_header(void) +/* returns a pointer to CBFS master header, or CBFS_HEADER_INVALID_ADDRESS + * on failure */ +const struct cbfs_header *cbfs_get_header(struct cbfs_media *media) { - struct cbfs_header *header; - - /* find header */ - if (romstart() == 0xffffffff) { - header = (struct cbfs_header*)phys_to_virt(*(uint32_t*)phys_to_virt(romend() + CBFS_HEADPTR_ADDR)); - } else { - // FIXME: where's the master header on ARM (our current bottom-aligned platform)? - header = NULL; + const struct cbfs_header *header; + struct cbfs_media default_media; + + if (media == CBFS_DEFAULT_MEDIA) { + media = &default_media; + if (init_default_cbfs_media(media) != 0) { + ERROR("Failed to initializee default media.\n"); + return NULL; + } + } + + media->open(media); + DEBUG("CBFS_HEADER_ROM_ADDRESS: 0x%x/0x%x\n", CBFS_HEADER_ROM_ADDRESS, + CONFIG_ROM_SIZE); + header = media->map(media, CBFS_HEADER_ROM_ADDRESS, sizeof(*header)); + media->close(media); + + if (header == CBFS_MEDIA_INVALID_MAP_ADDRESS) { + ERROR("Failed to load CBFS header from 0x%x\n", + CBFS_HEADER_ROM_ADDRESS); + return CBFS_HEADER_INVALID_ADDRESS; } + if (CBFS_HEADER_MAGIC != ntohl(header->magic)) { - ERROR("Could not find valid CBFS master header at %p: %x vs %x.\n", header, CBFS_HEADER_MAGIC, ntohl(header->magic)); + ERROR("Could not find valid CBFS master header at %x: " + "%x vs %x.\n", CBFS_HEADER_ROM_ADDRESS, CBFS_HEADER_MAGIC, + ntohl(header->magic)); if (header->magic == 0xffffffff) { ERROR("Maybe ROM is not mapped properly?\n"); } - return (void*)0xffffffff; + return CBFS_HEADER_INVALID_ADDRESS; } return header; } -// by must be power-of-two -#define CBFS_ALIGN(val, by) (typeof(val))((uint32_t)(val + by - 1) & (uint32_t)~(by - 1)) -#define CBFS_ALIGN_UP(val, by) CBFS_ALIGN(val + 1, by) - /* public API starts here*/ -struct cbfs_file *cbfs_find(const char *name) +struct cbfs_file *cbfs_get_file(struct cbfs_media *media, const char *name) { - struct cbfs_header *header = get_cbfs_header(); - if (header == (void*)0xffffffff) return NULL; - - LOG("Searching for %s\n", name); - - void *data, *dataend, *origdata; - /* find first entry */ - if (romstart() == 0xffffffff) { - data = (void*)phys_to_virt(romend()) - ntohl(header->romsize) + ntohl(header->offset); - dataend = (void*)phys_to_virt(romend()); - } else { - data = (void*)phys_to_virt(romstart()) + ntohl(header->offset); - dataend = (void*)phys_to_virt(romstart()) + ntohl(header->romsize); - } - dataend -= ntohl(header->bootblocksize); - - int align = ntohl(header->align); - - origdata = data; - while ((data < (dataend - 1)) && (data >= origdata)) { - struct cbfs_file *file = data; - if (memcmp(CBFS_FILE_MAGIC, file->magic, strlen(CBFS_FILE_MAGIC)) != 0) { - // no file header found. corruption? - // proceed in aligned steps to resynchronize - LOG("ERROR: No file header found at %p, attempting to recover by searching for header\n", data); - data = phys_to_virt(CBFS_ALIGN_UP(virt_to_phys(data), align)); - continue; - } - LOG("Check %s\n", CBFS_NAME(file)); - if (strcmp(CBFS_NAME(file), name) == 0) { - return file; - } - void *olddata = data; - data = phys_to_virt(CBFS_ALIGN(virt_to_phys(data) + ntohl(file->len) + ntohl(file->offset), align)); - if (olddata > data) { - LOG("Something is wrong here. File chain moved from %p to %p\n", olddata, data); + const char *file_name; + uint32_t offset, align, romsize, name_len; + const struct cbfs_header *header; + struct cbfs_file file, *file_ptr; + struct cbfs_media default_media; + + if (media == CBFS_DEFAULT_MEDIA) { + media = &default_media; + if (init_default_cbfs_media(media) != 0) { + ERROR("Failed to initializee default media.\n"); return NULL; } } - return NULL; -} - -void *cbfs_get_file(const char *name) -{ - struct cbfs_file *file = cbfs_find(name); - if (file == NULL) { - ERROR("Could not find file '%s'.\n", name); + if (CBFS_HEADER_INVALID_ADDRESS == (header = cbfs_get_header(media))) return NULL; - } - return (void*)CBFS_SUBHEADER(file); + // Logical offset (for source media) of first file. + offset = ntohl(header->offset); + align = ntohl(header->align); + romsize = ntohl(header->romsize); + + // TODO header->romsize seems broken now on ARM. Remove this when it's + // fixed. +#if defined(CONFIG_ARCH_ARMV7) && CONFIG_ARCH_ARMV7 + romsize = CONFIG_ROM_SIZE; +#endif + DEBUG("offset: 0x%x, align: %d, romsize: %d\n", offset, align, romsize); + + LOG("Looking for '%s' starting from 0x%x.\n", name, offset); + media->open(media); + while (offset < romsize && + media->read(media, &file, offset, sizeof(file)) == sizeof(file)) { + if (memcmp(CBFS_FILE_MAGIC, file.magic, + sizeof(file.magic)) != 0) { + uint32_t new_align = align; + if (offset % align) + new_align += align - (offset % align); + ERROR("ERROR: No file header found at 0x%xx - " + "try next aligned address: 0x%x.\n", offset, + offset + new_align); + offset += new_align; + continue; + } + name_len = ntohl(file.offset) - sizeof(file); + DEBUG(" - load entry 0x%x file name (%d bytes)...\n", offset, + name_len); + + // load file name (arbitrary length). + file_name = (const char*)media->map( + media, offset + sizeof(file), name_len); + if (file_name == CBFS_MEDIA_INVALID_MAP_ADDRESS) { + ERROR("ERROR: Failed to get filename: 0x%x.\n", offset); + } else if (strcmp(file_name, name) == 0) { + int file_offset = ntohl(file.offset), + file_len = ntohl(file.len); + LOG("Found file (offset=0x%x, len=%d).\n", + offset + file_offset, file_len); + media->unmap(media, file_name); + file_ptr = media->map(media, offset, + file_offset + file_len); + media->close(media); + return file_ptr; + } else { + LOG(" (unmatched file @0x%x: %s)\n", offset, file_name); + media->unmap(media, file_name); + } + + // Move to next file. + offset += ntohl(file.len) + ntohl(file.offset); + if (offset % align) + offset += align - (offset % align); + } + media->close(media); + ERROR("ERROR: Not found.\n"); + return NULL; } -void *cbfs_find_file(const char *name, int type) +void *cbfs_get_file_content(struct cbfs_media *media, const char *name, int type) { - struct cbfs_file *file = cbfs_find(name); + struct cbfs_file *file = cbfs_get_file(media, name); if (file == NULL) { ERROR("Could not find file '%s'.\n", name); @@ -147,7 +182,8 @@ void *cbfs_find_file(const char *name, int type) } if (ntohl(file->type) != type) { - ERROR("File '%s' is of type %x, but we requested %x.\n", name, ntohl(file->type), type); + ERROR("File '%s' is of type %x, but we requested %x.\n", name, + ntohl(file->type), type); return NULL; } @@ -168,7 +204,9 @@ int cbfs_decompress(int algo, void *src, void *dst, int len) return -1; #endif default: - ERROR("tried to decompress %d bytes with algorithm #%x, but that algorithm id is unsupported.\n", len, algo); + ERROR("tried to decompress %d bytes with algorithm #%x," + "but that algorithm id is unsupported.\n", len, + algo); return -1; } } diff --git a/payloads/libpayload/libcbfs/ram_media.c b/payloads/libpayload/libcbfs/ram_media.c new file mode 100644 index 0000000..4f4dc65 --- /dev/null +++ b/payloads/libpayload/libcbfs/ram_media.c @@ -0,0 +1,106 @@ +/* + * This file is part of the libpayload project. + * + * Copyright (C) 2013 The Chromium OS Authors. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, + * MA 02110-1301 USA + */ +#include <cbfs.h> +#include <string.h> +#include <stdio.h> +#include <stdlib.h> + +// Implementation of a media source based on given memory buffer. +struct ram_media { + char *start; + size_t size; +}; + +static int ram_open(struct cbfs_media *media) { + return 0; +} + +static void *ram_map(struct cbfs_media *media, size_t offset, size_t count) { + struct ram_media *m = (struct ram_media*)media->context; + if (offset + count >= m->size) { + printf("ERROR: ram_map: request out of range (0x%x+0x%x)\n", + offset, count); + return NULL; + } + return (void*)(m->start + offset); +} + +static void *ram_unmap(struct cbfs_media *media, const void *address) { + return NULL; +} + +static size_t ram_read(struct cbfs_media *media, void *dest, size_t offset, + size_t count) { + void *ptr = ram_map(media, offset, count); + memcpy(dest, ptr, count); + ram_unmap(media, ptr); + return count; +} + +static int ram_close(struct cbfs_media *media) { + return 0; +} + +int init_cbfs_ram_media(struct cbfs_media *media, void *start, size_t size); +int init_cbfs_ram_media(struct cbfs_media *media, void *start, size_t size) { + // TODO Find a way to release unused media. Maybe adding media->destroy. + struct ram_media *m = (struct ram_media*)malloc(sizeof(*m)); + m->start = start; + m->size = size; + media->context = (void*)m; + media->open = ram_open; + media->close = ram_close; + media->map = ram_map; + media->unmap = ram_unmap; + media->read = ram_read; + return 0; +} + +// Legacy setup_cbfs_from_*. +static int is_default_cbfs_media_initialized; +static struct cbfs_media default_cbfs_media; + +int setup_cbfs_from_ram(void *start, uint32_t size); +int setup_cbfs_from_ram(void *start, uint32_t size) { + int result = init_cbfs_ram_media(&default_cbfs_media, start, size); + if (result == 0) + is_default_cbfs_media_initialized = 1; + return result; +} + +extern int libpayload_init_default_cbfs_media(struct cbfs_media *media); +int setup_cbfs_from_flash(void); +int setup_cbfs_from_flash(void) { + int result = libpayload_init_default_cbfs_media(&default_cbfs_media); + if (result == 0) + is_default_cbfs_media_initialized = 1; + return result; +} + +int init_default_cbfs_media(struct cbfs_media *media) { + int result = 0; + if (is_default_cbfs_media_initialized != 1) { + result = setup_cbfs_from_flash(); + } + if (result == 0) + memcpy(media, &default_cbfs_media, sizeof(*media)); + return result; +}

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Re: [coreboot] Guide lines: Prepend commit summary with component (was: New patch to review for coreboot: 0b41858 Clean up the mmu setup a bit)
by Marc Jones 30 Jan '13

30 Jan '13

On Mon, Jan 28, 2013 at 3:17 PM, David Hendricks <dhendrix(a)google.com> wrote: > On Mon, Jan 28, 2013 at 11:34 AM, Paul Menzel > <paulepanter(a)users.sourceforge.net> wrote: >> >> Dear coreboot folks, >> >> >> >> Am Montag, den 28.01.2013, 18:02 +0100 schrieb Ronald G.Minnich: >> >> […] >> >> > Clean up the mmu setup a bit >> >> to keep a better overview when looking at the commit log (`git log >> --format=oneline` in Gitweb for example) it would help me, if the >> component the patch/commit touches would be prepended to the commit >> summary. >> >> ARMv7/Snow: Clean up the MMU setup a bit >> >> Does everybody agree with that so that this could be added to the >> development guidelines? > > > It can be helpful, but should be left at the author's discretion. Prefixes > are handy because proper grammar takes a lot of space in a subject line, but > are not required in every case. > > If you wish to focus only on a particular part of the codebase, then specify > the directories/files you wish to look at when running git log. Actually, I > think it would look kind of ugly to do "git log src/arch/x86" and see every > commit cluttered with some cookie-cutter prefix. > > /my $0.02. > ++ > -- > David Hendricks (dhendrix) > Systems Software Engineer, Google Inc. > > -- > coreboot mailing list: coreboot(a)coreboot.org > http://www.coreboot.org/mailman/listinfo/coreboot -- http://se-eng.com

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Patch merged into coreboot/master: 6fe0cab Extend CBFS to support arbitrary ROM source media.
by gerrit＠coreboot.org 30 Jan '13

30 Jan '13

the following patch was just integrated into master: commit 6fe0cab205e131525efbfce4f59da344b1e76598 Author: Hung-Te Lin <hungte(a)chromium.org> Date: Tue Jan 22 18:57:56 2013 +0800 Extend CBFS to support arbitrary ROM source media. Summary: Isolate CBFS underlying I/O to board/arch-specific implementations as "media stream", to allow loading and booting romstage on non-x86. CBFS functions now all take a new "media source" parameter; use CBFS_DEFAULT_MEDIA if you simply want to load from main firmware. API Changes: cbfs_find => cbfs_get_file. cbfs_find_file => cbfs_get_file_content. cbfs_get_file => cbfs_get_file_content with correct type. CBFS used to work only on memory-mapped ROM (all x86). For platforms like ARM, the ROM may come from USB, UART, or SPI -- any serial devices and not available for memory mapping. To support these devices (and allowing CBFS to read from multiple source at the same time), CBFS operations are now virtual-ized into "cbfs_media". To simplify porting existing code, every media source must support both "reading into pre-allocated memory (read)" and "read and return an allocated buffer (map)". For devices without native memory-mapped ROM, "cbfs_simple_buffer*" provides simple memory mapping simulation. Every CBFS function now takes a cbfs_media* as parameter. CBFS_DEFAULT_MEDIA is defined for CBFS functions to automatically initialize a per-board default media (CBFS will internally calls init_default_cbfs_media). Also revised CBFS function names relying on memory mapped backend (ex, "cbfs_find" => actually loads files). Now we only have two getters: struct cbfs_file *entry = cbfs_get_file(media, name); void *data = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, name, type); Test results: - Verified to work on x86/qemu. - Compiles on ARM, and follow up commit will provide working SPI driver. Change-Id: Iac911ded25a6f2feffbf3101a81364625bb07746 Signed-off-by: Hung-Te Lin <hungte(a)chromium.org> Reviewed-on: http://review.coreboot.org/2182 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Wed Jan 30 13:19:56 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Wed Jan 30 17:58:31 2013, giving +2 See http://review.coreboot.org/2182 for details. -gerrit

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Patch merged into coreboot/master: 5fc64dc Rename family15 pci northbridgeops functions.
by gerrit＠coreboot.org 30 Jan '13

30 Jan '13

the following patch was just integrated into master: commit 5fc64dca45b01556a9325bea0fb563d6f0d16f75 Author: Steven Sherk <steven.sherk(a)se-eng.com> Date: Tue Jan 29 15:46:05 2013 -0700 Rename family15 pci northbridgeops functions. This is a port of the following commit 8a49ac7f808f76821e7d63070420cfd98f707c7c Rename fam14 pci northbridge ops functions. Clarify the northbridge ops function names. original-Change-Id: If7d89de761c1e22f9ae39d36f5cf334cc2910e1d Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: Id7889bf02e2696220081251acdf695327267c796 Signed-off-by: Steven Sherk <steven.sherk(a)se-eng.com> Reviewed-on: http://review.coreboot.org/2225 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303(a)gmail.com> Build-Tested: build bot (Jenkins) at Wed Jan 30 00:10:55 2013, giving +1 Reviewed-By: Marc Jones <marcj303(a)gmail.com> at Wed Jan 30 17:39:50 2013, giving +2 See http://review.coreboot.org/2225 for details. -gerrit

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Patch merged into coreboot/master: f434058 Rename family15tn pci northbridgeops functions.
by gerrit＠coreboot.org 30 Jan '13

30 Jan '13

the following patch was just integrated into master: commit f434058b042dc4023f5662cf5c07ec8d1d4f090f Author: Steven Sherk <steven.sherk(a)se-eng.com> Date: Tue Jan 29 16:13:35 2013 -0700 Rename family15tn pci northbridgeops functions. This is a port of the following commit 8a49ac7f808f76821e7d63070420cfd98f707c7c Rename fam14 pci northbridge ops functions. Clarify the northbridge ops function names. original-Change-Id: If7d89de761c1e22f9ae39d36f5cf334cc2910e1d Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: Icda3ec58219baa177af3b1dce729c6ad1f744be8 Signed-off-by: Steven Sherk <steven.sherk(a)se-eng.com> Reviewed-on: http://review.coreboot.org/2226 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303(a)gmail.com> Build-Tested: build bot (Jenkins) at Wed Jan 30 00:22:42 2013, giving +1 Reviewed-By: Marc Jones <marcj303(a)gmail.com> at Wed Jan 30 17:37:34 2013, giving +2 See http://review.coreboot.org/2226 for details. -gerrit

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Patch merged into coreboot/master: e1ea515 libpayload: Update README with Git repository URL and directory location
by gerrit＠coreboot.org 30 Jan '13

30 Jan '13

the following patch was just integrated into master: commit e1ea5151def4b352e9f26be8f490983935867569 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Fri Oct 5 23:05:48 2012 +0200 libpayload: Update README with Git repository URL and directory location Change-Id: I3e068f5e6c1eb875df0885c0ce43a03082be31a5 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-on: http://review.coreboot.org/2228 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Wed Jan 30 12:19:33 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Wed Jan 30 17:36:21 2013, giving +2 See http://review.coreboot.org/2228 for details. -gerrit

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Patch merged into coreboot/master: 58089e8 Family 14: Update for string portability.
by gerrit＠coreboot.org 30 Jan '13

30 Jan '13

the following patch was just integrated into master: commit 58089e859dbaca7026cf61df3343073122a7c0a9 Author: Mike Loptien <mike.loptien(a)se-eng.com> Date: Tue Jan 29 15:45:09 2013 -0700 Family 14: Update for string portability. Update function messages to be more portable by using the __func__ compiler command instead of hard coded function names. Change-Id: I6327c9769c2544bbc56155a2f89afd767487faf6 Signed-off-by: Mike Loptien <mike.loptien(a)se-eng.com> Reviewed-on: http://review.coreboot.org/2227 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix(a)chromium.org> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Build-Tested: build bot (Jenkins) at Wed Jan 30 00:39:00 2013, giving +1 See http://review.coreboot.org/2227 for details. -gerrit

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Patch merged into coreboot/master: cc5b344 Project PIANO aka tianocoreboot
by gerrit＠coreboot.org 30 Jan '13

30 Jan '13

the following patch was just integrated into master: commit cc5b3446624cf85e13a8130a524e81360c5f4239 Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Tue Jan 15 17:02:58 2013 -0800 Project PIANO aka tianocoreboot This is a Tiano Core loader payload based on libpayload. It will load a Tiano Core DXE core from an UEFI firmware volume stored in CBFS. Currently Tiano Core dies because it does not find all the UEFI services it needs: coreboot-4.0-3316-gc5c9ff8-dirty Mon Jan 28 15:37:12 PST 2013 starting... [..] Tiano Core Loader v1.0 Copyright (C) 2013 Google Inc. All rights reserved. Memory Map (5 entries): 1. 0000000000000000 - 0000000000000fff [10] 2. 0000000000001000 - 000000000009ffff [01] 3. 00000000000c0000 - 0000000003ebffff [01] 4. 0000000003ec0000 - 0000000003ffffff [10] 5. 00000000ff800000 - 00000000ffffffff [02] DXE code: 03e80000 DXE stack: 03e60000 HOB list: 03d5c000 Found UEFI firmware volume. GUID: 8c8ce578-8a3d-4f1c-9935-896185c32dd3 length: 0x0000000000260000 Found DXE core at 0xffc14e0c Section 0: .text size=000158a0 rva=00000240 in file=000158a0/00000240 flags=60000020 Section 1: .data size=00006820 rva=00015ae0 in file=00006820/00015ae0 flags=c0000040 Section 2: .reloc size=000010a0 rva=0001c300 in file=000010a0/0001c300 flags=42000040 Jumping to DXE core at 0x3e80000 InstallProtocolInterface: 5B1B31A1-9562-11D2-8E3F-00A0C969723B 3E96708 HOBLIST address in DXE = 0x3E56010 Memory Allocation 0x00000003 0x3E80000 - 0x3EBFFFF FV Hob 0xFFC14D78 - 0xFFE74D77 InstallProtocolInterface: D8117CFE-94A6-11D4-9A3A-0090273FC14D 3E95EA0 InstallProtocolInterface: EE4E5898-3914-4259-9D6E-DC7BD79403CF 3E9630C Security Arch Protocol not present!! CPU Arch Protocol not present!! Metronome Arch Protocol not present!! Timer Arch Protocol not present!! Bds Arch Protocol not present!! Watchdog Timer Arch Protocol not present!! Runtime Arch Protocol not present!! Variable Arch Protocol not present!! Variable Write Arch Protocol not present!! Capsule Arch Protocol not present!! Monotonic Counter Arch Protocol not present!! Reset Arch Protocol not present!! Real Time Clock Arch Protocol not present!! ASSERT_EFI_ERROR (Status = Not Found) ASSERT /home/reinauer/svn/Tiano/edk2/MdeModulePkg/Core/Dxe/DxeMain/DxeMain.c(461): !EFI_ERROR (Status) Change-Id: I14068e9a28ff67ab1bf03105d56dab2e8be7b230 Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Reviewed-on: http://review.coreboot.org/2154 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com> Build-Tested: build bot (Jenkins) at Tue Jan 29 01:06:31 2013, giving +1 Reviewed-By: Ronald G. Minnich <rminnich(a)gmail.com> at Wed Jan 30 17:34:40 2013, giving +2 See http://review.coreboot.org/2154 for details. -gerrit

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Patch set updated for coreboot: a271849 AMD f15 nb: fix limitk calculation
by Paul Menzel 30 Jan '13

30 Jan '13

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/2231 -gerrit commit a271849ede0a84b06d8f22584431e046627b1bec Author: Konstantin Aladyshev <aladyshev(a)nicevt.ru> Date: Fri Jan 25 21:23:38 2013 +0400 AMD f15 nb: fix limitk calculation Revert change: commit 15dc3ccaab5a431b1a0b99aaba9d61457b219343 Author: zbao <fishbaozi(a)gmail.com> Date: Fri Aug 3 15:56:21 2012 +0800 AMD f15 nb: Remove the misleading 0x100 from the limitk (Propagation) Apply the change http://review.coreboot.org/1265 to all the AMD northbridge. Reviewed-on: http://review.coreboot.org/#/c/1404/ This commit leads to wrong limit calculation which causes memory loss. Example from coreboot memory table: .... 5. 0000000100000000-0000000417ffffff: RAM 6. 0000000420000000-0000000817ffffff: RAM 7. 0000000820000000-0000000c17ffffff: RAM 8. 0000000c20000000-0000001017ffffff: RAM 9. 0000001020000000-0000001417ffffff: RAM 10. 0000001420000000-0000001817ffffff: RAM 11. 0000001820000000-0000001c17ffffff: RAM 12. 0000001c20000000-0000002017ffffff: RAM Reverting this commit fix this issue: ...... 5. 0000000100000000-0000000420000000: RAM 6. 0000000420000000-0000000820000000: RAM 7. 0000000820000000-0000000c20000000: RAM 8. 0000000c20000000-0000001020000000: RAM 9. 0000001020000000-0000001420000000: RAM 10. 0000001420000000-0000001820000000: RAM 11. 0000001820000000-0000001c20000000: RAM 12. 0000001c20000000-0000002020000000: RAM Limitk is calculated from mask field in dram_base_mask_t struct. u32 mask field contains [47:27] bits of dram_limit in its [28:8] bits. 0x100 is used to show that bits [7:0] are masked out. Change-Id: I49b171cd4e519a0e57f0f0dbd452d1b5a17f7383 Signed-off-by: Konstantin Aladyshev <aladyshev(a)nicevt.ru> Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- src/northbridge/amd/agesa/family15/northbridge.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c index abd53b2..f4c830b 100644 --- a/src/northbridge/amd/agesa/family15/northbridge.c +++ b/src/northbridge/amd/agesa/family15/northbridge.c @@ -617,7 +617,7 @@ static struct hw_mem_hole_info get_hw_mem_hole_info(void) mem_hole.node_id = i; break; //only one hole } - limit_k = ((resource_t)(((d.mask & ~1) + 0x000FF) & 0x1fffff00)) << 9; + limit_k = ((resource_t)((d.mask + 0x00000100) & 0x1fffff00)) << 9; limitk_pri = limit_k; } } @@ -762,7 +762,7 @@ static void domain_set_resources(device_t dev) if (!(d.mask & 1)) continue; basek = ((resource_t)(d.base & 0x1fffff00)) << 9; // could overflow, we may lost 6 bit here - limitk = ((resource_t)(((d.mask & ~1) + 0x000FF) & 0x1fffff00)) << 9; + limitk = ((resource_t)((d.mask + 0x00000100) & 0x1fffff00)) << 9 ; sizek = limitk - basek;

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coreboot January 2013