Ronald G. Minnich (rminnich(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/1917
-gerrit
commit 61fb0aa6facebd4329623e39332cd311d623b303
Author: Ronald G. Minnich <rminnich(a)gmail.com>
Date: Mon Nov 26 16:12:38 2012 -0800
Arm architecture support in cbfs.
Signed-off-by: David Hendricks <dhendrix(a)chromium.org>
Signed-off-by: Hung-Te Lin <hungte(a)chromium.org>
Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de>
Change-Id: I7fed081d71c24cf58d59513377224c95cf74779e
Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com>
---
src/include/cbfs_core.h | 21 ++++++++++++++++-----
1 file changed, 16 insertions(+), 5 deletions(-)
diff --git a/src/include/cbfs_core.h b/src/include/cbfs_core.h
index 43e6b9b..6fb4e04 100644
--- a/src/include/cbfs_core.h
+++ b/src/include/cbfs_core.h
@@ -78,13 +78,19 @@
/** this is the master cbfs header - it need to be
located somewhere in the bootblock. Where it
- actually lives is up to coreboot. A pointer to
- this header will live at 0xFFFFFFFc, so we can
- easily find it. */
+ actually lives is up to coreboot. On x86, a
+ pointer to this header will live at 0xFFFFFFFc,
+ so we can easily find it. */
#define CBFS_HEADER_MAGIC 0x4F524243
+#if CONFIG_ARCH_X86
#define CBFS_HEADPTR_ADDR 0xFFFFFFFc
+#elif CONFIG_ARCH_ARM
+#define CBFS_HEADPTR_ADDR 0x0000000c
+#endif
#define VERSION1 0x31313131
+#define VERSION2 0x31313132
+#define VERSION VERSION2
struct cbfs_header {
uint32_t magic;
@@ -93,9 +99,15 @@ struct cbfs_header {
uint32_t bootblocksize;
uint32_t align;
uint32_t offset;
- uint32_t pad[2];
+ uint32_t architecture;
+ uint32_t pad[1];
} __attribute__((packed));
+// "Legacy" refers to cbfs headers before architecture is defined (i.e., X86).
+#define CBFS_ARCHITECTURE_LEGACY 0xFFFFFFFF
+#define CBFS_ARCHITECTURE_ARM 0x10
+#define CBFS_ARCHITECTURE_X86 0x20
+
/** This is a component header - every entry in the CBFS
will have this header.
@@ -180,4 +192,3 @@ void *cbfs_find_file(const char *name, int type);
int cbfs_decompress(int algo, void *src, void *dst, int len);
struct cbfs_header *get_cbfs_header(void);
#endif
-
Dear coreboot folks,
the proprietary BIOS allows to disable/mute sound, when battery status
is low or the power cable is plugged in or out.
Is it possible to configure that with coreboot or ectool [1]?
src/ec/lenovo/h8 $ tail -9 h8.h
#define H8_EVENT_BAT0 0x4a
#define H8_EVENT_BAT0_STATE 0x4b
#define H8_EVENT_BAT1 0x4c
#define H8_EVENT_BAT1_STATE 0x4d
#define H8_EVENT_FN_F5 0x64
#define H8_EVENT_FN_F6 0x65
#endif
src/mainboard/lenovo/t60 $ git grep -i mute
acpi/platform.asl: \_SB.PCI0.LPCB.EC.MUTE(1)
Thanks,
Paul
[1] http://www.coreboot.org/Ectool