coreboot September 2011

coreboot@coreboot.org

40 participants
224 discussions

TPM support for SeaBIOS -- looking for a tester on real hardware
by Stefan Berger 11 Sep '11

11 Sep '11

Hello! Would anybody be interested in testing the TPM support I added to SeaBIOS. I unfortunately don't have a motherboard myself where I could try it. I have added the support to SeaBIOS for the TPM device model in Qemu. What you would need for trying it is a motherboard with a TPM 1.2 on it. The SeaBIOS TPM support should recognize it, initialize the TPM and allow the user to enter another SeaBIOS menu. Regards, Stefan

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Re: [coreboot] TPM support for SeaBIOS -- looking for a tester on real hardware
by Stefan Berger 11 Sep '11

11 Sep '11

On 09/08/2011 05:22 PM, Marc Jones wrote: > On Wed, Sep 7, 2011 at 8:30 AM, Stefan Berger > <stefanb(a)linux.vnet.ibm.com> wrote: >> Hello! >> >> Would anybody be interested in testing the TPM support I added to SeaBIOS. >> I unfortunately don't have a motherboard myself where I could try it. I have >> added the support to SeaBIOS for the TPM device model in Qemu. What you >> would need for trying it is a motherboard with a TPM 1.2 on it. The SeaBIOS >> TPM support should recognize it, initialize the TPM and allow the user to >> enter another SeaBIOS menu. >> >> Regards, >> Stefan > > Hi Stefan, > > This is excelent stuff. i am at the Linux Plumbers Conf this week, but > I really want to try your TPM on hardware soon.I need to identify a > some hardwar e to test with and I'll keep you posted on my results. This is really good to hear. :-) Let me know how it goes. Stefan > Marc > > > >

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Re: [coreboot] barbarians at the gates
by Niklas Cholmkvist 11 Sep '11

11 Sep '11

Brendan Trotter typed: > A much better idea would be telling the retailer "Screw you, I'm > buying a motherboard with coreboot pre-installed directly from > coreboot.org because none of the products you sell mention coreboot > compatibility and I don't want to end up with something that doesn't > work". Retailers don't care why they made a sale as long as they make > a sale, but they do care about lost sales. On the main page http://www.coreboot.org/ which redirects to http://www.coreboot.org/Welcome_to_coreboot there's lots of information but I see no "get coreboot" anywhere. Maybe coreboot is still in its infant stages to go so boldly forward yet. -- Niklas Cholmkvist Public GPG/PGP key block ID: 1024D/C09E670B Fingerprint: 8487 ECE3 8ED9 870B BB56 95E7 9AD2 946A C09E 670B Key download: https://sites.google.com/site/towardsfloss/main-page/NiklasCholmkvist.asc [For authenticity and privacy on the internet with prime number based mathematics]

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Re: [coreboot] coreboot on dell vostro 1400?
by sharkx forever 10 Sep '11

10 Sep '11

Further info: # inteltool Intel CPU: Family 6, Model f Intel Northbridge: 8086:2a00 (PM965) Intel Southbridge: 8086:2815 (ICH8-M) # dmidecode # dmidecode 2.9 SMBIOS 2.4 present. 45 structures occupying 1977 bytes. Table at 0x000F7190. inetltool recognizes Northbridge as PM965 but lspci says GM965. I am not sure which one it is. I am not sure if is helpful, but the data sheet for Intel 965 Express Chipset Family can be found at: http://www.intel.com/design/chipsets/datashts/313053.htm If you need any more information about my system, please let me know.

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coreboot on dell vostro 1400?
by sharkx forever 10 Sep '11

10 Sep '11

Hi all, I have a dell vostro 1400 laptop and I would like to install coreboot on it. Could somebody let me know if it is possible? The laptop has: Intel(R) Core(TM)2 Duo T7500 @ 2.20GHz cpu. Intel 965GM Express chipset for integrated graphics. More detailed specifications can be found at: http://support.dell.com/support/edocs/systems/Vos1400/en/OM/specs.htm ============================================================== The output of "lspci -tvnn" is as follows: [ Note: I will be replacing Intel PRO/Wireless 4965 AGN card with Atheros ar9280 based mini card. So please consider atheros chipset based wireless card in place of the intel card. ] -[0000:00]-+-00.0 Intel Corporation Mobile PM965/GM965/GL960 Memory Controller Hub [8086:2a00] +-02.0 Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller [8086:2a02] +-02.1 Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller [8086:2a03] +-1a.0 Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #4 [8086:2834] +-1a.1 Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #5 [8086:2835] +-1a.7 Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #2 [8086:283a] +-1b.0 Intel Corporation 82801H (ICH8 Family) HD Audio Controller [8086:284b] +-1c.0-[0000:0b]-- +-1c.1-[0000:0c]----00.0 Intel Corporation PRO/Wireless 4965 AG or AGN [Kedron] Network Connection [8086:4229] +-1c.3-[0000:0d-0e]-- +-1c.5-[0000:09]----00.0 Broadcom Corporation NetLink BCM5906M Fast Ethernet PCI Express [14e4:1713] +-1d.0 Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #1 [8086:2830] +-1d.1 Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #2 [8086:2831] +-1d.2 Intel Corporation 82801H (ICH8 Family) USB UHCI Controller #3 [8086:2832] +-1d.7 Intel Corporation 82801H (ICH8 Family) USB2 EHCI Controller #1 [8086:2836] +-1e.0-[0000:03]--+-01.0 Ricoh Co Ltd R5C832 IEEE 1394 Controller [1180:0832] | +-01.1 Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter [1180:0822] | +-01.2 Ricoh Co Ltd R5C843 MMC Host Controller [1180:0843] | +-01.3 Ricoh Co Ltd R5C592 Memory Stick Bus Host Adapter [1180:0592] | \-01.4 Ricoh Co Ltd xD-Picture Card Controller [1180:0852] +-1f.0 Intel Corporation 82801HEM (ICH8M) LPC Interface Controller [8086:2815] +-1f.1 Intel Corporation 82801HBM/HEM (ICH8M/ICH8M-E) IDE Controller [8086:2850] +-1f.2 Intel Corporation 82801HBM/HEM (ICH8M/ICH8M-E) SATA IDE Controller [8086:2828] \-1f.3 Intel Corporation 82801H (ICH8 Family) SMBus Controller [8086:283e] ============================================================== # superiotool superiotool r3844 No Super I/O found # flashrom flashrom v0.9.1-r946 No coreboot table found. Found chipset "Intel ICH8M", enabling flash write... OK. This chipset supports the following protocols: FWH,SPI. Calibrating delay loop... OK. Found chip "Spansion S25FL008A" (1024 KB, SPI) at physical address 0xfff00000. Error: No filename specified. # ectool EC RAM: 00: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 10: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 20: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 30: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 40: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 50: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 60: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 70: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 80: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 90: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c a0: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c b0: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c c0: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c d0: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c e0: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c f0: 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c 5c Not dumping EC IDX RAM. =================================================================== Thanks.

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I865 memory controller status
by James Wall 09 Sep '11

09 Sep '11

Hello all, What is the status of the i865 memory controller? I have a board that all the other chips are supported but the memory controller is a big question mark.

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Patch merged into coreboot/master: 66367fa Replace while with do; while to avoid repetition
by gerrit＠coreboot.org 09 Sep '11

09 Sep '11

the following patch was just integrated into master: commit 66367fa77ecc1501bdb2b081370268442e45408d Author: Noe Rubinstein <nrubinstein(a)proformatique.com> Date: Thu May 5 15:44:40 2011 +0200 Replace while with do; while to avoid repetition Cosmetic only; replaces some 'while' loops with 'do; while' loops to avoid repetition. Replacement performed by the Ruby expression: t.gsub!(/^(\s*)([^\n\{]+)\n\1(while[^\n\{;]+)\n\s*\2/, "\\1do \\2\n\\1\\3;") Change-Id: Ie0a4fa622df881edeaab08f59bb888a903b864fd Signed-off-by: Noe Rubinstein <nrubinstein(a)proformatique.com> Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/183 for details. -gerrit

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Patch merged into coreboot/master: ca06106 Crank up CPU speed on Intel Core and Core2 CPUs
by gerrit＠coreboot.org 09 Sep '11

09 Sep '11

the following patch was just integrated into master: commit ca06106e0e8de1777aa311c4ea1c1fd45f7eee38 Author: Patrick Georgi <patrick.georgi(a)secunet.com> Date: Tue Aug 9 08:52:14 2011 +0200 Crank up CPU speed on Intel Core and Core2 CPUs The CPUs start on their slowest speed, and were left that way by coreboot. This change will speed up coreboot a bit, as well as systems that don't change the clock for whatever reason. Change-Id: Ia6225eea97299a473cf50eccc6c5e7de830b1ddc Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> See http://review.coreboot.org/176 for details. -gerrit

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Patch merged into coreboot/master: b8fe009 Report GSE chipset and warn if the code has been compiled for the wrong chipset.
by gerrit＠coreboot.org 09 Sep '11

09 Sep '11

the following patch was just integrated into master: commit b8fe009787a26f079b236a26ebc0c6e676c0c884 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Fri Apr 1 22:33:25 2011 +0200 Report GSE chipset and warn if the code has been compiled for the wrong chipset. It would be nicer to unify the code so that it does all detection at runtime instead of compile time (but that would also significantly increase code size) so if someone else wants to give it a shot... Change-Id: Idc67bdf7a6ff2b78dc8fc67a0da5ae7a4c0a3bf0 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> See http://review.coreboot.org/184 for details. -gerrit

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Patch merged into filo/master: 181d45d Set root device while probing boot_devices list
by gerrit＠coreboot.org 09 Sep '11

09 Sep '11

the following patch was just integrated into master: commit 181d45d266a3e4627c82690a745c0f08018f8cf5 Author: Mathias Krause <mathias.krause(a)secunet.com> Date: Mon Mar 8 11:43:32 2010 +0100 Set root device while probing boot_devices list This way we don't need to have absolute paths in the config file itself. Change-Id: Id1f27a08bd86bc9a872dd52347f19a55532a82e6 Signed-off-by: Mathias Krause <mathias.krause(a)secunet.com> Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> See http://review.coreboot.org/200 for details. -gerrit

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coreboot September 2011