Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/158
-gerrit
commit 53f8dcfa8f80cc9d1b5e27dd7eae93e9ab17446a
Author: Patrick Georgi <patrick.georgi(a)secunet.com>
Date: Thu Aug 18 11:36:03 2011 +0200
libpayload: export get_cbfs_header()
Keep in sync with coreboot's version.
Change-Id: I8a253446bd3b2ce9d05c6076a3f49f0260ecd5f9
Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com>
---
payloads/libpayload/include/cbfs_core.h | 1 +
payloads/libpayload/libcbfs/cbfs_core.c | 2 +-
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/payloads/libpayload/include/cbfs_core.h b/payloads/libpayload/include/cbfs_core.h
index fbe0081..70368f8 100644
--- a/payloads/libpayload/include/cbfs_core.h
+++ b/payloads/libpayload/include/cbfs_core.h
@@ -176,5 +176,6 @@ void *cbfs_find_file(const char *name, int type);
/* returns 0 on success, -1 on failure */
int cbfs_decompress(int algo, void *src, void *dst, int len);
+struct cbfs_header *get_cbfs_header(void);
#endif
diff --git a/payloads/libpayload/libcbfs/cbfs_core.c b/payloads/libpayload/libcbfs/cbfs_core.c
index 52ba58d..596fa3f 100644
--- a/payloads/libpayload/libcbfs/cbfs_core.c
+++ b/payloads/libpayload/libcbfs/cbfs_core.c
@@ -55,7 +55,7 @@
/* returns pointer to master header or 0xffffffff if not found */
-static struct cbfs_header *get_cbfs_header(void)
+struct cbfs_header *get_cbfs_header(void)
{
struct cbfs_header *header;
the following patch was just integrated into master:
commit 4cc740025729dc0f97d704119d2031c1f47e46bc
Author: Sven Schnelle <svens(a)stackframe.org>
Date: Wed Aug 17 18:10:11 2011 +0200
export get_cbfs_header()
Change-Id: I4b6afcee3d0d169e03165a7fb48cfaef2e8253e2
Signed-off-by: Sven Schnelle <svens(a)stackframe.org>
See http://review.coreboot.org/157 for details.
-gerrit
Frank Vibrans III (frank.vibrans(a)amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/138
-gerrit
commit b87aefed508d8d5945fdff200b7f53568a491622
Author: efdesign98 <efdesign98(a)gmail.com>
Date: Thu Aug 4 22:04:27 2011 -0600
AMD Torpedo platform updates
This update fixes warnings and supports as necessary
the Agesa infrastructure changes required to support
the AMD Family 14 cpu update to rev C0.
Change-Id: Ib08b49695b925b81f796bf299141fe6f845fdef8
Signed-off-by: Frank Vibrans <frank.vibrans(a)amd.com>
Signed-off-by: efdesign98 <efdesign98(a)gmail.com>
---
src/mainboard/amd/torpedo/BiosCallOuts.c | 24 ++++++----
src/mainboard/amd/torpedo/Kconfig | 18 ++++----
src/mainboard/amd/torpedo/Oem.h | 72 +++++++----------------------
src/mainboard/amd/torpedo/agesawrapper.h | 1 -
src/mainboard/amd/torpedo/get_bus_conf.c | 1 +
5 files changed, 43 insertions(+), 73 deletions(-)
diff --git a/src/mainboard/amd/torpedo/BiosCallOuts.c b/src/mainboard/amd/torpedo/BiosCallOuts.c
index 083bc25..cfc988a 100755
--- a/src/mainboard/amd/torpedo/BiosCallOuts.c
+++ b/src/mainboard/amd/torpedo/BiosCallOuts.c
@@ -525,6 +525,7 @@ AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
UINT32 GpioMmioAddr;
UINT8 Data8;
UINT16 Data16;
+ UINT8 TempData8;
FcnData = Data;
MemData = ConfigPtr;
@@ -539,25 +540,30 @@ AGESA_STATUS BiosHookBeforeDramInit (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
Data16 |= Data8;
AcpiMmioAddr = (UINT32)Data16 << 16;
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
- if(MemData->ParameterListPtr->DDR3Voltage == VOLT1_5) {
- Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
- Data8 |= BIT6;
- Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
- } else if(MemData->ParameterListPtr->DDR3Voltage == VOLT1_35) {
+
+ switch(MemData->ParameterListPtr->DDR3Voltage){
+ case VOLT1_35:
Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
- Data8 |= BIT6;
+ Data8 |= (UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
- } else if(MemData->ParameterListPtr->DDR3Voltage == VOLT1_25) {
+ break;
+ case VOLT1_25:
Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG179);
Data8 &= ~(UINT8)BIT6;
Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
- } else {}
+ break;
+ case VOLT1_5:
+ default:
+ Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178);
+ Data8 |= (UINT8)BIT6;
+ Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
+ }
return Status;
}
@@ -597,7 +603,7 @@ AGESA_STATUS BiosGnbPcieSlotReset (UINT32 Func, UINT32 Data, VOID *ConfigPtr)
GpioMmioAddr = AcpiMmioAddr + GPIO_BASE;
if (ResetInfo->ResetControl == DeassertSlotReset) {
- if (ResetInfo->ResetId & (BIT2+BIT3)) { //de-assert
+ if (ResetInfo->ResetId & BIT2+BIT3) { //de-assert
// [GPIO] GPIO45: PE_GPIO1 MXM_POWER_ENABLE, SET HIGH
Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG45);
if (Data8 & BIT7) {
diff --git a/src/mainboard/amd/torpedo/Kconfig b/src/mainboard/amd/torpedo/Kconfig
index 57d8c05..16d4cd0 100755
--- a/src/mainboard/amd/torpedo/Kconfig
+++ b/src/mainboard/amd/torpedo/Kconfig
@@ -1,7 +1,7 @@
#
# This file is part of the coreboot project.
#
-# Copyright (C) 2010 Advanced Micro Devices, Inc.
+# Copyright (C) 2011 Advanced Micro Devices, Inc.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
@@ -126,14 +126,6 @@ config SIO_PORT
hex
default 0x2e
-config DRIVERS_PS2_KEYBOARD
- bool
- default y
-
-config WARNINGS_ARE_ERRORS
- bool
- default n
-
config ONBOARD_VGA_IS_PRIMARY
bool
default y
@@ -180,6 +172,14 @@ config XHC_BIOS_ID
depends on XHC_BIOS
default "1022,7812"
+config DRIVERS_PS2_KEYBOARD
+ bool
+ default y
+
+config WARNINGS_ARE_ERRORS
+ bool
+ default n
+
config CONSOLE_POST
bool
depends on !NO_POST
diff --git a/src/mainboard/amd/torpedo/Oem.h b/src/mainboard/amd/torpedo/Oem.h
index 50bb506..a7109dc 100755
--- a/src/mainboard/amd/torpedo/Oem.h
+++ b/src/mainboard/amd/torpedo/Oem.h
@@ -1,57 +1,21 @@
-/*;********************************************************************************
-;
-; Copyright 2011 ADVANCED MICRO DEVICES, INC. All Rights Reserved.
-;
-; AMD is granting you permission to use this software (the Materials)
-; pursuant to the terms and conditions of your Software License Agreement
-; with AMD. This header does *NOT* give you permission to use the Materials
-; or any rights under AMD's intellectual property. Your use of any portion
-; of these Materials shall constitute your acceptance of those terms and
-; conditions. If you do not agree to the terms and conditions of the Software
-; License Agreement, please do not use any portion of these Materials.
-;
-; CONFIDENTIALITY: The Materials and all other information, identified as
-; confidential and provided to you by AMD shall be kept confidential in
-; accordance with the terms and conditions of the Software License Agreement.
-;
-; LIMITATION OF LIABILITY: THE MATERIALS AND ANY OTHER RELATED INFORMATION
-; PROVIDED TO YOU BY AMD ARE PROVIDED "AS IS" WITHOUT ANY EXPRESS OR IMPLIED
-; WARRANTY OF ANY KIND, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
-; MERCHANTABILITY, NONINFRINGEMENT, TITLE, FITNESS FOR ANY PARTICULAR PURPOSE,
-; OR WARRANTIES ARISING FROM CONDUCT, COURSE OF DEALING, OR USAGE OF TRADE.
-; IN NO EVENT SHALL AMD OR ITS LICENSORS BE LIABLE FOR ANY DAMAGES WHATSOEVER
-; (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS
-; INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF AMD'S NEGLIGENCE,
-; GROSS NEGLIGENCE, THE USE OF OR INABILITY TO USE THE MATERIALS OR ANY OTHER
-; RELATED INFORMATION PROVIDED TO YOU BY AMD, EVEN IF AMD HAS BEEN ADVISED OF
-; THE POSSIBILITY OF SUCH DAMAGES. BECAUSE SOME JURISDICTIONS PROHIBIT THE
-; EXCLUSION OR LIMITATION OF LIABILITY FOR CONSEQUENTIAL OR INCIDENTAL DAMAGES,
-; THE ABOVE LIMITATION MAY NOT APPLY TO YOU.
-;
-; AMD does not assume any responsibility for any errors which may appear in
-; the Materials or any other related information provided to you by AMD, or
-; result from use of the Materials or any related information.
-;
-; You agree that you will not reverse engineer or decompile the Materials.
-;
-; NO SUPPORT OBLIGATION: AMD is not obligated to furnish, support, or make any
-; further information, software, technical information, know-how, or show-how
-; available to you. Additionally, AMD retains the right to modify the
-; Materials at any time, without notice, and is not obligated to provide such
-; modified Materials to you.
-;
-; U.S. GOVERNMENT RESTRICTED RIGHTS: The Materials are provided with
-; "RESTRICTED RIGHTS." Use, duplication, or disclosure by the Government is
-; subject to the restrictions as set forth in FAR 52.227-14 and
-; DFAR252.227-7013, et seq., or its successor. Use of the Materials by the
-; Government constitutes acknowledgement of AMD's proprietary rights in them.
-;
-; EXPORT ASSURANCE: You agree and certify that neither the Materials, nor any
-; direct product thereof will be exported directly or indirectly, into any
-; country prohibited by the United States Export Administration Act and the
-; regulations thereunder, without the required authorization from the U.S.
-; government nor will be used for any purpose prohibited by the same.
-;*********************************************************************************/
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
#define BIOS_SIZE 0x04 //04 - 1MB
#define LEGACY_FREE 0x00
diff --git a/src/mainboard/amd/torpedo/agesawrapper.h b/src/mainboard/amd/torpedo/agesawrapper.h
index 979f743..c3209f5 100755
--- a/src/mainboard/amd/torpedo/agesawrapper.h
+++ b/src/mainboard/amd/torpedo/agesawrapper.h
@@ -118,7 +118,6 @@ typedef struct {
*---------------------------------------------------------------------------------------
*/
-//void brazos_platform_stage(void);
UINT32 agesawrapper_amdinitreset (void);
UINT32 agesawrapper_amdinitearly (void);
UINT32 agesawrapper_amdinitenv (void);
diff --git a/src/mainboard/amd/torpedo/get_bus_conf.c b/src/mainboard/amd/torpedo/get_bus_conf.c
index 436f6a8..f9b4c84 100755
--- a/src/mainboard/amd/torpedo/get_bus_conf.c
+++ b/src/mainboard/amd/torpedo/get_bus_conf.c
@@ -24,6 +24,7 @@
#include <stdint.h>
#include <stdlib.h>
#include <cpu/amd/amdfam12.h>
+#include "SbEarly.h"
#include "agesawrapper.h"
Frank Vibrans III (frank.vibrans(a)amd.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/136
-gerrit
commit d76b656d3f891a398ad5d6f15e108fb5e218e81e
Author: efdesign98 <efdesign98(a)gmail.com>
Date: Thu Aug 4 21:49:08 2011 -0600
AMD Inagua platform updates
These changes update the Inagua platform for the AMD
Family 14 rev C0 cpu.
Change-Id: Idab88dda48f08877dbbd2de3136bdf0e54e31247
Signed-off-by: Frank Vibrans <frank.vibrans(a)amd.com>
Signed-off-by: efdesign98 <efdesign98(a)gmail.com>
---
src/mainboard/amd/inagua/Kconfig | 29 ++++++++++++++-
src/mainboard/amd/inagua/Makefile.inc | 4 +--
src/mainboard/amd/inagua/dimmSpd.c | 14 +++-----
src/mainboard/amd/inagua/dimmSpd.h | 63 +++++++++++++++++++++++++++++++++
4 files changed, 97 insertions(+), 13 deletions(-)
diff --git a/src/mainboard/amd/inagua/Kconfig b/src/mainboard/amd/inagua/Kconfig
index 8745125..64013df 100644
--- a/src/mainboard/amd/inagua/Kconfig
+++ b/src/mainboard/amd/inagua/Kconfig
@@ -134,10 +134,37 @@ config WARNINGS_ARE_ERRORS
bool
default n
-config FALLBACK_VGA_BIOS_ID
+config ONBOARD_VGA_IS_PRIMARY
+ bool
+ default y
+
+config VGA_BIOS
+ bool
+ default n
+
+#config VGA_BIOS_FILE
+# string "VGA BIOS path and filename"
+# depends on VGA_BIOS
+# default "rom/video/OntarioGenericVBios.bin"
+
+config VGA_BIOS_ID
string "VGA device PCI IDs"
depends on VGA_BIOS
default "1002,9802"
+config AHCI_ROM
+ bool
+ default n
+
+#config AHCI_ROM_FILE
+# string "AHCI ROM path and filename"
+# depends on AHCI_ROM
+# default "rom/ahci/sb800.bin"
+
+config AHCI_ROM_ID
+ string "AHCI device PCI IDs"
+ depends on AHCI_ROM
+ default "1002,4391"
+
endif # BOARD_AMD_INAGUA
diff --git a/src/mainboard/amd/inagua/Makefile.inc b/src/mainboard/amd/inagua/Makefile.inc
index 564d196..ceb1853 100755
--- a/src/mainboard/amd/inagua/Makefile.inc
+++ b/src/mainboard/amd/inagua/Makefile.inc
@@ -32,6 +32,4 @@ ramstage-y += PlatformGnbPcie.c
ramstage-y += reset.c
ramstage-y += pmio.c
-AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
-subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY14) += ../../../../$(AGESA_ROOT)
-#subdirs-$(CONFIG_AMD_CIMX) += ../../../vendorcode/amd/cimx
+subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY14) += $(src)/vendorcode/amd/agesa/f14
diff --git a/src/mainboard/amd/inagua/dimmSpd.c b/src/mainboard/amd/inagua/dimmSpd.c
index 94e63e1..a17eae4 100644
--- a/src/mainboard/amd/inagua/dimmSpd.c
+++ b/src/mainboard/amd/inagua/dimmSpd.c
@@ -30,17 +30,13 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
* SPD address table - porting required
*/
-static const UINT8 spdAddressLookup [2] [2] [4] = // socket, channel, dimm
+#define SMBUS_BASE_ADDR 0xB00
+static const UINT8 spdAddressLookup [1] [2] [1] = // socket, channel, dimm
{
// socket 0
{
- {0xA0, 0xA2}, // channel 0 dimms
- {0xA4, 0xA8}, // channel 1 dimms
- },
- // socket 1
- {
- {0x00, 0x00}, // channel 0 dimms
- {0x00, 0x00}, // channel 1 dimms
+ {0xA0}, // channel 0 dimms
+ {0xA2}, // channel 1 dimms
},
};
@@ -160,7 +156,7 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
spdAddress = spdAddressLookup [info->SocketId] [info->MemChannelId] [info->DimmId];
if (spdAddress == 0) return AGESA_ERROR;
- ioBase = 0xB00;
+ ioBase = SMBUS_BASE_ADDR;
setupFch (ioBase);
return readspd (ioBase, spdAddress, (void *) info->Buffer, 128);
}
diff --git a/src/mainboard/amd/inagua/dimmSpd.h b/src/mainboard/amd/inagua/dimmSpd.h
new file mode 100755
index 0000000..069c34a
--- /dev/null
+++ b/src/mainboard/amd/inagua/dimmSpd.h
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*----------------------------------------------------------------------------------------
+ * M O D U L E S U S E D
+ *----------------------------------------------------------------------------------------
+ */
+
+#ifndef _DIMMSPD_H_
+#define _DIMMSPD_H_
+
+#include "Porting.h"
+#include "AGESA.h"
+
+/*----------------------------------------------------------------------------------------
+ * D E F I N I T I O N S A N D M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------
+ * T Y P E D E F S A N D S T R U C T U R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------
+ * P R O T O T Y P E S O F L O C A L F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------
+ * E X P O R T E D F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+AGESA_STATUS
+AmdMemoryReadSPD (
+ IN UINT32 Func,
+ IN UINT32 Data,
+ IN OUT AGESA_READ_SPD_PARAMS *SpdData
+ );
+
+/*---------------------------------------------------------------------------------------
+ * L O C A L F U N C T I O N S
+ *---------------------------------------------------------------------------------------
+ */
+
+#endif