coreboot February 2011

coreboot@coreboot.org

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283 discussions

Re: [coreboot] [PATCH] disabling microcode update
by Xavi Drudis Ferran 21 Feb '11

21 Feb '11

> I've suggested it and got 2 expressions of interest and negative > reaction, so I did it. > Sorry, I meant "and no negative reaction". I'd just add that it's just an option, and I've made the default to update microcode, liek it did before, so it has no effect unless you explicity unselect it.

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[PATCH] add SPD address mapping to i945
by Sven Schnelle 21 Feb '11

21 Feb '11

The current code works only with dual channel if Channel 0 uses SPD address 0x50/0x51, while the second channel has to use 0x52/0x53. For hardware that uses other addresses (like the ThinkPad X60) this means we get only one module running instead of both. This patch adds a second parameter to sdram_initialize, which is an array with 2 * DIMM_SOCKETS members. It should contain the SPD addresses for every single DIMM socket. If NULL is given as the second parameter, the code uses the old addressing scheme. --- src/mainboard/getac/p470/romstage.c | 2 +- src/mainboard/ibase/mb899/romstage.c | 2 +- src/mainboard/intel/d945gclf/romstage.c | 2 +- src/mainboard/kontron/986lcd-m/romstage.c | 2 +- src/mainboard/lenovo/x60/romstage.c | 3 +- src/mainboard/roda/rk886ex/romstage.c | 2 +- src/northbridge/intel/i945/raminit.c | 75 +++++++++++++++-------------- src/northbridge/intel/i945/raminit.h | 3 +- 8 files changed, 47 insertions(+), 44 deletions(-)

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[commit] r6374 - in trunk/src: mainboard/getac/p470 mainboard/ibase/mb899 mainboard/intel/d945gclf mainboard/kontron/986lcd-m mainboard/lenovo/x60 mainboard/roda/rk886ex northbridge/intel/i945
by repository service 21 Feb '11

21 Feb '11

Author: svens Date: Mon Feb 21 10:39:17 2011 New Revision: 6374 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6374 Log: [i945] Add SPD adress mapping The current code works only with dual channel if Channel 0 uses SPD address 0x50/0x51, while the second channel has to use 0x52/0x53. For hardware that uses other addresses (like the ThinkPad X60) this means we get only one module running instead of both. This patch adds a second parameter to sdram_initialize, which is an array with 2 * DIMM_SOCKETS members. It should contain the SPD addresses for every single DIMM socket. If NULL is given as the second parameter, the code uses the old addressing scheme. Signed-off-by: Sven Schnelle <svens(a)stackframe.org> Acked-by: Patrick Georgi <patrick(a)georgi-clan.de> Modified: trunk/src/mainboard/getac/p470/romstage.c trunk/src/mainboard/ibase/mb899/romstage.c trunk/src/mainboard/intel/d945gclf/romstage.c trunk/src/mainboard/kontron/986lcd-m/romstage.c trunk/src/mainboard/lenovo/x60/romstage.c trunk/src/mainboard/roda/rk886ex/romstage.c trunk/src/northbridge/intel/i945/raminit.c trunk/src/northbridge/intel/i945/raminit.h Modified: trunk/src/mainboard/getac/p470/romstage.c ============================================================================== --- trunk/src/mainboard/getac/p470/romstage.c Sat Feb 19 15:51:31 2011 (r6373) +++ trunk/src/mainboard/getac/p470/romstage.c Mon Feb 21 10:39:17 2011 (r6374) @@ -332,7 +332,7 @@ dump_spd_registers(); #endif - sdram_initialize(boot_mode); + sdram_initialize(boot_mode, NULL); /* Perform some initialization that must run before stage2 */ early_ich7_init(); Modified: trunk/src/mainboard/ibase/mb899/romstage.c ============================================================================== --- trunk/src/mainboard/ibase/mb899/romstage.c Sat Feb 19 15:51:31 2011 (r6373) +++ trunk/src/mainboard/ibase/mb899/romstage.c Mon Feb 21 10:39:17 2011 (r6374) @@ -283,7 +283,7 @@ dump_spd_registers(); #endif - sdram_initialize(boot_mode); + sdram_initialize(boot_mode, NULL); /* Perform some initialization that must run before stage2 */ early_ich7_init(); Modified: trunk/src/mainboard/intel/d945gclf/romstage.c ============================================================================== --- trunk/src/mainboard/intel/d945gclf/romstage.c Sat Feb 19 15:51:31 2011 (r6373) +++ trunk/src/mainboard/intel/d945gclf/romstage.c Mon Feb 21 10:39:17 2011 (r6374) @@ -243,7 +243,7 @@ dump_spd_registers(); #endif - sdram_initialize(boot_mode); + sdram_initialize(boot_mode, NULL); /* Perform some initialization that must run before stage2 */ early_ich7_init(); Modified: trunk/src/mainboard/kontron/986lcd-m/romstage.c ============================================================================== --- trunk/src/mainboard/kontron/986lcd-m/romstage.c Sat Feb 19 15:51:31 2011 (r6373) +++ trunk/src/mainboard/kontron/986lcd-m/romstage.c Mon Feb 21 10:39:17 2011 (r6374) @@ -382,7 +382,7 @@ dump_spd_registers(); #endif - sdram_initialize(boot_mode); + sdram_initialize(boot_mode, NULL); /* Perform some initialization that must run before stage2 */ early_ich7_init(); Modified: trunk/src/mainboard/lenovo/x60/romstage.c ============================================================================== --- trunk/src/mainboard/lenovo/x60/romstage.c Sat Feb 19 15:51:31 2011 (r6373) +++ trunk/src/mainboard/lenovo/x60/romstage.c Mon Feb 21 10:39:17 2011 (r6374) @@ -294,6 +294,7 @@ { u32 reg32; int boot_mode = 0; + const u8 spd_addrmap[2 * DIMM_SOCKETS] = { 0x50, 0x52, 0x51, 0x53 }; if (bist == 0) enable_lapic(); @@ -357,7 +358,7 @@ dump_spd_registers(); #endif - sdram_initialize(boot_mode); + sdram_initialize(boot_mode, spd_addrmap); /* Perform some initialization that must run before stage2 */ early_ich7_init(); Modified: trunk/src/mainboard/roda/rk886ex/romstage.c ============================================================================== --- trunk/src/mainboard/roda/rk886ex/romstage.c Sat Feb 19 15:51:31 2011 (r6373) +++ trunk/src/mainboard/roda/rk886ex/romstage.c Mon Feb 21 10:39:17 2011 (r6374) @@ -320,7 +320,7 @@ dump_spd_registers(); #endif - sdram_initialize(boot_mode); + sdram_initialize(boot_mode, NULL); /* Perform some initialization that must run before stage2 */ early_ich7_init(); Modified: trunk/src/northbridge/intel/i945/raminit.c ============================================================================== --- trunk/src/northbridge/intel/i945/raminit.c Sat Feb 19 15:51:31 2011 (r6373) +++ trunk/src/northbridge/intel/i945/raminit.c Mon Feb 21 10:39:17 2011 (r6374) @@ -54,6 +54,15 @@ #define RAM_EMRS_2 (0x1 << 21) #define RAM_EMRS_3 (0x2 << 21) +static int get_dimm_spd_address(struct sys_info *sysinfo, int device) +{ + if (sysinfo->spd_addresses) + return sysinfo->spd_addresses[device]; + else + return DIMM0 + device; + +} + static inline int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); @@ -367,7 +376,8 @@ */ for (i=0; i<(2 * DIMM_SOCKETS); i++) { - u8 reg8, device = DIMM0 + i; + int device = get_dimm_spd_address(sysinfo, i); + u8 reg8; /* Initialize the socket information with a sane value */ sysinfo->dimm[i] = SYSINFO_DIMM_NOT_POPULATED; @@ -458,7 +468,7 @@ continue; /* Is the current DIMM a stacked DIMM? */ - if (spd_read_byte(DIMM0 + i, SPD_NUM_DIMM_BANKS) & (1 << 4)) + if (spd_read_byte(get_dimm_spd_address(sysinfo, i), SPD_NUM_DIMM_BANKS) & (1 << 4)) sysinfo->package = 1; } } @@ -475,7 +485,8 @@ for (i=0; i<2*DIMM_SOCKETS; i++) { if (sysinfo->dimm[i] != SYSINFO_DIMM_NOT_POPULATED) - cas_mask &= spd_read_byte(DIMM0 + i, SPD_ACCEPTABLE_CAS_LATENCIES); + cas_mask &= spd_read_byte(get_dimm_spd_address(sysinfo, i), + SPD_ACCEPTABLE_CAS_LATENCIES); } if(!cas_mask) { @@ -529,6 +540,7 @@ PRINTK_DEBUG("Probing Speed %d\n", j); for (i=0; i<2*DIMM_SOCKETS; i++) { + int device = get_dimm_spd_address(sysinfo, i); int current_cas_mask; PRINTK_DEBUG(" DIMM: %d\n", i); @@ -536,7 +548,7 @@ continue; } - current_cas_mask = spd_read_byte(DIMM0 + i, SPD_ACCEPTABLE_CAS_LATENCIES); + current_cas_mask = spd_read_byte(device, SPD_ACCEPTABLE_CAS_LATENCIES); while (current_cas_mask) { int highest_supported_cas = 0, current_cas = 0; @@ -562,11 +574,11 @@ idx = highest_supported_cas - current_cas; PRINTK_DEBUG("idx=%d, ", idx); - PRINTK_DEBUG("tCLK=%x, ", spd_read_byte(DIMM0 + i, spd_lookup_table[2*idx])); - PRINTK_DEBUG("tAC=%x", spd_read_byte(DIMM0 + i, spd_lookup_table[(2*idx)+1])); + PRINTK_DEBUG("tCLK=%x, ", spd_read_byte(device, spd_lookup_table[2*idx])); + PRINTK_DEBUG("tAC=%x", spd_read_byte(device, spd_lookup_table[(2*idx)+1])); - if (spd_read_byte(DIMM0 + i, spd_lookup_table[2*idx]) <= ddr2_speeds_table[2*j] && - spd_read_byte(DIMM0 + i, spd_lookup_table[(2*idx)+1]) <= ddr2_speeds_table[(2*j)+1]) { + if (spd_read_byte(device, spd_lookup_table[2*idx]) <= ddr2_speeds_table[2*j] && + spd_read_byte(device, spd_lookup_table[(2*idx)+1]) <= ddr2_speeds_table[(2*j)+1]) { PRINTK_DEBUG(": OK\n"); break; } @@ -630,7 +642,7 @@ if (sysinfo->dimm[i] == SYSINFO_DIMM_NOT_POPULATED) continue; - reg8 = spd_read_byte(DIMM0 + i, SPD_MIN_ACTIVE_TO_PRECHARGE_DELAY); + reg8 = spd_read_byte(get_dimm_spd_address(sysinfo, i), SPD_MIN_ACTIVE_TO_PRECHARGE_DELAY); if (!reg8) { die("Invalid tRAS value.\n"); } @@ -670,7 +682,7 @@ if (sysinfo->dimm[i] == SYSINFO_DIMM_NOT_POPULATED) continue; - reg8 = spd_read_byte(DIMM0 + i, SPD_MIN_ROW_PRECHARGE_TIME); + reg8 = spd_read_byte(get_dimm_spd_address(sysinfo, i), SPD_MIN_ROW_PRECHARGE_TIME); if (!reg8) { die("Invalid tRP value.\n"); } @@ -711,7 +723,7 @@ if (sysinfo->dimm[i] == SYSINFO_DIMM_NOT_POPULATED) continue; - reg8 = spd_read_byte(DIMM0 + i, SPD_MIN_RAS_TO_CAS_DELAY); + reg8 = spd_read_byte(get_dimm_spd_address(sysinfo, i), SPD_MIN_RAS_TO_CAS_DELAY); if (!reg8) { die("Invalid tRCD value.\n"); } @@ -751,7 +763,7 @@ if (sysinfo->dimm[i] == SYSINFO_DIMM_NOT_POPULATED) continue; - reg8 = spd_read_byte(DIMM0 + i, SPD_WRITE_RECOVERY_TIME); + reg8 = spd_read_byte(get_dimm_spd_address(sysinfo, i), SPD_WRITE_RECOVERY_TIME); if (!reg8) { die("Invalid tWR value.\n"); } @@ -832,7 +844,8 @@ if (sysinfo->dimm[i] == SYSINFO_DIMM_NOT_POPULATED) continue; - refresh = spd_read_byte(DIMM0 + i, SPD_REFRESH) & ~(1 << 7); + refresh = spd_read_byte(get_dimm_spd_address(sysinfo, i), + SPD_REFRESH) & ~(1 << 7); /* 15.6us */ if (!refresh) @@ -860,7 +873,8 @@ if (sysinfo->dimm[i] == SYSINFO_DIMM_NOT_POPULATED) continue; - if (!(spd_read_byte(DIMM0 + i, SPD_SUPPORTED_BURST_LENGTHS) & SPD_BURST_LENGTH_8)) + if (!(spd_read_byte(get_dimm_spd_address(sysinfo, i), + SPD_SUPPORTED_BURST_LENGTHS) & SPD_BURST_LENGTH_8)) die("Only DDR-II RAM with burst length 8 is supported by this chipset.\n"); } } @@ -1392,12 +1406,13 @@ unsigned long side2; }; -static struct dimm_size sdram_get_dimm_size(u16 device) +static struct dimm_size sdram_get_dimm_size(struct sys_info *sysinfo, u16 dimmno) { /* Calculate the log base 2 size of a DIMM in bits */ struct dimm_size sz; - int value, low, rows, columns; + int value, low, rows, columns, device; + device = get_dimm_spd_address(sysinfo, dimmno); sz.side1 = 0; sz.side2 = 0; @@ -1480,9 +1495,10 @@ if (sysinfo->dimm[i] == SYSINFO_DIMM_NOT_POPULATED) continue; - sz = sdram_get_dimm_size(DIMM0 + i); + sz = sdram_get_dimm_size(sysinfo, i); - sysinfo->banks[i] = spd_read_byte(DIMM0 + i, SPD_NUM_BANKS_PER_SDRAM); /* banks */ + sysinfo->banks[i] = spd_read_byte(get_dimm_spd_address(sysinfo, i), + SPD_NUM_BANKS_PER_SDRAM); /* banks */ if (sz.side1 < 30) die("DDR-II rank size smaller than 128MB is not supported.\n"); @@ -1574,7 +1590,7 @@ continue; } - device = DIMM0 + i; + device = get_dimm_spd_address(sysinfo, i); value = spd_read_byte(device, SPD_NUM_ROWS); /* rows */ columnsrows = (value & 0x0f); @@ -3039,7 +3055,7 @@ /** * @param boot_path: 0 = normal, 1 = reset, 2 = resume from s3 */ -void sdram_initialize(int boot_path) +void sdram_initialize(int boot_path, const u8 *spd_addresses) { struct sys_info sysinfo; u8 reg8, cas_mask; @@ -3049,6 +3065,7 @@ memset(&sysinfo, 0, sizeof(sysinfo)); sysinfo.boot_path = boot_path; + sysinfo.spd_addresses = spd_addresses; /* Look at the type of DIMMs and verify all DIMMs are x8 or x16 width */ sdram_get_dram_configuration(&sysinfo); Modified: trunk/src/northbridge/intel/i945/raminit.h ============================================================================== --- trunk/src/northbridge/intel/i945/raminit.h Sat Feb 19 15:51:31 2011 (r6373) +++ trunk/src/northbridge/intel/i945/raminit.h Mon Feb 21 10:39:17 2011 (r6374) @@ -63,11 +63,12 @@ u8 banks[2 * DIMM_SOCKETS]; u8 banksize[2 * 2 * DIMM_SOCKETS]; + const u8 *spd_addresses; } __attribute__ ((packed)); void receive_enable_adjust(struct sys_info *sysinfo); -void sdram_initialize(int boot_path); +void sdram_initialize(int boot_path, const u8 *sdram_addresses); unsigned long get_top_of_ram(void); int fixup_i945_errata(void); void udelay(u32 us);

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[commit] r6373 - in trunk/src/superio: fintek/f71805f fintek/f71859 fintek/f71863fg fintek/f71872 fintek/f71889 intel/i3100 ite/it8712f ite/it8716f smsc/lpc47b272 smsc/lpc47b397 smsc/lpc47m10x smsc...
by repository service 21 Feb '11

21 Feb '11

Author: ruik Date: Sat Feb 19 15:51:31 2011 New Revision: 6373 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6373 Log: It turns out that the code which enables specific LDN is somewhat buggy. Instead of enable the device the device gets disabled. However after some time the serial line gets back, most likely some "enable resources" might fix it. I'm attaching patch which somewhat fixes the problem and changes the function to look same in all superio code. Some boards even did not convert the dev->enabled to 0,1 values. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Acked-by: Peter Stuge <peter(a)stuge.se> Modified: trunk/src/superio/fintek/f71805f/superio.c trunk/src/superio/fintek/f71859/superio.c trunk/src/superio/fintek/f71863fg/superio.c trunk/src/superio/fintek/f71872/superio.c trunk/src/superio/fintek/f71889/superio.c trunk/src/superio/intel/i3100/superio.c trunk/src/superio/ite/it8712f/superio.c trunk/src/superio/ite/it8716f/superio.c trunk/src/superio/smsc/lpc47b272/superio.c trunk/src/superio/smsc/lpc47b397/superio.c trunk/src/superio/smsc/lpc47m10x/superio.c trunk/src/superio/smsc/lpc47m15x/superio.c trunk/src/superio/smsc/lpc47n217/superio.c trunk/src/superio/smsc/lpc47n227/superio.c trunk/src/superio/smsc/smscsuperio/superio.c trunk/src/superio/via/vt1211/vt1211.c trunk/src/superio/winbond/w83627dhg/superio.c trunk/src/superio/winbond/w83627ehg/superio.c trunk/src/superio/winbond/w83627hf/superio.c trunk/src/superio/winbond/w83697hf/superio.c Modified: trunk/src/superio/fintek/f71805f/superio.c ============================================================================== --- trunk/src/superio/fintek/f71805f/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/fintek/f71805f/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -77,7 +77,7 @@ { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); - (dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_conf_state(dev); } Modified: trunk/src/superio/fintek/f71859/superio.c ============================================================================== --- trunk/src/superio/fintek/f71859/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/fintek/f71859/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -74,7 +74,7 @@ { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); - (dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_conf_state(dev); } Modified: trunk/src/superio/fintek/f71863fg/superio.c ============================================================================== --- trunk/src/superio/fintek/f71863fg/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/fintek/f71863fg/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -81,7 +81,7 @@ { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); - (dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_conf_state(dev); } Modified: trunk/src/superio/fintek/f71872/superio.c ============================================================================== --- trunk/src/superio/fintek/f71872/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/fintek/f71872/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -79,7 +79,7 @@ { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); - (dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_conf_state(dev); } Modified: trunk/src/superio/fintek/f71889/superio.c ============================================================================== --- trunk/src/superio/fintek/f71889/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/fintek/f71889/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -80,7 +80,7 @@ { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); - (dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_conf_state(dev); } Modified: trunk/src/superio/intel/i3100/superio.c ============================================================================== --- trunk/src/superio/intel/i3100/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/intel/i3100/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -78,7 +78,7 @@ { pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, dev->enabled); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_ext_func_mode(dev); } Modified: trunk/src/superio/ite/it8712f/superio.c ============================================================================== --- trunk/src/superio/ite/it8712f/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/ite/it8712f/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -99,7 +99,7 @@ { pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, dev->enabled); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_ext_func_mode(dev); } Modified: trunk/src/superio/ite/it8716f/superio.c ============================================================================== --- trunk/src/superio/ite/it8716f/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/ite/it8716f/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -122,7 +122,7 @@ { pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, dev->enabled); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_ext_func_mode(dev); } Modified: trunk/src/superio/smsc/lpc47b272/superio.c ============================================================================== --- trunk/src/superio/smsc/lpc47b272/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/smsc/lpc47b272/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -105,7 +105,7 @@ { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, (dev->enabled) ? 1 : 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_conf_state(dev); } Modified: trunk/src/superio/smsc/lpc47b397/superio.c ============================================================================== --- trunk/src/superio/smsc/lpc47b397/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/smsc/lpc47b397/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -116,7 +116,7 @@ { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, (dev->enabled) ? 1 : 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_conf_state(dev); } Modified: trunk/src/superio/smsc/lpc47m10x/superio.c ============================================================================== --- trunk/src/superio/smsc/lpc47m10x/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/smsc/lpc47m10x/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -103,7 +103,7 @@ { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, (dev->enabled) ? 1 : 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_conf_state(dev); } Modified: trunk/src/superio/smsc/lpc47m15x/superio.c ============================================================================== --- trunk/src/superio/smsc/lpc47m15x/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/smsc/lpc47m15x/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -87,7 +87,7 @@ { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, (dev->enabled) ? 1 : 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_conf_state(dev); } Modified: trunk/src/superio/smsc/lpc47n217/superio.c ============================================================================== --- trunk/src/superio/smsc/lpc47n217/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/smsc/lpc47n217/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -119,7 +119,7 @@ static void lpc47n217_pnp_enable(device_t dev) { pnp_enter_conf_state(dev); - lpc47n217_pnp_set_enable(dev, (dev->enabled) ? 1 : 0); + lpc47n217_pnp_set_enable(dev, !!dev->enabled); pnp_exit_conf_state(dev); } Modified: trunk/src/superio/smsc/lpc47n227/superio.c ============================================================================== --- trunk/src/superio/smsc/lpc47n227/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/smsc/lpc47n227/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -116,7 +116,7 @@ void lpc47n227_pnp_enable(device_t dev) { pnp_enter_conf_state(dev); - lpc47n227_pnp_set_enable(dev, (dev->enabled) ? 1 : 0); + lpc47n227_pnp_set_enable(dev, !!dev->enabled); pnp_exit_conf_state(dev); } Modified: trunk/src/superio/smsc/smscsuperio/superio.c ============================================================================== --- trunk/src/superio/smsc/smscsuperio/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/smsc/smscsuperio/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -193,7 +193,7 @@ { smsc_pnp_enter_conf_state(dev); pnp_set_logical_device(dev); - (dev->enabled) ? pnp_set_enable(dev, 1) : pnp_set_enable(dev, 0); + pnp_set_enable(dev, !!dev->enabled); smsc_pnp_exit_conf_state(dev); } Modified: trunk/src/superio/via/vt1211/vt1211.c ============================================================================== --- trunk/src/superio/via/vt1211/vt1211.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/via/vt1211/vt1211.c Sat Feb 19 15:51:31 2011 (r6373) @@ -186,12 +186,9 @@ static void vt1211_pnp_enable(device_t dev) { - if (dev->enabled) - return; - pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_ext_func_mode(dev); } Modified: trunk/src/superio/winbond/w83627dhg/superio.c ============================================================================== --- trunk/src/superio/winbond/w83627dhg/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/winbond/w83627dhg/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -76,12 +76,9 @@ static void w83627dhg_pnp_enable(device_t dev) { - if (!dev->enabled) - return; - pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_ext_func_mode(dev); } Modified: trunk/src/superio/winbond/w83627ehg/superio.c ============================================================================== --- trunk/src/superio/winbond/w83627ehg/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/winbond/w83627ehg/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -160,12 +160,9 @@ static void w83627ehg_pnp_enable(device_t dev) { - if (dev->enabled) - return; - pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_ext_func_mode(dev); } Modified: trunk/src/superio/winbond/w83627hf/superio.c ============================================================================== --- trunk/src/superio/winbond/w83627hf/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/winbond/w83627hf/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -179,12 +179,9 @@ static void w83627hf_pnp_enable(device_t dev) { - if (dev->enabled) - return; - pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_ext_func_mode(dev); } Modified: trunk/src/superio/winbond/w83697hf/superio.c ============================================================================== --- trunk/src/superio/winbond/w83697hf/superio.c Thu Feb 17 21:48:45 2011 (r6372) +++ trunk/src/superio/winbond/w83697hf/superio.c Sat Feb 19 15:51:31 2011 (r6373) @@ -70,12 +70,9 @@ static void w83697hf_pnp_enable(device_t dev) { - if (dev->enabled) - return; - pnp_enter_ext_func_mode(dev); pnp_set_logical_device(dev); - pnp_set_enable(dev, 0); + pnp_set_enable(dev, !!dev->enabled); pnp_exit_ext_func_mode(dev); }

3 2

Question: Can I change DQS settings from a user program
by Fengwei Zhang 21 Feb '11

21 Feb '11

Hi all, I have a K8 board. I tried to change the DQS settings from a user program, but I failed. I printed out the DQS settings before my pci_write_long() function. I also printed out the DQS settings after the pci writing. The results are same. My question is: can I change DQS settings from a user program? or I need to enable some registers before changing? Thanks, Fengwei

2 1

P2B-LS help: Onboard SCSI BIOS failed to boot
by Keith Hui 20 Feb '11

20 Feb '11

I am trying (again) to get the Adaptec SCSI on my P2B-LS to initialize properly with coreboot. But it won't boot. Attached is a serial log of what happened. After compiling coreboot I checked out SeaBIOS through git and added the SCSI option rom extracted from my factory bios. A port and a few other resources is assigned, but no IRQ. The SCSI option rom would initialize, I can press the hotkey to enter the utility, but that's it. That option rom hangs before getting any responses from the SCSI hardware. I am trying to set up SerialICE to see what is going on. Just looking for some insights before I reach that point. I have to jumper off the SCSI to get it to boot. I don't know if this has anything to do but the Ultra2 port on my other P2B-LS is fubared and nothing plugged there would register. Afraid the same may befall this board too. Thanks Keith

3 4

Support for the new siemens sitemp_g1p1 mainboard
by Josef Kellermann 18 Feb '11

18 Feb '11

Attached patch provides support for the siemens sitemp_g1p1 mainboard. This board is similar to the amd dbm690t. I adapt the code from dbm690t according to customer requirement specification. I have been testing Linux as well as Windows XP booting on this board. Signed-off-by: Josef Kellermann <seppk(a)arcor.de> <mailto://seppk@arcor.de>

2 1

support request - SOYO 7VBA133
by José Neto 18 Feb '11

18 Feb '11

Can you support my motherboard??? Here is some links for the mb specs: http://www.motherboard.cz/mb/soyo/sy-7vba133.htm http://utils.hns.net.in/drivers/Motherboard/Soyo/SY-7vba133/m7vba13312.pdf http://utils.hns.net.in/drivers/Motherboard/Soyo/SY-7vba133/ Here is the attachment link in case of this don't work http://www.cefet-to.org/~06103245/coreboot/

4 5

Boot problem with HP Proliant dl145 g3
by jarray52 jarray52 18 Feb '11

18 Feb '11

Hi, Coreboot with SeaBIOS as payload won't boot on my HP Proliant dl145 g3. This server is listed as being supported. I followed the instructions at http://www.coreboot.org/Build_HOWTO and used the version of SeaBIOS automatically downloaded by coreboot for the payload. I'm using the most recent stable version of Coreboot. The serial console output can be found at: http://coreboot.pastebin.com/4WY6mBch I tried compiling with the toolchains in Fedora 14, Ubuntu 10.04 LTS, and the reference toolchain included with coreboot. Thanks, Jay

1 0

[commit] r6372 - trunk
by repository service 17 Feb '11

17 Feb '11

Author: stepan Date: Thu Feb 17 21:48:45 2011 New Revision: 6372 URL: https://tracker.coreboot.org/trac/coreboot/changeset/6372 Log: Handle compiler options for source classes more generically Signed-off-by: Patrick Georgi <patrick.georgi(a)secunet.com> Acked-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Modified: trunk/Makefile Modified: trunk/Makefile ============================================================================== --- trunk/Makefile Thu Feb 17 21:47:49 2011 (r6371) +++ trunk/Makefile Thu Feb 17 21:48:45 2011 (r6372) @@ -202,6 +202,11 @@ $(call add-class,romstage) $(call add-class,driver) $(call add-class,smm) +ramstage-S-ccopts:=-DASSEMBLY +romstage-c-ccopts:=-D__PRE_RAM__ +romstage-S-ccopts:=-DASSEMBLY -D__PRE_RAM__ +driver-S-ccopts:=-DASSEMBLY + $(call add-special-class,cbfs-files) cbfs-files-handler= \ @@ -266,21 +271,19 @@ # $1 obj class (ramstage, romstage, driver, smm) # $2 source suffix (c, S) # $3 additional compiler flags +ifn$(EMPTY)def $(1)-objs_$(2)_template de$(EMPTY)fine $(1)-objs_$(2)_template $(obj)/$$(1).$(1).o: src/$$(1).$(2) $(obj)/config.h @printf " CC $$$$(subst $$$$(obj)/,,$$$$(@))\n" $(CC) $(3) -MMD $$$$(CFLAGS) -c -o $$$$@ $$$$< en$(EMPTY)def +end$(EMPTY)if endef -$(eval $(call create_cc_template,ramstage,c)) -$(eval $(call create_cc_template,ramstage,S,-DASSEMBLY)) -$(eval $(call create_cc_template,romstage,c,-D__PRE_RAM__)) -$(eval $(call create_cc_template,romstage,S,-DASSEMBLY -D__PRE_RAM__)) -$(eval $(call create_cc_template,driver,c)) -$(eval $(call create_cc_template,driver,S,-DASSEMBLY)) -$(eval $(call create_cc_template,smm,c)) -$(eval $(call create_cc_template,smm,S)) +filetypes-of-class=$(subst .,,$(sort $(suffix $($(1)-srcs)))) +$(foreach class,$(classes), \ + $(foreach type,$(call filetypes-of-class,$(class)), \ + $(eval $(call create_cc_template,$(class),$(type),$($(class)-$(type)-ccopts))))) foreach-src=$(foreach file,$($(1)-srcs),$(eval $(call $(1)-objs_$(subst .,,$(suffix $(file)))_template,$(subst src/,,$(basename $(file)))))) $(eval $(foreach class,$(classes),$(call foreach-src,$(class))))

1 0

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coreboot February 2011