coreboot September 2010

coreboot@coreboot.org

58 participants
324 discussions

SuperMicro h8dmr-i2 slowness in v4
by Nick Lemberger 17 Sep '10

17 Sep '10

Hello, I'm having some trouble with current releases of coreboot on a Supermicro H8DMR-i2. The initial problem, it takes about 2 minutes to show the: "coreboot-4.0-r5775 Fri Sep 3 14:55:01 CDT 2010 starting..." and equally as long after the warm reset. The second, the system freezes at "Clearning initial memory region:" for about a half hour before proceeding. After that, everything works as expected. There has been some list chatter about a similar problem with the H8DME, but that was based upon the H8DMR code so it's odd that it found it's way here. I've attached the full serial output if that's at all useful. Vitals: Vendor: Supermicro MainBoard: H8DMR-i2 NorthVBridge: Fam10h SouthBridge: NVIDIA MCP55 Super I/O: Winbond™ W83627EHG CPU: AMD Opteron Any suggestions are welcome, TIA, Nicholas Lemberger ---snip--- coreboot-4.0-r5775 Fri Sep 3 14:55:01 CDT 2010 starting... BSP Family_Model: 00100f23 *sysinfo range: [000cc000,000cdfa0] bsp_apicid = 00 cpu_init_detectedx = 00000000 microcode: equivalent rev id = 0x1022, current patch id = 0x00000000 microcode: rev id (1062) does not match this patch. microcode: Not updated! Fix microcode_updates[] POST: 0x33 cpuSetAMDMSR done POST: 0x34 Enter amd_ht_init() AMD_CB_EventNotify() event class: 05 event: 1004 data: 04 00 00 01 AMD_CB_ManualBUIDSwapList() AMD_CB_EventNotify() event class: 05 event: 2006 data: 04 00 02 ff Exit amd_ht_init() POST: 0x35 cpuSetAMDPCI 00 done cpuSetAMDPCI 01 done Prep FID/VID Node:00 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c3310f23 F3xD8: 03001b12 F3xDC: 0000542c Prep FID/VID Node:01 F3x80: e600a681 F3x84: a0e641e6 F3xD4: c3310f23 F3xD8: 03001b12 F3xDC: 0000542c setup_remote_node: 01 done Start node 01 done. POPSOSTT: :0 0xx3630 Co rcoer0 es0:t ar t--e-d :{ 0A1PI sItD a=rt _04o thNeODrE_cIoD r=es (01) oOinREiIt Dn =o de00:} 0 0-- - c :rmiesc:ro c03o de S etqarutiv aotlhenetr creovre id- n o= de0ix1d0: 202,0 ccurorreesnt: 0p3at ::i niidt =n o0dex0: 000010 0 PPPOO0cO0oSSSTrTT :es m0:00ixxcx r0333o0300 c o dSe :ccctoooa rrrrreeetexx xv :::o ti hd --e -(r---- --1 0 c6{o{{ r 2 )AAAePP Pd-IIICCCo eInIIDoDsD d===eni OcOR00d0:21 3m 0NNaNtOO1O DDcDhEE EcII ItDDoD r h=ei==s s00: 0p 000 a0tC3CCO OI hRREEE.PII --:-: - e i:===c r0000PPPOox231OOS}SSc3}} T TTo7:d x ----0-00:sx t Na cc 3330or00mmmiiitt c erudrr oocccop dcaccooorraopoorddeeetd eeaeexxx:::d:p:: i ! eece Fqqiq------iuudu:ii---xi v vv {a{{ma*al O ilAceeAAeAPnPPrnnPtt ItIIoCCc 0C I1rIIorreeDseDDd evv tv=a ==_ uii ri 0d0pdd0t5e7 6d a d N=Nt==N 2 2=22=02=D0*D0E xE[xExI1IA1I]1D 0D0DP0 2 DtM , ,, 2c0s p0 0cc11tcu1Su uu aCCrerCrrrrOOttrOAeReeRReEEdMnEnnIttII t- D DD S*p pp=aa==R a At tt 00P0ccc hh2d h13} } }o0 n3 i ii-dd-es-d- - - r i-=-== n t0 c0c00c00rfiexmmmi0i00itd_ _ s 5 r0ro0o00oi*cd c0c00o00ovAo0d0d00diPed e0e00: nn eetesmmmiiqaqtqiuacccuguieiirrrrooov2vvtaaeccca loalldooddedpee d eeneit:ctt*:: i drrrArrree:eeePe vvvv vv0 0 iii4ii6idsdddd 1)0 0 ( ( a(=11=r1= 0 00 t0e06066x2dx2x21)1) t ttt 02*2dd2d2o 2oo2,e,eA,e ss sP c c c unu0unnroor7rortrttrsete e nmanmnmtatarta t t ttecpcpcpadhahaht t hhhhhh cc 3000 i iiisPsiisd d O d p pSpaT==a=a tt: t0ccc 00xxxhhh00x00... 0 0mm0m0i0 r 0ii0cc00c ceccoo00oBoo0 ogdiddmmmieiiene: c:cc:r Fr roNoNNIoccocooDoVotott dId deuuueDe: :ppp: d M ddraarSraetetteRv eveev 0d dd!!iix!id ddc 0 FFF (i(0(ii1xx11x10 00060mmm662227iii)c))1ccrr r d0oododooxccoceoee2ooddsdss0eae e nn_6_n_ouoou0up1tptth0h1 d mmaa4maatatt at0teteesscxcsch[[[h4h c ]]] tt0t h i teetctctccc p p 0ppuupup3a aSSaSte SD cthAhAhAPOMMM... M MM nodededemSSiR iRiRc c 0c rrxr o3dooddco9occoonon eP: e : avvavtit i iinnNTNnNoiiio:otttttt 0 ___ufxuuffiipi3ppdddddada tiieddeedEddnd___ss!!!sd ttt FFFaaaFiiiIgggeexxxDe2nneeep0ppuuu1S1SSeee4t ttAAA0MxMMDDD4McMMSSS0RR0R 4c0 d3ddooo n m c d_ipiinn5ni5iittt__n__fffuimiiddd:v0vviii1dd __ssstttaaagggeee222 aaapppiiiccciiiddd::: 000765 POST: 0x3b fill_mem_ctrl() POST: 0x3d POST: 0x40 raminit_amdmct() raminit_amdmct begin: Node: 00 base: 00 limit: 3ffffff BottomIO: e00000 Node: 01 base: 4200000 limit: 81fffff BottomIO: e00000 Copy dram map from Node 0 to Node 01 raminit_amdmct end: POST: 0x41 v_esp=000cbf38 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region:

6 26

[commit] r5817 - trunk/src/cpu/amd/model_10xxx
by repository service 17 Sep '10

17 Sep '10

Author: mjones Date: Fri Sep 17 02:13:52 2010 New Revision: 5817 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5817 Log: Clear bit 35 of msr c001_102a in Fam10 rev C cores. Signed-off-by: Arne Georg Gleditsch <arne.gleditsch(a)numascale.com> Acked-by: Scott Duplichan <scott(a)notabs.org> Modified: trunk/src/cpu/amd/model_10xxx/defaults.h trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c Modified: trunk/src/cpu/amd/model_10xxx/defaults.h ============================================================================== --- trunk/src/cpu/amd/model_10xxx/defaults.h Thu Sep 16 23:36:44 2010 (r5816) +++ trunk/src/cpu/amd/model_10xxx/defaults.h Fri Sep 17 02:13:52 2010 (r5817) @@ -91,7 +91,7 @@ { BU_CFG2, AMD_DRBH_Cx , AMD_PTYPE_ALL, 0x00000000, 1 << (35-32), - 0x00000000, 1 << (35-32) }, /* Erratum 343 (set to 0 after CAR, in post_cache_as_ram() ) */ + 0x00000000, 1 << (35-32) }, /* Erratum 343 (set to 0 after CAR, in post_cache_as_ram()/model_10xxx_init() ) */ }; Modified: trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c ============================================================================== --- trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c Thu Sep 16 23:36:44 2010 (r5816) +++ trunk/src/cpu/amd/model_10xxx/model_10xxx_init.c Fri Sep 17 02:13:52 2010 (r5817) @@ -113,9 +113,11 @@ msr.hi &= ~(1 << (46 - 32)); wrmsr(NB_CFG_MSR, msr); - /* Clear ClLinesToNbDis */ msr = rdmsr(BU_CFG2_MSR); + /* Clear ClLinesToNbDis */ msr.lo &= ~(1 << 15); + /* Clear bit 35 as per Erratum 343 */ + msr.hi &= ~(1 << (35-32)); wrmsr(BU_CFG2_MSR, msr); /* Write protect SMM space with SMMLOCK. */

1 0

Re: [coreboot] Ali m1541
by Luc Verhaegen 16 Sep '10

16 Sep '10

On Wed, Sep 15, 2010 at 06:08:54PM +0200, Anders Jenbo wrote: > Sorry i was mistaking, it is Socket 7 old :p > Well, the good side of the ali is that the docs are available. But if it is the p5a, the asus specific superio will trump whatever effort that could happen. But, why bother? Find a chipset and superio that are supported, buy some board that hasn't been implemented yet from like ebay. There is tons of options there. This will get you much more recent hardware, which, when working well, gives you a freer system, that you can use yourself afterwards. Makes things more useful for the world, and give yourself more satisfaction. So forget the ali chipsets. Luc Verhaegen.

3 2

[help] A K8/RS780/SB710 board MCE error
by Liu Tao 16 Sep '10

16 Sep '10

Hello everyone, I'm porting coreboot v4 to a k8-rs780-sb710 based mainboard, and use amd/mahogany and amd/tilapia_fam10 codes as the reference. Now coreboot boots the board and filo loads linux,but the board crashes at a MCE error during booting process. I'm not very know the detail about the MCE, so any suggestions will be appreciated, thanks very much. The mainboard architecture: CPU: socket F Opteron 2210 EE get_cpu_rev EAX=0x40f13 (1 cpu, dual core) DIMM: DDR2 333M (x1 / x2) HT Link0: off HT Link1: RS780->SB710 HT Link2: off VGA off GFX off PCIE off coreboot code revision: modified on r5692 The MCE/panic message: HARDWARE ERROR CPU 0: Machine Check Exception: 4 Bank 0: f658a00000000833 TSC 572507f34 ADDR 6000 This is not a software problem! Run through mcelog --ascii to decode and contact your hardware vendor Kernel panic - not syncing: Machine check ------------[ cut here ]------------ WARNING: at kernel/smp.c:331 smp_call_function_mask+0x32/0x1ec() Modules linked in: Supported: Yes Pid: 1, comm: swapper Tainted: G M 2.6.27.19-5-default #1 Call Trace: [<ffffffff8020d9f9>] show_trace_log_lvl+0x41/0x58 [<ffffffff80496a74>] dump_stack+0x69/0x6f [<ffffffff8023bfba>] warn_on_slowpath+0x51/0x77 [<ffffffff8025b1c5>] smp_call_function_mask+0x32/0x1ec [<ffffffff8025b3a8>] smp_call_function+0x29/0x2e [<ffffffff8021a04a>] native_smp_send_stop+0x1a/0x26 [<ffffffff80496b36>] panic+0xbc/0x169 [<ffffffff80216366>] mce_log+0x0/0x7e [<ffffffff80216740>] do_machine_check+0x31e/0x3cd [<ffffffff8020d27f>] machine_check+0x7f/0x90 [<ffffffff802126c8>] setup_trampoline+0x20/0x30 [<ffffffff804919a5>] native_cpu_up+0x31e/0xc64 [<ffffffff80493d17>] _cpu_up+0x9a/0x11c [<ffffffff80493df4>] cpu_up+0x5b/0x6f [<ffffffff8095b708>] kernel_init+0xe1/0x1eb [<ffffffff8020cf49>] child_rip+0xa/0x11 ---[ end trace 4eaa2a86a8e2da22 ]--- mcelog --k8 --ascii HARDWARE ERROR CPU 0: Machine Check Exception: 4 Bank 0: f658a00000000833 TSC 572507f34 ADDR 6000 This is not a software problem! Run through mcelog --ascii to decode and contact your hardware vendor HARDWARE ERROR CPU 0 0 data cache TSC 572507f34 Data cache ECC error (syndrome b1) bit45 = uncorrected ecc error bit57 = processor context corrupt bit61 = error uncorrected bit62 = error overflow (multiple errors) bus error 'local node origin, request didn't time out data read mem transaction memory access, level generic' STATUS f658a00000000833 MCGSTATUS 4 This is not a software problem! Run through mcelog --ascii to decode and contact your hardware vendor Attached is the detailed boot message. -- Regards, Liu Tao

2 3

[commit] r5816 - trunk/payloads/external/tint
by repository service 16 Sep '10

16 Sep '10

Author: mjones Date: Thu Sep 16 23:36:44 2010 New Revision: 5816 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5816 Log: Add default libpayload build, xcompile, and lpgcc setup to tint. Signed-off-by: Marc Jones <marc.jones(a)gmail.com> Acked-by: Peter Stuge <peter(a)stuge.se> Acked-by: Myles Watson <mylesgw(a)gmail.com> Modified: trunk/payloads/external/tint/libpayload_tint.patch Modified: trunk/payloads/external/tint/libpayload_tint.patch ============================================================================== --- trunk/payloads/external/tint/libpayload_tint.patch Thu Sep 16 23:04:54 2010 (r5815) +++ trunk/payloads/external/tint/libpayload_tint.patch Thu Sep 16 23:36:44 2010 (r5816) @@ -1,15 +1,94 @@ Patch tint 0.03b to be usable as coreboot payload, linked against -the libpayload library. +the libpayload library. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> -diff -Naur tint-0.03b.orig/config.h tint-0.03b/config.h ---- tint-0.03b.orig/config.h 2001-12-08 00:03:24.000000000 +0100 -+++ tint-0.03b/config.h 2008-04-11 22:19:35.000000000 +0200 + +Add default libpayload build, xcompile, and lpgcc setup to tint. + +Signed-off-by: Marc Jones <marc.jones(a)gmail.com> + +diff -rupN tintorig/Makefile tint/Makefile +--- tintorig/Makefile 2005-07-17 05:30:54.000000000 -0600 ++++ tint/Makefile 2010-08-23 18:06:24.671875000 -0600 +@@ -28,6 +28,65 @@ + # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ++$(if $(wildcard .xcompile),,$(eval $(shell bash ./xcompile.sh &> .xcompile))) ++include .xcompile ++ ++LIBCONFIG_PATH := ../libpayload ++LIBPAYLOAD_DIR := ./libpayloadbin ++LPCC := $(LIBPAYLOAD_DIR)/libpayload/bin/lpgcc ++LPAS := $(LIBPAYLOAD_DIR)/libpayload/bin/lpas ++HAVE_LIBPAYLOAD := $(wildcard $(LIBPAYLOAD_DIR)/libpayload/lib/libpayload.a) ++LIB_CONFIG ?= defconfig ++ ++# CFLAGS := -Wall -Werror -Os ++CFLAGS := -Wall -g -Os ++TARGET := tint ++OBJS := $(TARGET).o engine.o io.o utils.o ++ ++# Make is silent per default, but 'make V=1' will show all compiler calls. ++ifneq ($(V),1) ++Q := @ ++endif ++ ++all: $(TARGET).elf ++# printf" CC $(CC)\n" ++ ++$(TARGET).elf: $(OBJS) libpayload ++ $(Q)printf " LPCC $(subst $(shell pwd)/,,$(@))\n" ++ $(Q)$(LPCC) -o $@ $(OBJS) ++ $(Q)$(OBJCOPY) --only-keep-debug $@ tint.debug ++ $(Q)$(OBJCOPY) --strip-debug $@ ++ $(Q)$(OBJCOPY) --add-gnu-debuglink=tint.debug $@ ++ ++%.o: %.c libpayload ++ $(Q)printf " LPCC $(subst $(shell pwd)/,,$(@))\n" ++ $(Q)$(LPCC) $(CFLAGS) $(CPPFLAGS) -c -o $@ $< ++ ++%.S.o: %.S libpayload ++ $(Q)printf " LPAS $(subst $(shell pwd)/,,$(@))\n" ++ $(Q)$(LPAS) $(ASFLAGS) --32 -o $@ $< ++ ++ifneq ($(strip $(HAVE_LIBPAYLOAD)),) ++libpayload: ++ $(Q)printf "Found Libpayload $(LIBPAYLOAD_DIR).\n" ++else ++libpayload: ++ $(Q)printf "Building libpayload @ $(LIBCONFIG_PATH).\n" ++ $(Q)make -C $(LIBCONFIG_PATH) distclean ++ $(Q)make -C $(LIBCONFIG_PATH) $(LIB_CONFIG) ++ $(Q)make -C $(LIBCONFIG_PATH) DESTDIR=$(shell pwd)/$(LIBPAYLOAD_DIR) install ++endif ++ ++clean: ++ $(Q)rm -f $(TARGET).elf $(TARGET).debug *.o ++ $(Q)rm .xcompile ++ ++distclean: clean ++ $(Q)rm -rf $(LIBPAYLOAD_DIR) ++ ++# Original tint targets ++ifdef $(UNUSED) ++ + #CROSS = arm-linux- + + bindir = $(DESTDIR)/usr/games +@@ -110,3 +169,4 @@ clean: + distclean: clean + $(MAKE) -C debian clean + ++endif +diff -rupN tintorig/config.h tint/config.h +--- tintorig/config.h 2001-12-07 16:03:24.000000000 -0700 ++++ tint/config.h 2010-01-27 13:59:18.000000000 -0700 @@ -29,7 +29,16 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - + +#include <libpayload.h> +#include <curses.h> +#define random(x) rand(x) @@ -21,31 +100,31 @@ +#if 0 const char scorefile[] = SCOREFILE; +#endif - + #endif /* #ifndef CONFIG_H */ -diff -Naur tint-0.03b.orig/engine.c tint-0.03b/engine.c ---- tint-0.03b.orig/engine.c 2005-07-17 13:26:22.000000000 +0200 -+++ tint-0.03b/engine.c 2008-04-11 22:19:35.000000000 +0200 +diff -rupN tintorig/engine.c tint/engine.c +--- tintorig/engine.c 2005-07-17 05:26:22.000000000 -0600 ++++ tint/engine.c 2010-01-27 13:59:18.000000000 -0700 @@ -27,8 +27,12 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - + +#include "config.h" + +#if 0 #include <stdlib.h> #include <string.h> +#endif - + #include "typedefs.h" #include "utils.h" -diff -Naur tint-0.03b.orig/io.c tint-0.03b/io.c ---- tint-0.03b.orig/io.c 2001-12-07 16:48:20.000000000 +0100 -+++ tint-0.03b/io.c 2008-04-11 22:19:35.000000000 +0200 +diff -rupN tintorig/io.c tint/io.c +--- tintorig/io.c 2001-12-07 08:48:20.000000000 -0700 ++++ tint/io.c 2010-01-27 13:59:18.000000000 -0700 @@ -27,9 +27,13 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - + +#include "config.h" + +#if 0 @@ -53,10 +132,10 @@ #include <sys/time.h> /* gettimeofday() */ #include <unistd.h> /* gettimeofday() */ +#endif - + #include <curses.h> - -@@ -70,7 +74,11 @@ + +@@ -70,7 +74,11 @@ static int in_timeleft; /* Initialize screen */ void io_init () { @@ -68,7 +147,7 @@ start_color (); curs_set (CURSOR_INVISIBLE); out_attr = A_NORMAL; -@@ -176,11 +184,17 @@ +@@ -176,11 +184,17 @@ void out_beep () /* Read a character. Please note that you MUST call in_timeout() before in_getch() */ int in_getch () { @@ -86,102 +165,62 @@ gettimeofday (&endtv,NULL); /* Timeout? */ if (ch == ERR) -@@ -198,6 +212,7 @@ +@@ -198,6 +212,7 @@ int in_getch () in_timeleft -= endtv.tv_usec; if (in_timeleft <= 0) in_timeleft = in_timetotal; } +#endif return ch; } - -diff -Naur tint-0.03b.orig/Makefile tint-0.03b/Makefile ---- tint-0.03b.orig/Makefile 2005-07-17 13:30:54.000000000 +0200 -+++ tint-0.03b/Makefile 2008-04-11 22:19:35.000000000 +0200 -@@ -28,6 +28,36 @@ - # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE - # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -+LIBPAYLOAD_DIR := ../libpayload -+CC := $(LIBPAYLOAD_DIR)/bin/lpgcc -+AS := $(LIBPAYLOAD_DIR)/bin/lpas -+# CFLAGS := -Wall -Werror -Os -+CFLAGS := -Wall -Os -+TARGET := tint -+OBJS := $(TARGET).o engine.o io.o utils.o -+ -+all: $(TARGET).elf -+ -+$(TARGET).elf: $(OBJS) -+ $(CC) -o $@ $(OBJS) -+ -+%.o: %.c -+ $(CC) $(CFLAGS) -c -o $@ $< -+ -+%.S.o: %.S -+ $(AS) --32 -o $@ $< -+ -+clean: -+ rm -f $(TARGET).elf *.o -+ -+distclean: clean -+ -+ -+ -+ -+ -+ifdef $(UNUSED) -+ - #CROSS = arm-linux- - - bindir = $(DESTDIR)/usr/games -@@ -110,3 +140,4 @@ - distclean: clean - $(MAKE) -C debian clean - -+endif -diff -Naur tint-0.03b.orig/tint.c tint-0.03b/tint.c ---- tint-0.03b.orig/tint.c 2005-07-17 13:26:43.000000000 +0200 -+++ tint-0.03b/tint.c 2008-04-11 22:19:35.000000000 +0200 -@@ -27,6 +27,7 @@ + +diff -rupN tintorig/tint.c tint/tint.c +--- tintorig/tint.c 2005-07-17 05:26:43.000000000 -0600 ++++ tint/tint.c 2010-08-23 18:13:53.281250000 -0600 +@@ -1,4 +1,3 @@ +- + /* + * Copyright (c) Abraham vd Merwe <abz(a)blio.net> + * All rights reserved. +@@ -27,6 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - + +#if 0 #include <stdlib.h> #include <stdio.h> #include <string.h> -@@ -34,6 +35,7 @@ +@@ -34,6 +34,7 @@ #include <pwd.h> #include <sys/types.h> #include <unistd.h> +#endif - + #include "typedefs.h" #include "utils.h" -@@ -321,6 +323,7 @@ +@@ -321,6 +322,7 @@ typedef struct time_t timestamp; } score_t; - + +#if 0 static void getname (char *name) { struct passwd *pw = getpwuid (geteuid ()); -@@ -337,7 +340,9 @@ +@@ -337,7 +339,9 @@ static void getname (char *name) name[NAMELEN - 1] = '\0'; } } +#endif - + +#if 0 static void err1 () { fprintf (stderr,"Error creating %s\n",scorefile); -@@ -349,10 +354,11 @@ +@@ -349,10 +353,11 @@ static void err2 () fprintf (stderr,"Error writing to %s\n",scorefile); exit (EXIT_FAILURE); } +#endif - + void showplayerstats (engine_t *engine) { - fprintf (stderr, @@ -189,83 +228,83 @@ "\n\t PLAYER STATISTICS\n\n\t" "Score %11d\n\t" "Efficiency %11d\n\t" -@@ -360,6 +366,7 @@ +@@ -360,6 +365,7 @@ void showplayerstats (engine_t *engine) GETSCORE (engine->score),engine->status.efficiency,GETSCORE (engine->score) / getsum ()); } - + +#if 0 static void createscores (int score) { FILE *handle; -@@ -394,7 +401,9 @@ +@@ -394,7 +400,9 @@ static void createscores (int score) fprintf (stderr,"%s",scoretitle); fprintf (stderr,"\t 1* %7d %s\n\n",score,scores[0].name); } +#endif - + +#if 0 static int cmpscores (const void *a,const void *b) { int result; -@@ -412,7 +421,9 @@ +@@ -412,7 +420,9 @@ static int cmpscores (const void *a,cons /* timestamps is equal */ return 0; } +#endif - + +#if 0 static void savescores (int score) { FILE *handle; -@@ -490,11 +501,13 @@ +@@ -490,11 +500,13 @@ static void savescores (int score) } fprintf (stderr,"\n"); } +#endif - + /***************************************************************************/ /***************************************************************************/ /***************************************************************************/ - + +#if 0 static void showhelp () { fprintf (stderr,"USAGE: tint [-h] [-l level] [-n]\n"); -@@ -504,9 +517,11 @@ +@@ -504,9 +516,11 @@ static void showhelp () fprintf (stderr," -d Draw vertical dotted lines\n"); exit (EXIT_FAILURE); } +#endif - + static void parse_options (int argc,char *argv[]) { +#if 0 int i = 1; while (i < argc) { -@@ -536,10 +551,12 @@ +@@ -536,10 +550,12 @@ static void parse_options (int argc,char } i++; } +#endif } - + static void choose_level () { +#if 0 char buf[NAMELEN]; - + do -@@ -549,6 +566,8 @@ +@@ -549,6 +565,8 @@ static void choose_level () buf[strlen (buf) - 1] = '\0'; } while (!str2int (&level,buf) || level < MINLEVEL || level > MAXLEVEL); +#endif + level = 1; } - + /***************************************************************************/ -@@ -663,8 +682,15 @@ +@@ -663,8 +681,15 @@ int main (int argc,char *argv[]) if (ch != 'q') { showplayerstats (&engine); @@ -273,21 +312,21 @@ savescores (GETSCORE (engine.score)); +#endif } -+ mvprintw(10, 10, "Bye."); ++ printf("Bye.\n"); + refresh(); -+ halt(); ++ for(;;); //halt(); +#if 0 exit (EXIT_SUCCESS); +#endif } - -diff -Naur tint-0.03b.orig/utils.c tint-0.03b/utils.c ---- tint-0.03b.orig/utils.c 2001-12-07 16:49:19.000000000 +0100 -+++ tint-0.03b/utils.c 2008-04-11 22:19:35.000000000 +0200 + +diff -rupN tintorig/utils.c tint/utils.c +--- tintorig/utils.c 2001-12-07 08:49:19.000000000 -0700 ++++ tint/utils.c 2010-01-27 13:59:18.000000000 -0700 @@ -27,9 +27,13 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ - + +#include "config.h" + +#if 0 @@ -295,10 +334,10 @@ #include <time.h> #include <limits.h> +#endif - + #include "typedefs.h" - -@@ -41,8 +45,11 @@ + +@@ -41,8 +45,11 @@ void rand_init () #ifdef USE_RAND srand (time (NULL)); #else @@ -308,9 +347,9 @@ + srandom (123); +#endif } - + /* -@@ -61,6 +68,7 @@ +@@ -61,6 +68,7 @@ int rand_value (int range) * Convert an str to long. Returns TRUE if successful, * FALSE otherwise. */ @@ -318,8 +357,88 @@ bool str2int (int *i,const char *str) { char *endptr; -@@ -69,3 +77,4 @@ +@@ -69,3 +77,4 @@ bool str2int (int *i,const char *str) return TRUE; } - + +#endif +diff -rupN tintorig/xcompile.sh tint/xcompile.sh +--- tintorig/xcompile.sh 1969-12-31 17:00:00.000000000 -0700 ++++ tint/xcompile.sh 2010-03-10 15:34:51.421875000 -0700 +@@ -0,0 +1,76 @@ ++#!/bin/bash ++ ++CONFIG=defconfig ++SCRIPT_DIR=`dirname "$0"` ++ ++for make in make gmake gnumake; do ++ if [ "`$make --version 2>/dev/null | grep -c GNU`" -gt 0 ]; then ++ MAKE=$make ++ break ++ fi ++done ++ ++GCCPREFIX=invalid ++for gccprefixes in `pwd`/$SCRIPT_DIR/../../util/crossgcc/xgcc/bin/i386-elf- i386-elf- ""; do ++ TMP=`mktemp /tmp/temp.XXXX` ++ echo "mov %eax, %eax" > ${TMP}.s ++ printf "\x7fELF" > ${TMP}.compare ++ if which ${gccprefixes}as 2>/dev/null >/dev/null; then ++ printf "" ++ else ++ continue ++ fi ++ if ${gccprefixes}as --32 -o ${TMP}.o ${TMP}.s; then ++ dd bs=4 count=1 if=${TMP}.o > ${TMP}.test 2>/dev/null ++ if cmp ${TMP}.test ${TMP}.compare; then ++ GCCPREFIX=$gccprefixes ++ rm -f $TMP ${TMP}.s ${TMP}.o ${TMP}.compare ${TMP}.test ++ break ++ fi ++ fi ++ rm -f $TMP ${TMP}.s ${TMP}.o ${TMP}.compare ${TMP}.test ++done ++ ++if [ "$GCCPREFIX" = "invalid" ]; then ++ echo no suitable gcc found ++ exit 1 ++fi ++ ++#MAKEFLAGS=" \ ++# AS=\"${GCCPREFIX}as --32\" \ ++# CC=\"${GCCPREFIX}gcc -m32\" \ ++# AR=\"${GCCPREFIX}ar\" \ ++# LD=\"${GCCPREFIX}ld -b elf32-i386\" \ ++# STRIP=\"${GCCPREFIX}strip\" \ ++# NM=\"${GCCPREFIX}nm\" \ ++# HOSTCC=gcc \ ++# -j \ ++#" ++ ++cat << afteroptions ++export AS:=${GCCPREFIX}as --32 ++export CC:=${GCCPREFIX}gcc -m32 ++export CPP:=${GCCPREFIX}cpp ++export AR:=${GCCPREFIX}ar ++export LD:=${GCCPREFIX}ld -b elf32-i386 ++export STRIP:=${GCCPREFIX}strip ++export NM:=${GCCPREFIX}nm ++export OBJCOPY:=${GCCPREFIX}objcopy ++export OBJDUMP:=${GCCPREFIX}objdump ++export HOSTCC:=gcc ++afteroptions ++ ++# Should we let the payload build libpayload or do it for them? ++#test -d ./build || ( ++# BUILDDIR=$PWD ++# cd ../libpayload ++# $MAKE distclean ++# cp configs/$CONFIG .config ++# $MAKE oldconfig ++# eval $MAKE $MAKEFLAGS ++# eval $MAKE $MAKEFLAGS DESTDIR=$BUILDDIR/build install ++# cd .. ++#) ++ ++# eval $MAKE -C $SCRIPT_DIR $MAKEFLAGS ++

1 0

Re: [coreboot] First coreboot build for Tyan s2895 K8WE mobo with seabios payload, computer starts, but graphical ubuntu 64bits is crashing
by Harald Gutmann 16 Sep '10

16 Sep '10

Hello Frederic, I'm sorry to get a bit "rude" in my answer, but here is what I want to say: "crashing on Ubuntu logo" Oh, that's really a nice description of what happens. No way to tell you what's the problem with your bios, without a more detailed error output. And yes you couldn't see a lot on your screen before booting Ubuntu, because coreboot is fast. My advice as a next step would be: Try to get an error log which is useful. Means, turn off the graphical stuff of Ubuntu, get a serial console, and a decent log of the failing boot process. Everything else will be a guessing around without a good chance to track the problem. BTW: That's one of the reasons why I don't like Ubuntu, people don't learn any more how kernel/boot messages look like, how much information is in there and how to interpret those messages. "Crashing Ubuntu logo" - This is as stupid as the new Ubuntu splash screen which indicates a loading bar, but at the end of the bar it starts in the beginning once again. There is not even a chance to guess in which part of booting problems occur. The same bars come around in Windows Vista/7 and iTunes setup and so on. But who whats to have a loading bar which does say exactly nothing? It seems that too much stuff gets just eye candy and showing the user that something is happening without any interesting information. Oh, once again sorry. But such things have the power to get me upset. ;) Kind regards, Harald On Thursday 16 September 2010 22:18:32 STEMMELIN, FREDERIC (FREDERIC)** CTR ** wrote: > Hello, > > this was my first try to build a coreboot bios ever, for my tyan s2895 > mobo. I get managed to build and burn the bios into a RD1 512KB bios > savior chip. The computer is booting, and then crashing on Ubuntu logo > (10.04 64bits version), so far so nice. > > Here is what i have done: > > My rom build computer is installed with Ubuntu 10.04 64bits version, with > build-essential and some other packages (flex bison git-core g++ gdb > libncurses5-dev doxygen iasl build-essential lzma-dev liblzma-dev) I > downloaded latest available verszion of payload seabios, with command "git > clone git://git.linuxtogo.org/home/kevin/seabios.git seabios". Then i have > adapted the config.h file as follow: > > #define CONFIG_COREBOOT 1 > #define CONFIG_DEBUG_SERIAL 1 > #define CONFIG_VGAHOOKS 1 > > The make command has build the file => out/bios.bin.elf 1048716 bytes > > Now i downloaded latest coreboot files, with a "svn co > svn://coreboot.org/coreboot/trunk coreboot" But, on first "make", i run > into troubles: > > build/coreboot_ram.o: In function `__wrap___umoddi3': > (.text+0x1223f): undefined reference to `__umoddi3' > build/coreboot_ram.o: In function `__wrap___moddi3': > (.text+0x1224a): undefined reference to `__moddi3' > build/coreboot_ram.o: In function `__wrap___udivdi3': > (.text+0x12255): undefined reference to `__udivdi3' > build/coreboot_ram.o: In function `__wrap___divdi3': > (.text+0x12260): undefined reference to `__divdi3' > collect2: ld returned 1 exit status > make: *** [build/coreboot_ram] Erreur 1 > > Then i find out (in some mailing list archive) that there is a integrated > compiling toolchain in the coreboot files, under "coreboot/util/crossgcc". > The command "./buildgcc" was succesfull even if it tooks some time, > enought to drink a coffee. > > On second "make" try, same compile errors. After some researches i find out > that i need to do a "rm -rf build" and a new "make menuconfig", but it > didnt solved my problem, same compilation errors :( I finnaly found out > that i need to also delete the .xcompile file. So after the "rm -rf > build", "rm .config", "rm .xcompile" and finally a "make menuconfig", the > "make" was working (i am not a programmer), yes. > > I burned the coreboot.rom into the RD1 chip, and restared the computer. I > then saw briefly a message about pressing F12 for some configuration. > After some other quick messages, which i coulnd read, i saw Ubuntu > starting and then crashing on the graphical logo. This is not really a > problem so far, as i was able to switch back to the original bios to get > computer up and running. > > > Now i have a 3 questions for you: > > Is the coreboot.rom 32bits only and is there any advantage to build a > 64bits version of the coreboot bios, as i intend to run a 64bits OS ? I > build the seabios with Ubuntu gcc 64bits version, it is compatible, can i > mix it, with the coreboot.rom build with i386-elf coreboot toolchain ? The > build seabios (bios.bin.elf) is about 1MB in size, how it is possible to > put it into a smaller 512KB chip inside coreboot.rom ? > > I didnt put VGA bios so far into the coreboot.rom. > > In my opinion, it would be a good idea to mention, somewhere in the build > howto, that there is a integrated toolchain in coreboot, and may be also > mention not to forget to delete the .xcompile file after the toolchain was > built. > > What are your advice for the next steps ? Put VGA bios into coreboot.rom, > change Ubuntu default start to non-graphical one ? I have attached the > .config file for coreboot (btw i used lzma compression for payload). > > Thank you very much, i really appreciate your help. > Frédéric Stemmelin

1 0

[patch] AMD Fam10 CPUID strings
by Marc Jones 16 Sep '10

16 Sep '10

Add more Fam10 CPUID strings from the AMD revision guide. Includes newer Phenom II. Signed-off-by: Marc Jones <marcj303(a)gmail.com> -- http://se-eng.com

2 2

[commit] r5815 - trunk/src/cpu/amd/model_10xxx
by repository service 16 Sep '10

16 Sep '10

Author: mjones Date: Thu Sep 16 23:04:54 2010 New Revision: 5815 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5815 Log: Add more Fam10 CPUID strings from the AMD revision guide. Includes newer Phenom II. Signed-off-by: Marc Jones <marcj303(a)gmail.com> Acked-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Modified: trunk/src/cpu/amd/model_10xxx/processor_name.c Modified: trunk/src/cpu/amd/model_10xxx/processor_name.c ============================================================================== --- trunk/src/cpu/amd/model_10xxx/processor_name.c Tue Sep 14 19:28:41 2010 (r5814) +++ trunk/src/cpu/amd/model_10xxx/processor_name.c Thu Sep 16 23:04:54 2010 (r5815) @@ -3,6 +3,7 @@ * * Copyright (C) 2007 Advanced Micro Devices, Inc. * Copyright (C) 2008 Peter Stuge + * Copyright (C) 2010 Marc Jones <marcj303(a)gmail.com> * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -73,12 +74,31 @@ static const struct str_s String1_socket_AM2[] = { {0x00, 0x00, 0x00, "AMD Athlon(tm) Processor LE-"}, {0x00, 0x00, 0x01, "AMD Sempron(tm) Processor LE-"}, + {0x00, 0x00, 0x02, "AMD Sempron(tm) 1"}, + {0x00, 0x00, 0x03, "AMD Athlon(tm) II 1"}, {0x00, 0x01, 0x00, "Dual-Core AMD Opteron(tm) Processor 13"}, {0x00, 0x01, 0x01, "AMD Athlon(tm)"}, + {0x00, 0x01, 0x03, "AMD Athlon(tm) II X2 2"}, + {0x00, 0x01, 0x04, "AMD Athlon(tm) II X2 B"}, + {0x00, 0x01, 0x05, "AMD Athlon(tm) II X2"}, + {0x00, 0x01, 0x07, "AMD Phenom(tm) II X2 5"}, + {0x00, 0x01, 0x0A, "AMD Phenom(tm) II X2"}, + {0x00, 0x01, 0x0B, "AMD Phenom(tm) II X2 B"}, {0x00, 0x02, 0x00, "AMD Phenom(tm)"}, + {0x00, 0x02, 0x03, "AMD Phenom(tm) II X3 B"}, + {0x00, 0x02, 0x04, "AMD Phenom(tm) II X3"}, + {0x00, 0x02, 0x07, "AMD Athlon(tm) II X3 4"}, + {0x00, 0x02, 0x08, "AMD Phenom(tm) II X3 7"}, + {0x00, 0x02, 0x0A, "AMD Athlon(tm) II X3"}, {0x00, 0x03, 0x00, "Quad-Core AMD Opteron(tm) Processor 13"}, {0x00, 0x03, 0x01, "AMD Phenom(tm) FX-"}, {0x00, 0x03, 0x02, "AMD Phenom(tm)"}, + {0x00, 0x03, 0x03, "AMD Phenom(tm) II X4 9"}, + {0x00, 0x03, 0x04, "AMD Phenom(tm) II X4 8"}, + {0x00, 0x03, 0x07, "AMD Phenom(tm) II X4 B"}, + {0x00, 0x03, 0x08, "AMD Phenom(tm) II X4"}, + {0x00, 0x03, 0x0A, "AMD Athlon(tm) II X4 6"}, + {0x00, 0x03, 0x0F, "AMD Athlon(tm) II X4"}, {0, 0, 0, NULL} }; @@ -93,28 +113,43 @@ {0x00, 0x00, 0x07, "70"}, {0x00, 0x00, 0x08, "80"}, {0x00, 0x00, 0x09, "90"}, + {0x00, 0x00, 0x09, " Processor"}, + {0x00, 0x00, 0x09, "u Processor"}, {0x00, 0x01, 0x00, "00 Dual-Core Processor"}, {0x00, 0x01, 0x01, "00e Dual-Core Processor"}, {0x00, 0x01, 0x02, "00B Dual-Core Processor"}, {0x00, 0x01, 0x03, "50 Dual-Core Processor"}, {0x00, 0x01, 0x04, "50e Dual-Core Processor"}, {0x00, 0x01, 0x05, "50B Dual-Core Processor"}, + {0x00, 0x01, 0x06, " Processor"}, + {0x00, 0x01, 0x07, "e Processor"}, + {0x00, 0x01, 0x09, "0 Processor"}, + {0x00, 0x01, 0x0A, "0e Processor"}, + {0x00, 0x01, 0x0B, "u Processor"}, {0x00, 0x02, 0x00, "00 Triple-Core Processor"}, {0x00, 0x02, 0x01, "00e Triple-Core Processor"}, {0x00, 0x02, 0x02, "00B Triple-Core Processor"}, {0x00, 0x02, 0x03, "50 Triple-Core Processor"}, {0x00, 0x02, 0x04, "50e Triple-Core Processor"}, {0x00, 0x02, 0x05, "50B Triple-Core Processor"}, + {0x00, 0x02, 0x06, " Processor"}, + {0x00, 0x02, 0x07, "e Processor"}, + {0x00, 0x02, 0x09, "0e Processor"}, + {0x00, 0x02, 0x0A, "0 Processor"}, {0x00, 0x03, 0x00, "00 Quad-Core Processor"}, {0x00, 0x03, 0x01, "00e Quad-Core Processor"}, {0x00, 0x03, 0x02, "00B Quad-Core Processor"}, {0x00, 0x03, 0x03, "50 Quad-Core Processor"}, {0x00, 0x03, 0x04, "50e Quad-Core Processor"}, {0x00, 0x03, 0x05, "50B Quad-Core Processor"}, + {0x00, 0x03, 0x06, " Processor"}, + {0x00, 0x03, 0x07, "e Processor"}, + {0x00, 0x03, 0x09, "0e Processor"}, {0x00, 0x03, 0x0A, " SE"}, {0x00, 0x03, 0x0B, " HE"}, {0x00, 0x03, 0x0C, " EE"}, {0x00, 0x03, 0x0D, " Quad-Core Processor"}, + {0x00, 0x03, 0x0E, "0 Processor"}, {0x00, 0xFF, 0x0F, ""}, {0, 0, 0, NULL} };

1 0

First coreboot build for Tyan s2895 K8WE mobo with seabios payload, computer starts, but graphical ubuntu 64bits is crashing
by STEMMELIN, FREDERIC (FREDERIC)** CTR ** 16 Sep '10

16 Sep '10

Hello, this was my first try to build a coreboot bios ever, for my tyan s2895 mobo. I get managed to build and burn the bios into a RD1 512KB bios savior chip. The computer is booting, and then crashing on Ubuntu logo (10.04 64bits version), so far so nice. Here is what i have done: My rom build computer is installed with Ubuntu 10.04 64bits version, with build-essential and some other packages (flex bison git-core g++ gdb libncurses5-dev doxygen iasl build-essential lzma-dev liblzma-dev) I downloaded latest available verszion of payload seabios, with command "git clone git://git.linuxtogo.org/home/kevin/seabios.git seabios". Then i have adapted the config.h file as follow: #define CONFIG_COREBOOT 1 #define CONFIG_DEBUG_SERIAL 1 #define CONFIG_VGAHOOKS 1 The make command has build the file => out/bios.bin.elf 1048716 bytes Now i downloaded latest coreboot files, with a "svn co svn://coreboot.org/coreboot/trunk coreboot" But, on first "make", i run into troubles: build/coreboot_ram.o: In function `__wrap___umoddi3': (.text+0x1223f): undefined reference to `__umoddi3' build/coreboot_ram.o: In function `__wrap___moddi3': (.text+0x1224a): undefined reference to `__moddi3' build/coreboot_ram.o: In function `__wrap___udivdi3': (.text+0x12255): undefined reference to `__udivdi3' build/coreboot_ram.o: In function `__wrap___divdi3': (.text+0x12260): undefined reference to `__divdi3' collect2: ld returned 1 exit status make: *** [build/coreboot_ram] Erreur 1 Then i find out (in some mailing list archive) that there is a integrated compiling toolchain in the coreboot files, under "coreboot/util/crossgcc". The command "./buildgcc" was succesfull even if it tooks some time, enought to drink a coffee. On second "make" try, same compile errors. After some researches i find out that i need to do a "rm -rf build" and a new "make menuconfig", but it didnt solved my problem, same compilation errors :( I finnaly found out that i need to also delete the .xcompile file. So after the "rm -rf build", "rm .config", "rm .xcompile" and finally a "make menuconfig", the "make" was working (i am not a programmer), yes. I burned the coreboot.rom into the RD1 chip, and restared the computer. I then saw briefly a message about pressing F12 for some configuration. After some other quick messages, which i coulnd read, i saw Ubuntu starting and then crashing on the graphical logo. This is not really a problem so far, as i was able to switch back to the original bios to get computer up and running. Now i have a 3 questions for you: Is the coreboot.rom 32bits only and is there any advantage to build a 64bits version of the coreboot bios, as i intend to run a 64bits OS ? I build the seabios with Ubuntu gcc 64bits version, it is compatible, can i mix it, with the coreboot.rom build with i386-elf coreboot toolchain ? The build seabios (bios.bin.elf) is about 1MB in size, how it is possible to put it into a smaller 512KB chip inside coreboot.rom ? I didnt put VGA bios so far into the coreboot.rom. In my opinion, it would be a good idea to mention, somewhere in the build howto, that there is a integrated toolchain in coreboot, and may be also mention not to forget to delete the .xcompile file after the toolchain was built. What are your advice for the next steps ? Put VGA bios into coreboot.rom, change Ubuntu default start to non-graphical one ? I have attached the .config file for coreboot (btw i used lzma compression for payload). Thank you very much, i really appreciate your help. Frédéric Stemmelin

1 0

Re: [coreboot] [PATCH] Add support for Asus M4A785-M, with build instructions
by Juhana Helovuo 16 Sep '10

16 Sep '10

On Sat, 2010-09-11 at 23:36 +0300, Juhana Helovuo wrote: > On Sat, 2010-09-11 at 07:03 -0600, Myles Watson wrote: > > > So it works with my updated patch, but not with the uma & reserved > > patches? Or does it not work at all? Does it still work with your > > previous patch set? > > > > Could you send a full log with the last working version and the first > > broken version from this list? > > > > 1. Your original patches > > 2. 5799 + my board patch > > 3. 2 + uma.diff > > 4. 3 + reserved.diff > > > > uma.diff & reserved.diff should be independent, so you could try > > 2+reserved.diff also > > > > Ok, now I have some test results: > > * 5792 + my original patches --> boots ok > * 5792 + your simplified patches --> boots ok > * 5792 + your simplified patches + uma.diff --> boots ok (log attached) > * 5792 + your simplified patches + uma.diff + reserved.diff --> does not > build, patch seems to be for newer trunk version > > * 5799 + my original patches --> SATA failure (log attached) > * 5799 + your simplified patches --> SATA failure > > * 5802 + your simplified patch for 5800 --> SATA failure > > My conclusion from this is that something in the trunk has broken > between 5792 and 5799. Sorry about spamming the list, but I managed to test a few cases more: * 5795 + your simplified patches --> boots ok * 5795 + your simplified patches + uma.diff + reserved.diff --> boots ok * 5796 + your simplified patches --> SATA failure It seems to me that the patches are ok, but some trunk change from 5795 to 5796 is causing the problems. Best regards, Juhana Helovuo

4 12

← Newer
1
...
16
17
18
19
20
21
22
...
33
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot September 2010