coreboot June 2010

coreboot@coreboot.org

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222 discussions

[PATCH] superiotool: libsuperiodetect
by Carl-Daniel Hailfinger 30 Jun '10

30 Jun '10

Using the superiotool code to detect SuperI/O chips can be really useful even for applications besides superiotool, e.g. flashrom. The biggest hurdle right now is the excessive size of the superiotool binary (>2.2 MB) which is still ~15 kB after lzma compression. That's simply unacceptable for a library. This minimally invasive patch makes all dumping code optional and reduces binary size for the probe-only case (libsuperiodetect) a lot. Binary sizes: 2268258 (before) 31600 (after) 98.6% reduction LZMA compressed and stripped binary sizes: 14778 (before) 6709 (after) 54.6% reduction To test compilation of superiotool with probe-only functionality, run make CONFIG_LIB=yes This patch is the first step towards libsuperiodetect, and more will have to follow. IMHO the {EOT} markers should be killed in libsuperiodetect, at least for the LDNs. Such an operation would have increased the size of the patch and would have reduced readability as well. Due to that, I skipped it, but I plan to do that in a later operation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: superiotool_libsuperiodetect/fintek.c =================================================================== --- superiotool_libsuperiodetect/fintek.c (Revision 5651) +++ superiotool_libsuperiodetect/fintek.c (Arbeitskopie) @@ -31,6 +31,7 @@ static const struct superio_registers reg_table[] = { {0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */ +#ifndef LIBSUPERIODETECT /* We assume reserved bits are read as 0. */ {NOLDN, NULL, {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a, @@ -75,11 +76,13 @@ {0xa, "PME, ACPI", {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT}, {0x00,0x00,NANA,0x06,0x1c,0x01,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */ {EOT}}}, {0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */ /* We assume reserved bits are read as 0. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a, 0x2b,0x2c,0x2d,EOT}, @@ -121,9 +124,11 @@ {0xa, "PME, ACPI", {0x30,0xf0,0xf1,0xf4,0xf5,EOT}, {0x00,0x00,0x01,0x06,0x1c,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x0604, "F71805F/FG", { /* We assume reserved bits are read as 0. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT}, {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}}, @@ -150,6 +155,7 @@ {0xa, "PME", {0x30,0xf0,0xf1,EOT}, {0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x0581, "F8000", { /* Fintek/ASUS F8000 */ {EOT}}}, @@ -181,7 +187,9 @@ get_superio_name(reg_table, did), vid, did, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio("Fintek", reg_table, port, did, LDN_SEL); +#endif /* ! LIBSUPERIODETECT */ exit_conf_mode_winbond_fintek_ite_8787(port); } Index: superiotool_libsuperiodetect/winbond.c =================================================================== --- superiotool_libsuperiodetect/winbond.c (Revision 5651) +++ superiotool_libsuperiodetect/winbond.c (Arbeitskopie) @@ -40,6 +40,7 @@ {0x527, "W83977CTF", { /* TODO: Not yet in sensors-detect */ {EOT}}}, {0x52f, "W83977EF/EG", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -78,10 +79,12 @@ 0xf0,0xf1,0xf3,0xf4,0xf6,0xf7,0xf9,0xfe,0xff,EOT}, {0x00,0x00,0x00,0x00,MISC,MISC,MISC,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,RSVD,RSVD,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x595, "W83627SF", { /* TODO: Not yet in sensors-detect */ {EOT}}}, {0x601, "W83697HF/F/HG", { /* No G version? */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29, 0x2a,EOT}, @@ -126,12 +129,14 @@ {0xb, "Hardware monitor", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x610, "W83L517D/D-F", { {EOT}}}, {0x708, "W83637HF/HG", { {EOT}}}, {0x828, "W83627THF/THG", { /* We assume rev is bits 3..0 of 0x21. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -175,12 +180,14 @@ {0xb, "Hardware monitor", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, #if 0 {0x85x, "W83687THF", { /* TODO: sensors-detect: 0x85 */ {EOT}}}, #endif {0xa02, "W83627DHG", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -232,6 +239,7 @@ EOT}, {0x00,0x48,0x48,0x48,0x48,0x00,0x00,0x48,0x00,0x00, EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xa23, "W83627UHG", {/* TODO: Not yet in sensors-detect */ {EOT}}}, @@ -250,6 +258,7 @@ */ {EOT}}}, {0x9773, "W83977TF", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x2a,0x2b, 0x2c,0x2d,0x2e,0x2f,EOT}, @@ -294,12 +303,14 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, NANA,MISC,RSVD,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,RSVD,RSVD,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x9774, "W83977ATF", { {EOT}}}, /* ID only */ {0x52, "W83627HF/F/HG/G", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29, 0x2a,0x2b,0x2c,0x2e,0x2f,EOT}, @@ -342,6 +353,7 @@ {0xb, "Hardware monitor", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x68, "W83697SF/UF/UG", { /* ID: 0x68 (for W83697SF/UF/UG) @@ -349,6 +361,7 @@ * 0x0X (for W83697SF) -- sic! * 0x1X (for W83697UF/UG) */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29,0x2a, 0x2b,0x2c,EOT}, @@ -405,6 +418,7 @@ {0xf, "GPIO 8", {0x30,0x60,0x61,0xf0,0xf1,0xf2,EOT}, {0x00,0x00,0x00,0xff,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x88, "W83627EHF/EF/EHG/EG", { /* @@ -414,6 +428,7 @@ * (W83627EHF) has an ID of 0x8854 (verified on hardware). * So we now assume all 0x88?? IDs to mean W83627EHF/EF/EHG/EG. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -460,12 +475,14 @@ {0xb, "Hardware monitor", {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT}, {0x00,0x00,0x00,0x00,0xc1,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, /* ID[3..0] */ {0xa, "W83877F", { {EOT}}}, {0xb, "W83877AF", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09, 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13, @@ -475,6 +492,7 @@ 0x1f,0x0c,0x28,0xa3,RSVD,RSVD,0x00,0x00,0x00,0x00, 0x00,0x00,0x0e,0x00,MISC,MISC,MISC,MISC,MISC,MISC, MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xc, "W83877TF", { {EOT}}}, @@ -483,6 +501,7 @@ {EOT} }; +#ifndef LIBSUPERIODETECT static const struct superio_registers hwm_table[] = { {0x828, "W83627THF/THG", { {NOLDN, NULL, @@ -531,6 +550,7 @@ {EOT}}}, {EOT} }; +#endif /* ! LIBSUPERIODETECT */ static void enter_conf_mode_winbond_88(uint16_t port) { @@ -550,7 +570,10 @@ static void probe_idregs_winbond_helper(const char *init, uint16_t port) { - uint16_t id, hwmport; + uint16_t id; +#ifndef LIBSUPERIODETECT + uint16_t hwmport; +#endif /* LIBSUPERIODETECT */ uint8_t devid, rev, olddevid; probing_for("Winbond", init, port); @@ -586,6 +609,7 @@ get_superio_name(reg_table, id), devid, rev, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio("Winbond", reg_table, port, id, LDN_SEL); if (extra_dump) { @@ -607,6 +631,7 @@ dump_superio("Winbond-HWM", hwm_table, hwmport, id, WINBOND_HWM_SEL); } +#endif /* ! LIBSUPERIODETECT */ } void probe_idregs_winbond(uint16_t port) @@ -631,5 +656,7 @@ void print_winbond_chips(void) { print_vendor_chips("Winbond", reg_table); +#ifndef LIBSUPERIODETECT print_vendor_chips("Winbond-HWM", hwm_table); +#endif /* ! LIBSUPERIODETECT */ } Index: superiotool_libsuperiodetect/ite.c =================================================================== --- superiotool_libsuperiodetect/ite.c (Revision 5651) +++ superiotool_libsuperiodetect/ite.c (Arbeitskopie) @@ -30,6 +30,7 @@ {0x8228, "IT8228E", { {EOT}}}, {0x8502, "IT8502E/TE/G", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2A,0x2B,0x2C,0x2D,0x2E,EOT}, @@ -67,10 +68,12 @@ {0x17, "Power Channel 3", {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, {0x00,0x00,0x6a,0x00,0x6e,0x01,0x01,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8510, "IT8510E/TE/G", { {EOT}}}, {0x8511, "IT8511E/TE/G", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2A,0x2B,0x2C,0x2D,0x2E,EOT}, @@ -101,8 +104,10 @@ {0x12, "Power Channel 2", {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, {0x00,0x00,0x68,0x00,0x6c,0x01,0x03,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8512, "IT8512E/F/G", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2A,0x2B,0x2C,0x2D,0x2E,EOT}, @@ -133,10 +138,12 @@ {0x12, "Power Channel 2", {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, {0x00,0x00,0x68,0x00,0x6c,0x01,0x03,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8513, "IT8513E/F/G", { {EOT}}}, {0x8661, "IT8661F/IT8770F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x20,0x21,0x22, 0x23,0x24,EOT}, @@ -168,10 +175,12 @@ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8673, "IT8673F", { {EOT}}}, {0x8681, "IT8671F/IT8687R", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x20,0x21,0x22, 0x23,0x24,0x25,0x26,0x2e,0x2f,EOT}, @@ -211,8 +220,10 @@ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8701, "IT8703F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x23,0x24,0x26,0x29,0x2a,0x2b,EOT}, {0x87,0x00,0x00,0x80,0x00,0x00,0x7c,0xc0,EOT}}, @@ -253,10 +264,12 @@ {0xc, "GPIO set 5, 6 and 7", {0x30,0x60,0x61,0xf0,0xf3,0xf6,EOT}, {0x00,0x03,0x70,0x00,0xff,0xff,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8702, "IT8702F", { {EOT}}}, {0x8705, "IT8705F/AF / IT8700F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,EOT}, {0x87,0x05,0x00,0x00,NANA,EOT}}, @@ -303,11 +316,15 @@ {0x8, "MIDI port", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x00,0x0a,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8706, "IT8706R", { /* TODO: Not yet in sensors-detect */ +#ifndef LIBSUPERIODETECT /* This is a "Special General Purpose I/O chip". */ +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8708, "IT8708F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2a,0x2e,0x2f,EOT}, @@ -361,12 +378,14 @@ {0xa, "MIDI port", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x00,0x0a,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8710, "IT8710F", { /* TODO: Not yet in sensors-detect */ {EOT}}}, {0x8711, "IT8711F", { /* 0x8711 is a guess, not found in datasheet. */ {EOT}}}, {0x8712, "IT8712F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x2b,EOT}, {0x87,0x12,0x08,0x00,0x00,0x00,EOT}}, @@ -416,8 +435,10 @@ {0xa, "Consumer IR", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x10,0x0b,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8716, "IT8716F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x2b,EOT}, {0x87,0x16,0x01,0x00,0x00,0x00,EOT}}, @@ -466,8 +487,10 @@ {0xa, "Consumer IR", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x10,0x0b,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8718, "IT8718F", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x2b,EOT}, {0x87,0x18,0x01,0x00,0x00,0x00,EOT}}, @@ -514,6 +537,7 @@ {0xa, "Consumer IR", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x10,0x0b,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8720, "IT8720F", { /* From sensors-detect */ {EOT}}}, @@ -521,6 +545,7 @@ {EOT}}}, {0x8726, "IT8726F", { /* Datasheet wrongly says that the ID is 0x8716. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x2b,EOT}, {0x87,0x26,0x01,0x00,MISC,0x00,EOT}}, @@ -571,6 +596,7 @@ {0xa, "Consumer IR", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x03,0x10,0x0b,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8761, "IT8761E", { {EOT}}}, @@ -579,6 +605,7 @@ {EOT} }; +#ifndef LIBSUPERIODETECT static const struct superio_registers ec_table[] = { {0x8716, "IT8716F", { {NOLDN, NULL, @@ -636,6 +663,7 @@ {EOT}}}, {EOT} }; +#endif /* ! LIBSUPERIODETECT */ /* Works for: IT8661F/IT8770F */ static const uint8_t initkey_it8661f[][4] = { @@ -712,7 +740,10 @@ static void probe_idregs_ite_helper(const char *init, uint16_t port) { - uint16_t id, chipver, ecport; + uint16_t id, chipver; +#ifndef LIBSUPERIODETECT + uint16_t ecport; +#endif /* ! LIBSUPERIODETECT */ probing_for("ITE", init, port); @@ -730,6 +761,7 @@ get_superio_name(reg_table, id), id, chipver, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio("ITE", reg_table, port, id, LDN_SEL); if (extra_dump) { @@ -745,6 +777,7 @@ printf("Environment controller (0x%04x)\n", ecport); dump_superio("ITE-EC", ec_table, ecport, id, LDN_SEL); } +#endif /* ! LIBSUPERIODETECT */ } void probe_idregs_ite(uint16_t port) @@ -783,5 +816,7 @@ void print_ite_chips(void) { print_vendor_chips("ITE", reg_table); +#ifndef LIBSUPERIODETECT print_vendor_chips("ITE-EC", ec_table); +#endif /* ! LIBSUPERIODETECT */ } Index: superiotool_libsuperiodetect/nsc.c =================================================================== --- superiotool_libsuperiodetect/nsc.c (Revision 5651) +++ superiotool_libsuperiodetect/nsc.c (Arbeitskopie) @@ -26,6 +26,7 @@ static const struct superio_registers reg_table[] = { {0xcf, "PC97307", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x27,EOT}, {0xcf,MISC,MISC,0x00,0x00,NANA,EOT}}, @@ -60,8 +61,10 @@ {0x8, "Power management", {0x30,0x31,0x60,0x61,0x74,0x75,EOT}, {0x00,0x00,0x00,0x00,0x04,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xd0, "PC87317", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,EOT}, {0xd0,MISC,MISC,0x00,0x00,0x00,EOT}}, @@ -96,8 +99,10 @@ {0x8, "Power management", {0x30,0x31,0x60,0x61,0x74,0x75,EOT}, {0x00,0x00,0x00,0x00,0x04,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xdf, "PC97317", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x27,EOT}, {0xdf,MISC,MISC,0x00,0x00,0x00,NANA,EOT}}, @@ -132,8 +137,10 @@ {0x8, "Power management", {0x30,0x31,0x60,0x61,0x74,0x75,EOT}, {0x00,0x00,0x00,0x00,0x04,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xe0, "PC87309", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x27,0x2e,EOT}, {0xe0,MISC,0x00,NANA,RSVD,EOT}}, @@ -162,8 +169,10 @@ 0xf0,EOT}, {0x01,0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04, 0x40,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xe1, "PC87360", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,EOT}, @@ -206,8 +215,10 @@ {0xa, "Watchdog timer", {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x02,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xe2, "PC87351", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x27,0x2e,EOT}, {0xe2,0x11,0xa1,0x00,MISC,NANA,RSVD,EOT}}, @@ -240,6 +251,7 @@ {0x8, "Fan speed control", {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, {0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xe4, "PC87364", { {EOT}}}, @@ -248,6 +260,7 @@ {0xe8, "PC87363", { {EOT}}}, {0xe9, "PC87366", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x27,0x28,0x2a,0x2b, 0x2c,0x2d,0x2e,EOT}, @@ -304,10 +317,12 @@ {0xe, "Temperature sensor (TMS)", {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT}, {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, /* SID[7..0]: family, SRID[7..5]: ID, SRID[4..0]: rev. */ {0xea, "PC8739x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -344,12 +359,14 @@ 0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,EOT}, {0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xec, "PC87591x", { /* SRID[7..5]: 000=PC87591E, 001=PC87591S, 100=PC87591L */ {EOT}}}, {0xee, "PC8741x", { /* SRID[7..5] is marked as "not applicable for the PC8741x". */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, 0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -397,10 +414,12 @@ 0xf1,0xf2,0xf3,EOT}, {0x00,0x00,0x70,0x00,0x72,0x08,0x00,0x04,0x04,0x00, 0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xf0, "PC87372", { {EOT}}}, {0x0f1, "PC8374L", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x10,0x12,0x13,0x20,0x21,0x22,0x23,0x24,0x25,0x26, 0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -441,8 +460,10 @@ {0x8, "Health management", {0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT}, {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x8f1, "WPCD376I", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x10,0x12,0x13,0x20,0x21,0x22,0x23,0x24,0x25,0x26, 0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -480,9 +501,11 @@ 0xf2,0xf3,0xf8,EOT}, {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,MISC, 0x00,MISC,0x01,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xf2, "PC87427", { /* SRID[7..5] is marked as "not applicable for the PC87427". */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x10,0x12,0x13,0x1d,0x20,0x21,0x22,0x23,0x24,0x25, 0x26,0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f, @@ -542,6 +565,7 @@ 0xf0,EOT}, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04, 0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0xf3, "PC87373", { {EOT}}}, @@ -592,8 +616,10 @@ get_superio_name(reg_table, magic), id, rev, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio(magic == 0x8f1 ? "Winbond" : "NSC", reg_table, port, magic, LDN_SEL); +#endif /* ! LIBSUPERIODETECT */ } void print_nsc_chips(void) Index: superiotool_libsuperiodetect/superiotool.c =================================================================== --- superiotool_libsuperiodetect/superiotool.c (Revision 5651) +++ superiotool_libsuperiodetect/superiotool.c (Arbeitskopie) @@ -81,6 +81,7 @@ return "<unknown>"; } +#ifndef LIBSUPERIODETECT static void dump_regs(const struct superio_registers reg_table[], int i, int j, uint16_t port, uint8_t ldn_sel) { @@ -170,6 +171,7 @@ printf("%02x ", INB(iobase + i)); printf("\n"); } +#endif /* ! LIBSUPERIODETECT */ void probing_for(const char *vendor, const char *info, uint16_t port) { @@ -189,9 +191,11 @@ for (i = 0; reg_table[i].superio_id != EOT; i++) { printf("%s %s", vendor, reg_table[i].name); +#ifndef LIBSUPERIODETECT /* Unless the ldn is empty, assume this chip has a dump. */ if (reg_table[i].ldn[0].ldn != EOT) printf(" (dump available)"); +#endif /* ! LIBSUPERIODETECT */ printf("\n"); } Index: superiotool_libsuperiodetect/ali.c =================================================================== --- superiotool_libsuperiodetect/ali.c (Revision 5651) +++ superiotool_libsuperiodetect/ali.c (Arbeitskopie) @@ -28,6 +28,7 @@ static const struct superio_registers reg_table[] = { /* TODO: M5113 doesn't seem to have ID registers? */ {0x5315, "M1535/M1535D/M1535+/M1535D+", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x1f,0x20,0x21,0x22,0x23,0x2c,0x2d,0x2e,EOT}, {NANA,0x53,0x15,0x00,0x00,RSVD,RSVD,RSVD,EOT}}, @@ -52,6 +53,7 @@ {0xc, "Hotkey", {0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,EOT}, {0x00,0x35,0x14,0x11,0x71,RSVD,0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x2351, "M512x", { {EOT}}}, @@ -95,7 +97,9 @@ get_superio_name(reg_table, id), id, rev, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio("ALi", reg_table, port, id, LDN_SEL); +#endif /* ! LIBSUPERIODETECT */ exit_conf_mode_ali(port); } Index: superiotool_libsuperiodetect/smsc.c =================================================================== --- superiotool_libsuperiodetect/smsc.c (Revision 5651) +++ superiotool_libsuperiodetect/smsc.c (Arbeitskopie) @@ -30,6 +30,7 @@ static const struct superio_registers reg_table[] = { /* The following Super I/Os use the 0x20/0x21 ID registers. */ {0x02, "FDC37C932", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x03,0x20,0x21,0x22,0x23,0x24,0x2d,0x2e, 0x2f,EOT}, @@ -68,11 +69,13 @@ {0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01, 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x00, 0x00,0x00,0x00,MISC,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x03, "FDC37C93xFR", { /* FIXME: There's another 0x03 but found on port 0x0d/0x0e! */ {EOT}}}, {0x0a, "FDC37N971", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -109,8 +112,10 @@ {0x9, "Mailbox", {0x30,0x60,0x61,EOT}, {0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x0b, "FDC37N972", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -147,8 +152,10 @@ {0x9, "Mailbox", {0x30,0x60,0x61,EOT}, {0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x0e, "LPC47N252", { /* From sensors-detect */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28, 0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -188,12 +195,14 @@ {0xa, "LPC/8051 addressable GPIO (LGPIO)", {0x30,0x60,0x61,EOT}, {0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x14, "LPC47M172", { {EOT}}}, {0x30, "FDC37C93xAPM", { {EOT}}}, {0x40, "FDC37C67x", { /* E.g. FDC37C672. Chiprev: 0x01 */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x2b,0x2c, 0x2d,0x2e,0x2f,EOT}, @@ -225,10 +234,12 @@ {0x00,NANA,NANA,NANA,NANA,0x06,0x03,NANA,NANA,NANA, 0x00,0x00,0x00,MISC,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD, EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x42, "FDC37B80x/FDC37M707", { {EOT}}}, {0x09, "FDC37N958FR", { /* Found in e.g. Dell Latitude CPi A366XT. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2b, 0x2c,0x2d,0x2e,0x2f,EOT}, @@ -270,10 +281,12 @@ {0xa, "ACPI", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,NANA,NANA,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x43, "FDC37B77x", { {EOT}}}, {0x44, "FDC37B78x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2b, 0x2c,0x2d,0x2e,0x2f,EOT}, @@ -315,12 +328,14 @@ {0xa, "ACPI", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,NANA,NANA,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x46, "FDC37M602", { /* Found in Biostar M6TLD. */ {EOT}}}, {0x47, "FDC37M60x", { /* TODO: Not yet in sensors-detect */ {EOT}}}, {0x4c, "FDC37B72x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2b, 0x2c,0x2d,0x2e,0x2f,EOT}, @@ -357,8 +372,10 @@ {0xa, "ACPI", {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,NANA,NANA,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x4d, "FDC37M81x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x2b,0x2c, 0x2d,0x2e,0x2f,EOT}, @@ -389,8 +406,10 @@ {0x00,NANA,NANA,NANA,NANA,0x02,0x01,NANA,NANA,NANA, NANA,NANA,NANA,NANA,0x00,0x00,0x00,0x00,RSVD,RSVD, RSVD,RSVD,RSVD,RSVD,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x51, "LPC47B27x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28, 0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -424,10 +443,12 @@ {0xb, "MIDI port (MPU-401)", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x03,0x30,0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x52, "LPC47B37x", { {EOT}}}, {0x54, "LPC47U33x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x2a,0x2b, 0x2c,0x2d,0x2e,0x2f,EOT}, @@ -459,12 +480,14 @@ {0xb, "SMBus", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x00,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x56, "LPC47B34x", { {EOT}}}, {0x57, "LPC47S42x", { {EOT}}}, {0x59, "LPC47M10x/112/13x", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -498,12 +521,14 @@ {0xb, "MPU-401", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x03,0x30,0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x5d, "LPC47B357", { /* From sensors-detect (no datasheet) */ {EOT}}}, {0x5f, "LPC47M14x", { {EOT}}}, {0x60, "LPC47M15x/192/997", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -535,6 +560,7 @@ {0xb, "MPU-401", {0x30,0x60,0x61,0x70,EOT}, {0x00,0x03,0x30,0x05,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x62, "LPC47S45x", { {EOT}}}, @@ -550,6 +576,7 @@ {0x6f, "LPC47B397", { {EOT}}}, {0x74, "LPC47M182", { /* Only for LD_NUM = 0 */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x02,0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27, 0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -584,10 +611,12 @@ {0xa, "Runtime registers", {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT}, {0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x76, "LPC47M584", { /* From sensors-detect (no datasheet) */ {EOT}}}, {0x77, "A8000", { /* ASUS A8000, a rebranded DME1737(?) */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -613,8 +642,10 @@ {0xa, "Runtime registers", {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT}, {0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x78, "DME1737", { +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28,0x2a, 0x2b,0x2c,0x2d,0x2e,0x2f,EOT}, @@ -640,6 +671,7 @@ {0xa, "Runtime registers", {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT}, {0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x79, "SCH5504", { /* From sensors-detect (no datasheet) */ {EOT}}}, @@ -682,6 +714,7 @@ {EOT}}}, {0x28, "FDC37N769", { /* Init: 0x55. Exit: 0xaa. Ports: 0x3f0/0x370. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09, 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13, @@ -693,12 +726,14 @@ NANA,NANA,NANA,0x03,RSVD,RSVD,RSVD,RSVD,RSVD,RSVD, 0x80,0x00,0x3c,RSVD,RSVD,0x00,0x00,0x00,0x00,0x00, 0x00,0x00,RSVD,0x00,0x00,0x03,0x00,0x00,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x29, "FDC37N3869/FDC37N869", { /* Init: 0x55. Exit: 0xaa. Ports: 0x3f0/0x370. */ {EOT}}}, {0x5a, "LPC47N227", { /* Init: 0x55. Exit: 0xaa. Ports: 0x2e/0x4e. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09, 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13, @@ -712,9 +747,11 @@ RSVD,0x00,0x3c,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x80,0x00,0x00,0x00,0x03,0x00,0x00,0x00,0x00, 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x5b, "SIO10N268", { /* Init: 0x55. Exit: 0xaa. Ports: 0x2e/0x4e. */ +#ifndef LIBSUPERIODETECT {NOLDN, NULL, {0x00,0x01,0x02,0x03,0x04,0x05,0x06,0x07,0x08,0x09, 0x0a,0x0b,0x0c,0x0d,0x0e,0x0f,0x10,0x11,0x12,0x13, @@ -734,6 +771,7 @@ 0x00,0x00,0x00,0x00,NANA,NANA,NANA,NANA,NANA,0x50, NANA,0x00,NANA,NANA,NANA,NANA,NANA,NANA,0x00,0x01, 0x00,0x01,0x00,0x8c,MISC,EOT}}, +#endif /* ! LIBSUPERIODETECT */ {EOT}}}, {0x65, "FDC37C665GT/IR", { /* Init: 0x55, 0x55. Exit: 0xaa. Port: 0x3f0. */ @@ -765,7 +803,9 @@ uint8_t revreg) { uint8_t id, rev; +#ifndef LIBSUPERIODETECT uint16_t runtime_base; +#endif /* ! LIBSUPERIODETECT */ const char *info = (idreg == 0x20) ? "(idregs=0x20/0x21) " : "(idregs=0x0d/0x0e) "; @@ -788,6 +828,7 @@ id, rev, port); chip_found = 1; +#ifndef LIBSUPERIODETECT dump_superio((id == 0x77 ? "ASUS" : "SMSC"), reg_table, port, id, LDN_SEL); @@ -804,6 +845,7 @@ printf("No extra registers known for this chip.\n"); } } +#endif /* ! LIBSUPERIODETECT */ exit_conf_mode_smsc(port); } Index: superiotool_libsuperiodetect/superiotool.h =================================================================== --- superiotool_libsuperiodetect/superiotool.h (Revision 5651) +++ superiotool_libsuperiodetect/superiotool.h (Arbeitskopie) @@ -98,12 +98,19 @@ struct superio_registers { int32_t superio_id; /* Signed, as we need EOT. */ const char *name; /* Super I/O name */ +#ifndef LIBSUPERIODETECT struct { int8_t ldn; const char *name; /* LDN name */ int16_t idx[IDXSIZE]; int16_t def[IDXSIZE]; } ldn[LDNSIZE]; +#else /* LIBSUPERIODETECT */ + /* Ugly hack to avoid messing with EOT markers. */ + struct { + int8_t dummy; + } dummy[1]; +#endif /* LIBSUPERIODETECT */ }; /* pci.c */ Index: superiotool_libsuperiodetect/Makefile =================================================================== --- superiotool_libsuperiodetect/Makefile (Revision 5651) +++ superiotool_libsuperiodetect/Makefile (Arbeitskopie) @@ -32,6 +32,10 @@ CFLAGS = -O2 -Wall -Werror -Wstrict-prototypes -Wundef -Wstrict-aliasing \ -Werror-implicit-function-declaration -ansi -pedantic $(SVNDEF) +ifeq ($(CONFIG_LIB), yes) +CFLAGS += -D'LIBSUPERIODETECT=1' +endif + OBJS = superiotool.o ali.o fintek.o ite.o nsc.o smsc.o winbond.o OS_ARCH = $(shell uname) -- http://www.hailfinger.org/

3 7

[commit] r5651 - trunk/util/superiotool
by repository service 30 Jun '10

30 Jun '10

Author: stepan Date: Tue Jun 29 23:26:17 2010 New Revision: 5651 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5651 Log: Add support to IT85xx series Signed-off-by: Anton Kochkov <anton.kochkov(a)gmail.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/util/superiotool/ite.c Modified: trunk/util/superiotool/ite.c ============================================================================== --- trunk/util/superiotool/ite.c Tue Jun 29 23:13:20 2010 (r5650) +++ trunk/util/superiotool/ite.c Tue Jun 29 23:26:17 2010 (r5651) @@ -29,11 +29,110 @@ static const struct superio_registers reg_table[] = { {0x8228, "IT8228E", { {EOT}}}, + {0x8502, "IT8502E/TE/G", { + {NOLDN, NULL, + {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, + 0x2A,0x2B,0x2C,0x2D,0x2E,EOT}, + {0x85,0x02,0x71,0x01,NANA,0x00,0x00,NANA,NANA,NANA, + NANA,NANA,NANA,0x00,NANA,EOT}}, + {0x1, "UART1", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x00,0x03,0xf8,0x00,0x00,0x04,0x02,0x00,EOT}}, + {0x4, "System Wake-Up", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,EOT}}, + {0x5, "Mouse", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x01,0x00,0x00,0x00,0x00,0x0C,0x01,NANA,EOT}}, + {0x6, "Keyboard", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x01,0x00,0x60,0x00,0x64,0x01,0x01,NANA,EOT}}, + {0xf, "Shared Memory/Flash", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf4,0xf5, + 0xf6,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,EOT}}, + {0x10, "BRAM", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf3,0xf4, + 0xf5,EOT}, + {0x00,0x00,0x70,0x00,0x72,0x08,0x01,NANA,NANA, + NANA,EOT}}, + {0x11, "Power Channel 1", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + + {0x00,0x00,0x62,0x00,0x66,0x01,0x01,EOT}}, + {0x12, "Power Channel 2", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x68,0x00,0x6c,0x01,0x01,EOT}}, + {0x17, "Power Channel 3", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x6a,0x00,0x6e,0x01,0x01,EOT}}, + {EOT}}}, {0x8510, "IT8510E/TE/G", { {EOT}}}, {0x8511, "IT8511E/TE/G", { + {NOLDN, NULL, + {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, + 0x2A,0x2B,0x2C,0x2D,0x2E,EOT}, + {0x85,0x11,0x10,0x01,NANA,0x00,0x00,NANA,NANA,NANA, + NANA,NANA,NANA,0x00,NANA,EOT}}, + {0x4, "System Wake-Up", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,EOT}}, + {0x5, "Mouse", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x01,0x00,0x00,0x00,0x00,0x0C,0x03,NANA,EOT}}, + {0x6, "Keyboard", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x01,0x00,0x60,0x00,0x64,0x01,0x03,NANA,EOT}}, + {0xf, "Shared Memory/Flash", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf4,0xf5, + 0xf6,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,EOT}}, + {0x10, "Real-Time Clock", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,0xf1, + 0xf2,0xf3,0xf4,0xf5,EOT}, + {0x00,0x00,0x70,0x00,0x72,0x08,0x00,0x00,0x49, + 0x4A,NANA,NANA,NANA,EOT}}, + {0x11, "Power Channel 1", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x62,0x00,0x66,0x01,0x03,EOT}}, + {0x12, "Power Channel 2", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x68,0x00,0x6c,0x01,0x03,EOT}}, {EOT}}}, {0x8512, "IT8512E/F/G", { + {NOLDN, NULL, + {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29, + 0x2A,0x2B,0x2C,0x2D,0x2E,EOT}, + {0x85,0x12,0x22,0x01,NANA,0x00,0x00,NANA,NANA,NANA, + NANA,NANA,NANA,0x00,NANA,EOT}}, + {0x4, "System Wake-Up", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x03,EOT}}, + {0x5, "Mouse", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x0C,0x03,NANA,EOT}}, + {0x6, "Keyboard", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT}, + {0x00,0x00,0x60,0x00,0x64,0x01,0x03,NANA,EOT}}, + {0xf, "Shared Memory/Flash", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf4,0xf5, + 0xf6,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, + 0x00,EOT}}, + {0x10, "BRAM", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf3,0xf4, + 0xf5,EOT}, + {0x00,0x00,0x70,0x00,0x72,0x08,0x00,NANA,NANA, + NANA,EOT}}, + {0x11, "Power Channel 1", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x62,0x00,0x66,0x01,0x03,EOT}}, + {0x12, "Power Channel 2", + {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT}, + {0x00,0x00,0x68,0x00,0x6c,0x01,0x03,EOT}}, {EOT}}}, {0x8513, "IT8513E/F/G", { {EOT}}}, @@ -582,6 +681,14 @@ OUTB((port == 0x2e) ? 0x55 : 0xaa, port); } +static void enter_conf_mode_ite_it8502e(uint16_t port) +{ + OUTB(0x85, port); + OUTB(0x02, port); + OUTB(0x55, port); + OUTB((port == 0x2e) ? 0x55 : 0xaa, port); +} + static void enter_conf_mode_ite_it8761e(uint16_t port) { OUTB(0x87, port); @@ -655,6 +762,10 @@ probe_idregs_ite_helper("(init=standard) ", port); exit_conf_mode_ite(port); + enter_conf_mode_ite_it8502e(port); + probe_idregs_ite_helper("(init=it8502e) ", port); + exit_conf_mode_ite(port); + enter_conf_mode_ite_it8761e(port); probe_idregs_ite_helper("(init=it8761e) ", port); exit_conf_mode_ite(port);

2 1

Re: [coreboot] [PATCH] Convert Geode GX2 boards to CAR
by Nils 29 Jun '10

29 Jun '10

Hi All, Nils wrote: >Peter wrote: >>Nils wrote: >>> +++ src/cpu/amd/model_gx2/cache_as_ram.inc (revision 0) >>.. >>> + post_code(0xc5) >>> +DCacheSetupBad: >>> + hlt /* issues */ >>> + jmp DCacheSetupBad >> >>Should this maybe fail more loudly than a POST code, which can be >>disbled completely. Would be nice to say something on serial. > >I would like that but that`s how it is in Geode LX. >I try if can do a follow up patch for that after this is in. OK? I spent some time trying to get a debug message printed here but i am probably to stupid. I tried with printk and print_debug but the assembler complained. Could someone perhaps point me to an example in another assembler file? I could not find one. Thanks,Nils.

2 2

[commit] r5650 - trunk/util/ectool
by repository service 29 Jun '10

29 Jun '10

Author: stepan Date: Tue Jun 29 23:13:20 2010 New Revision: 5650 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5650 Log: Add support to extended EC series Signed-off-by: Anton Kochkov <anton.kochkov(a)gmail.com> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/util/ectool/ec.c trunk/util/ectool/ec.h trunk/util/ectool/ectool.c Modified: trunk/util/ectool/ec.c ============================================================================== --- trunk/util/ectool/ec.c Tue Jun 29 23:02:32 2010 (r5649) +++ trunk/util/ectool/ec.c Tue Jun 29 23:13:20 2010 (r5650) @@ -38,7 +38,7 @@ debug("."); } if (!timeout) { - printf("Timeout while sending command 0x%02x to EC!\n", + debug("Timeout while sending command 0x%02x to EC!\n", command); // return -1; } @@ -57,8 +57,8 @@ if ((timeout & 0xff) == 0) debug("."); } - if (!timeout) { - printf("Timeout while sending data 0x%02x to EC!\n", data); + if (timeout) { + debug("Timeout while sending data 0x%02x to EC!\n", data); // return -1; } @@ -89,7 +89,7 @@ debug("."); } if (!timeout) { - printf("\nTimeout while receiving data from EC!\n"); + debug("\nTimeout while receiving data from EC!\n"); // return -1; } @@ -101,15 +101,37 @@ uint8_t ec_read(uint8_t addr) { - send_ec_command(0x80); + send_ec_command(RD_EC); send_ec_data(addr); return recv_ec_data(); } +uint8_t ec_ext_read(uint16_t addr) +{ + send_ec_command(WR_EC); + send_ec_data(0x02); + send_ec_data(addr & 0xff); + send_ec_command(RX_EC); + send_ec_data(addr >> 8); + + return recv_ec_data(); +} + +int ec_ext_write(uint16_t addr, uint8_t data) +{ + send_ec_command(WR_EC); + send_ec_data(0x02); + send_ec_data(addr & 0xff); + send_ec_command(WX_EC); + send_ec_data(addr >> 8); + + return send_ec_data(data); +} + int ec_write(uint8_t addr, uint8_t data) { - send_ec_command(0x81); + send_ec_command(WR_EC); send_ec_data(addr); return send_ec_data(data); Modified: trunk/util/ectool/ec.h ============================================================================== --- trunk/util/ectool/ec.h Tue Jun 29 23:02:32 2010 (r5649) +++ trunk/util/ectool/ec.h Tue Jun 29 23:13:20 2010 (r5650) @@ -22,8 +22,8 @@ #include <stdint.h> -#define EC_DATA 0x62 -#define EC_SC 0x66 +#define EC_DATA 0x62 +#define EC_SC 0x66 /* EC_SC input */ #define EC_SMI_EVT (1 << 6) // 1: SMI event pending @@ -40,12 +40,16 @@ #define BE_EC 0x82 // Burst Enable Embedded Controller #define BD_EC 0x83 // Burst Disable Embedded Controller #define QR_EC 0x84 // Query Embedded Controller +#define RX_EC 0xf0 // Read Extended operation +#define WX_EC 0xf1 // Write Extended operation int send_ec_command(uint8_t command); int send_ec_data(uint8_t data); int send_ec_data_nowait(uint8_t data); uint8_t recv_ec_data(void); uint8_t ec_read(uint8_t addr); - +int ec_write(uint8_t addr, uint8_t data); +uint8_t ec_ext_read(uint16_t addr); +int ec_ext_write(uint16_t addr, uint8_t data); uint8_t ec_idx_read(uint16_t addr); #endif Modified: trunk/util/ectool/ectool.c ============================================================================== --- trunk/util/ectool/ectool.c Tue Jun 29 23:02:32 2010 (r5649) +++ trunk/util/ectool/ectool.c Tue Jun 29 23:13:20 2010 (r5650) @@ -45,16 +45,17 @@ void print_usage(const char *name) { - printf("usage: %s [-vh?V]\n", name); + printf("usage: %s [-vh?Vi]\n", name); printf("\n" " -v | --version: print the version\n" " -h | --help: print this help\n\n" " -V | --verbose: print debug information\n" + " -i | --idx: print IDX RAM\n" "\n"); exit(1); } -int verbose = 0; +int verbose = 0, dump_idx = 0; int main(int argc, char *argv[]) { @@ -64,10 +65,11 @@ {"version", 0, 0, 'v'}, {"help", 0, 0, 'h'}, {"verbose", 0, 0, 'V'}, + {"idx", 0, 0, 'i'}, {0, 0, 0, 0} }; - while ((opt = getopt_long(argc, argv, "vh?V", + while ((opt = getopt_long(argc, argv, "vh?Vi", long_options, &option_index)) != EOF) { switch (opt) { case 'v': @@ -77,6 +79,8 @@ case 'V': verbose = 1; break; + case 'i': + dump_idx = 1; case 'h': case '?': default: @@ -99,14 +103,17 @@ } printf("\n\n"); - printf("EC IDX RAM:\n"); - for (i = 0; i < 0x10000; i++) { - if ((i % 0x10) == 0) - printf("\n%04x: ", i); - printf("%02x ", ec_idx_read(i)); + if (dump_idx) { + printf("EC IDX RAM:\n"); + for (i = 0; i < 0x10000; i++) { + if ((i % 0x10) == 0) + printf("\n%04x: ", i); + printf("%02x ", ec_idx_read(i)); + } + printf("\n\n"); + } else { + printf("Not dumping EC IDX RAM.\n"); } - printf("\n\n"); - return 0; }

1 0

[commit] r5649 - in trunk/src/superio/smsc: lpc47m10x lpc47m15x
by repository service 29 Jun '10

29 Jun '10

Author: stepan Date: Tue Jun 29 23:02:32 2010 New Revision: 5649 URL: https://tracker.coreboot.org/trac/coreboot/changeset/5649 Log: fix misnamed functions. Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> Acked-by: Stefan Reinauer <stepan(a)coresystems.de> Modified: trunk/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c trunk/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c Modified: trunk/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c ============================================================================== --- trunk/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c Mon Jun 28 12:40:38 2010 (r5648) +++ trunk/src/superio/smsc/lpc47m10x/lpc47m10x_early_serial.c Tue Jun 29 23:02:32 2010 (r5649) @@ -47,15 +47,15 @@ } /* - * Function: lpc47b272_enable_serial + * Function: lpc47m10x_enable_serial * Parameters: dev - high 8 bits = Super I/O port, - * low 8 bits = logical device number (per lpc47b272.h) + * low 8 bits = logical device number (per lpc47m10x.h) * iobase - processor I/O port address to assign to this serial device * Return Value: bool * Description: Configure the base I/O port of the specified serial device * and enable the serial device. */ -static void lpc47b272_enable_serial(device_t dev, unsigned iobase) +static void lpc47m10x_enable_serial(device_t dev, unsigned iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); Modified: trunk/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c ============================================================================== --- trunk/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c Mon Jun 28 12:40:38 2010 (r5648) +++ trunk/src/superio/smsc/lpc47m15x/lpc47m15x_early_serial.c Tue Jun 29 23:02:32 2010 (r5649) @@ -34,7 +34,7 @@ outb(0xaa, port); } -static inline void lpc47b272_enable_serial(device_t dev, unsigned iobase) +static inline void lpc47m15x_enable_serial(device_t dev, unsigned iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev);

1 0

Asus M2A-VM
by Jason Self 29 Jun '10

29 Jun '10

I'm thinking about buying an Asus M2A-VM but the wiki page [1] saying 4GB of RAM doesn't work and listing sensors/fan control/ACPI as WIP worries me. The wiki was last updated about a year ago. Does this info still represent the current state of things? [1] http://www.coreboot.org/ASUS_M2A-VM

3 6

Re: [coreboot] Support for K10/K10.5 on old AM2-only boards
by Andrew 29 Jun '10

29 Jun '10

29.06.2010 09:55, anders(a)jenbo.dk wrote: > NVIDIA based boards are not supported as NVIDIA isn't providing > documentation. So in what way was made support of ck804/mcp55? Reversing original BIOS? > Irc_tables can be generated using a tool in the utils folder. > Devicetree is basically that you get from lspci -tvnn an superiotool. > > Mvh Anders > Thanks. Still have question about K10/K8 initialization routines - can they be combined in one BIOS?

4 5

Support for K10/K10.5 on old AM2-only boards
by Andrew 29 Jun '10

29 Jun '10

Hi all. I experimented with K10+ CPUs and boards that doesn't support them, and on some boards it's possible to start new CPUs with BIOS from board on same (or closely relative, like GeForce7025/NForce520 pair) chipset - possible with some bugs, possible without all working fuctions, or even sysnem that hangs on late BIOS initialisation stages - but CPU is successfully initialized. Also there are many enough old AM2 boards, that have AM2+/AM3 CPU support. So incompatibility of new CPUs with old hardware is only on software level (or 'semi-hardware' - when there aren't enough place in flash to fit new K10-related modules and microcodes). I looked to coreboot because it looks like it can be enough functional replacement of native BIOS. And I want to try to make some experiments with it. I have some MBs for experiments (Asus M2V-MX, Biostar GeForce7025, Palit NForce520 - that is AM2+/AM3 CPU compatible, MSI K9N4 Ultra MS-7310, and some Biostar on K8T800 - but as I understand this bridge can't be correctly initialized by coreboot). GeForce7025 and NForce520 boards have compatible BIOS - at least, after swapping of flashes they can successfully load MS-DOS from USB flash, and work with PCI/PCI-E videocards - so it looks that they use reference design. Also I have Willem programmer (still without PLCC parallel flash adapter because it was unneeded for me for many years - but I'll make it soon) and POST card, some knowledge in PC hardware and programming, and sometimes have some free time that I can spent for such experiments. After look at code I have some questions: 1) Coreboot image that is assembled for K10, will support K8 CPUs? And how about K10.5 AthlonII/PhenomII CPUs (generic AM2+ boards can successfully run AM3 CPUs)? 2) To change CPU family - it's enough to replace family in Kconfig and replace included files in romstage.c? 3) Why you don't use generic AMD memory routines and CPUID detection for CPU family at initialization, and possible conditional compiling of code if somebody will need to disable support of K8 or K10+ - for ex., for flash space saving? 4) And what I need for try to create bios for unsupported MB if I take one working as basic? Except modifying Kconfig, replacing DSDT and, of course, replacing MB model name? How can I obtain data for devicetree.cb? I must edit irq_tables.c and mptable.c if I try to adapt BIOS from MB with same chipset? And how about cmos.layout?

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PA78VM5 serial problems
by Qing Pei Wang 29 Jun '10

29 Jun '10

hi all, jetway PA78VM5 have already can successfully load linux kernel, but while the kernel booting, the serial port does not send any messages. i have already rebuild the kernel with serial support and the kernel command also added by “console=ttyS0,115200". any ideas ? -- Wang Qing Pei MSN:wangqingpei@hotmail.com <MSN%3Awangqingpei(a)hotmail.com> Gmail:wangqingpei@gmail.com <Gmail%3Awangqingpei(a)gmail.com> Phone:86+13426369984

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Re: [coreboot] #8: Fully support all components of the ITE Super I/Os
by coreboot 28 Jun '10

28 Jun '10

#8: Fully support all components of the ITE Super I/Os ----------------------------------+----------------------------------------- Reporter: uwe | Owner: uwe Type: defect | Status: closed Priority: major | Milestone: Component: coreboot | Resolution: abandoned Keywords: | Dependencies: Patch Status: there is no patch | ----------------------------------+----------------------------------------- Changes (by stepan): * status: new => closed * patchstatus: => there is no patch * resolution: => abandoned Comment: We will never be able to support all hardware that is out there. Trying to keep a pseudo complete list in this bug tracker without anyone working on it systematically in four years is not getting us further. If we need a "who's working on what" list, we should find another solution. -- Ticket URL: <https://tracker.coreboot.org/trac/coreboot/ticket/8#comment:4> coreboot <http://www.coreboot.org/>

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coreboot June 2010