>>> +++ src/cpu/amd/model_gx2/cache_as_ram.inc (revision 0)
>>> + post_code(0xc5)
>>> + hlt /* issues */
>>> + jmp DCacheSetupBad
>>Should this maybe fail more loudly than a POST code, which can be
>>disbled completely. Would be nice to say something on serial.
>I would like that but that`s how it is in Geode LX.
>I try if can do a follow up patch for that after this is in. OK?
I spent some time trying to get a debug message printed here but i am
probably to stupid.
I tried with printk and print_debug but the assembler complained.
Could someone perhaps point me to an example in another assembler file?
I could not find one.
I'm thinking about buying an Asus M2A-VM but the wiki page  saying
4GB of RAM doesn't work and listing sensors/fan control/ACPI as WIP
worries me. The wiki was last updated about a year ago. Does this info
still represent the current state of things?
29.06.2010 09:55, anders(a)jenbo.dk wrote:
> NVIDIA based boards are not supported as NVIDIA isn't providing
So in what way was made support of ck804/mcp55? Reversing original BIOS?
> Irc_tables can be generated using a tool in the utils folder.
> Devicetree is basically that you get from lspci -tvnn an superiotool.
> Mvh Anders
Still have question about K10/K8 initialization routines - can they be
combined in one BIOS?
I experimented with K10+ CPUs and boards that doesn't support them, and
on some boards it's possible to start new CPUs with BIOS from board on
same (or closely relative, like GeForce7025/NForce520 pair) chipset -
possible with some bugs, possible without all working fuctions, or even
sysnem that hangs on late BIOS initialisation stages - but CPU is
successfully initialized. Also there are many enough old AM2 boards,
that have AM2+/AM3 CPU support. So incompatibility of new CPUs with old
hardware is only on software level (or 'semi-hardware' - when there
aren't enough place in flash to fit new K10-related modules and microcodes).
I looked to coreboot because it looks like it can be enough functional
replacement of native BIOS. And I want to try to make some experiments
I have some MBs for experiments (Asus M2V-MX, Biostar GeForce7025, Palit
NForce520 - that is AM2+/AM3 CPU compatible, MSI K9N4 Ultra MS-7310, and
some Biostar on K8T800 - but as I understand this bridge can't be
correctly initialized by coreboot). GeForce7025 and NForce520 boards
have compatible BIOS - at least, after swapping of flashes they can
successfully load MS-DOS from USB flash, and work with PCI/PCI-E
videocards - so it looks that they use reference design. Also I have
Willem programmer (still without PLCC parallel flash adapter because it
was unneeded for me for many years - but I'll make it soon) and POST
card, some knowledge in PC hardware and programming, and sometimes have
some free time that I can spent for such experiments.
After look at code I have some questions:
1) Coreboot image that is assembled for K10, will support K8 CPUs? And
how about K10.5 AthlonII/PhenomII CPUs (generic AM2+ boards can
successfully run AM3 CPUs)?
2) To change CPU family - it's enough to replace family in Kconfig and
replace included files in romstage.c?
3) Why you don't use generic AMD memory routines and CPUID detection for
CPU family at initialization, and possible conditional compiling of code
if somebody will need to disable support of K8 or K10+ - for ex., for
flash space saving?
4) And what I need for try to create bios for unsupported MB if I take
one working as basic? Except modifying Kconfig, replacing DSDT and, of
course, replacing MB model name? How can I obtain data for
devicetree.cb? I must edit irq_tables.c and mptable.c if I try to adapt
BIOS from MB with same chipset? And how about cmos.layout?
jetway PA78VM5 have already can successfully load linux kernel, but while
the kernel booting, the serial port does
not send any messages. i have already rebuild the kernel with serial support
and the kernel command also added by
any ideas ?
Wang Qing Pei
#8: Fully support all components of the ITE Super I/Os
Reporter: uwe | Owner: uwe
Type: defect | Status: closed
Priority: major | Milestone:
Component: coreboot | Resolution: abandoned
Keywords: | Dependencies:
Patch Status: there is no patch |
Changes (by stepan):
* status: new => closed
* patchstatus: => there is no patch
* resolution: => abandoned
We will never be able to support all hardware that is out there. Trying to
keep a pseudo complete list in this bug tracker without anyone working on
it systematically in four years is not getting us further. If we need a
"who's working on what" list, we should find another solution.
Ticket URL: <https://tracker.coreboot.org/trac/coreboot/ticket/8#comment:4>