by Mayhall, Anthony J. (MSFC-ES53)[Dynamic Concepts Inc.]
Has anyone ever put together a motherboard configuration using the nVidia CK804, AMD Fam 10 and Winbond W83627HF SuperI/O chipsets? And has anyone used CoreBoot with the 6 core AMD Opteron processors?
Dynamic Concepts, Inc.
i make an addition to getpir,
getpir works are before without any commandline parameters.
when applying for example build\coreboot_ram as parameter
it looks in the file for the PIRQ table prints it to stdout
and shows if the checksum is correct.
THis is very handy for developing a PIRQ table.
PS this patch was send before, but was not applied to svn.
I've just downloaded and built SeaBIOS ready to use with CoreBoot on my
old MSI 6119 motherboard. Unfortunately, CoreBoot is stopping with a
build error in src/lib/uart8250.c with an undeclared CONFIG_TTYS0_BASE
error on line 83. I have checked and serial console output is definitely
disabled in menuconfig.
Any ideas why? I'm using the latest svn checkout, many thanks!
One very high maintenance cat living here.
Check the return value of ulzma, and quit instead of loading the next
segment if there's an error.
Size pointers 8 characters instead of 16 to beautify the common case
where selfboot is loading something into memory below 4GB.
Signed-off-by: Myles Watson <mylesgw(a)gmail.com>
A while back I sent a fix for the MCP55 azalia driver which prevented
coreboot from hanging and at the same time allowed per-board Azalia
VERBs. The attached patch implements per-board VERBs for all MCP55
boards, and as I don't have the correct VERBs for all boards, uses the
default MCP55 VERB for all of them.