coreboot May 2009

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[v2] r4261 - trunk/coreboot-v2/util/cbfstool
by svn＠coreboot.org 08 May '09

08 May '09

Author: rminnich Date: 2009-05-08 21:23:00 +0200 (Fri, 08 May 2009) New Revision: 4261 Modified: trunk/coreboot-v2/util/cbfstool/cbfs.h trunk/coreboot-v2/util/cbfstool/cbfstool.h trunk/coreboot-v2/util/cbfstool/fs.c trunk/coreboot-v2/util/cbfstool/util.c Log: I have made a very simple mod to cbfstool that is compatible with the src/lib/ code in coreboot. I.e. the tool changes but the coreboot code does not. Currently, as cbfstool manages the ROM, there are files and empty space. To allocate files, the code does, first, a walk of the headers and, if that fails, does a brute-force search of the rest of the space. We all agree that the brute-force search has lots of problems from a performance and correctness standpoint. I've made a slight change. Instead of an "empty space" area with no valid headers, I've made a header for the empty space. So cbfs creation looks like this: - set up the boot block - create a file, of type CBFS_COMPONENT_NULL, that contains the empty space. CBFS_COMPONENT_NULL was already defined in cbfs.h Here's an example: [rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs create 1048576 2048 (cbfstool) E: Unable to open (null): Bad address [rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs print testcbfs: 1024 kB, bootblocksize 2048, romsize 1048576, offset 0x0 Alignment: 16 bytes Name Offset Type Size 0x0 0xffffffff 1046456 So how do we create a new file? It's easy: walk the files and find a file of type CBFS_COMPONENT_NULL, which is as large or larger than the file you are trying to create. Then you use that file. - if the file is the same size as the NULL file, then it's easy: take it - if the file is smaller than the NULL file, you split the NULL file into two parts. note that this works in the base case: the base case is that the whole storage is CBFS_COMPONENT_NULL. Here's an example of adding a file. [rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs add-stage testfixed t [rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs print testcbfs: 1024 kB, bootblocksize 2048, romsize 1048576, offset 0x0 Alignment: 16 bytes Name Offset Type Size t 0x0 stage 23176 0x5ab0 0xffffffff 1023240 Note that the NULL split and got smaller. But the entire ROM is still contained by the two files. To walk this entire rom will require two FLASH accesses. Add another file: [rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs add-stage testfixed tt [rminnich@xcpu2 cbfstool]$ ./cbfstool testcbfs print testcbfs: 1024 kB, bootblocksize 2048, romsize 1048576, offset 0x0 Alignment: 16 bytes Name Offset Type Size t 0x0 stage 23176 tt 0x5ab0 stage 23176 0xb560 0xffffffff 1000024 [rminnich@xcpu2 cbfstool]$ So, taking current ROMs as an example, I can reduce FLASH accesses for cbfs from (potentially) thousands to (typically) less than 10. Index: fs.c Changes for readability and cleanliness. Move common blobs of code to functions. New function: rom_alloc,which allocates files by finding NULL files and using/splitting. Other changes as needed to support this usage. Index: util.c Creating a cbfs archive now requires creation of a NULL file covering the file system space. Index: cbfs.h Add a DELETED file type with value 0. Any file can be marked deleted by zero its type; this is a FLASH-friendly definition for all known FLASH types. Signed-off-by: Ronald G. Minnich <rminnich(a)gmail.com> I think it is a step in the right direction. Could you add the function prototype to cbfstool.h? Acked-by: Myles Watson <mylesgw(a)gmail.com> (I added the prototype) Modified: trunk/coreboot-v2/util/cbfstool/cbfs.h =================================================================== --- trunk/coreboot-v2/util/cbfstool/cbfs.h 2009-05-08 00:45:47 UTC (rev 4260) +++ trunk/coreboot-v2/util/cbfstool/cbfs.h 2009-05-08 19:23:00 UTC (rev 4261) @@ -38,6 +38,16 @@ #define CBFS_COMPONENT_PAYLOAD 0x20 #define CBFS_COMPONENT_OPTIONROM 0x30 +/* The deleted type is chosen to be a value + * that can be written in a FLASH from all other + * values. + */ +#define CBFS_COMPONENT_DELETED 0 + +/* for all known FLASH, this value can be changed + * to all other values. This allows NULL files to be + * changed without a block erase + */ #define CBFS_COMPONENT_NULL 0xFFFFFFFF /** this is the master cbfs header - it need to be Modified: trunk/coreboot-v2/util/cbfstool/cbfstool.h =================================================================== --- trunk/coreboot-v2/util/cbfstool/cbfstool.h 2009-05-08 00:45:47 UTC (rev 4260) +++ trunk/coreboot-v2/util/cbfstool/cbfstool.h 2009-05-08 19:23:00 UTC (rev 4261) @@ -71,6 +71,8 @@ struct cbfs_file *rom_find_first(struct rom *); struct cbfs_file *rom_find_next(struct rom *, struct cbfs_file *); int rom_add(struct rom *rom, const char *name, void *, int size, int type); +int rom_set_header(struct rom *rom, struct cbfs_file *c, + const char*name, int size, int type); int rom_extract(struct rom *rom, const char *name, void **buf, unsigned long *size); int rom_remove(struct rom *rom, const char *name); unsigned int rom_used_space(struct rom *rom); Modified: trunk/coreboot-v2/util/cbfstool/fs.c =================================================================== --- trunk/coreboot-v2/util/cbfstool/fs.c 2009-05-08 00:45:47 UTC (rev 4260) +++ trunk/coreboot-v2/util/cbfstool/fs.c 2009-05-08 19:23:00 UTC (rev 4261) @@ -18,8 +18,140 @@ */ #include <string.h> +#include <stdlib.h> #include "cbfstool.h" +int namelen(const char *name) +{ + return ALIGN(strlen(name) + 1, 16); +} + +/** + * Given a name, return the header size for that name. + * @param name The name + * @returns The header size given that name + */ +int headersize(const char *name) +{ + return sizeof(struct cbfs_file) + namelen(name); +} + +/** + * Given a name, set it into the header in a standard way + * @param file the cbfs file + * @param name The name + */ +void setname(struct cbfs_file *file, const char *name) +{ + memset(CBFS_NAME(file), 0, namelen(name)); + strcpy((char *)CBFS_NAME(file), name); +} + +/** + * Given a name, size, and type, set them into the header in a standard way. + * Special case of size of -1: set the size to all of ROM + * @param rom The rom + * @param c The cbfs file + * @param name The name + * @param size The size + * @param type The type + * @returns Always 0 for now + */ +int rom_set_header(struct rom *rom, struct cbfs_file *c, const char *name, int size, int type) +{ + unsigned int csize; + csize = headersize(name); + + strcpy(c->magic, COMPONENT_MAGIC); + + /* special case -- if size is -1, means "as much as you can" + * it's usually only used in init. + */ + if (size < 0) + size = rom->fssize - csize; + c->len = htonl(size); + c->offset = htonl(csize); + c->type = htonl(type); + + setname(c, name); + return 0; +} + +int nextfile(struct rom *rom, struct cbfs_file *c, int offset) +{ + return ALIGN(offset + ntohl(c->len), + ntohl(rom->header->align)); +} + +/** + * rom_alloc + * Given a rom, walk the headers and find the first header of type + * CBFS_COMPONENT_NULL that is >= the desired size. + * If the CBFS_COMPONENT_NULL is 'align' bytes > size, + * create a new header of CBFS_COMPONENT_NULL following the file. + * The 'len' structure member of the desired file is initialized, but + * nothing else is. + * @param rom The rom + * @param size the size of the file needed + * @returns pointer to a cbfs_file struct. + */ +struct cbfs_file * rom_alloc(struct rom *rom, unsigned long size) +{ + /* walk the rom and find an empty file with a base > base, and a large enough size */ + unsigned int offset = ntohl(rom->header->offset); + unsigned int ret = -1; + struct cbfs_file *c = NULL; + unsigned long nextoffset, truncoffset; + struct cbfs_file *newfile = NULL; + + while (offset < rom->fssize) { + + c = (struct cbfs_file *)ROM_PTR(rom, offset); + + if (!strcmp(c->magic, COMPONENT_MAGIC)) { + if (c->type != CBFS_COMPONENT_NULL) { + offset += ALIGN(ntohl(c->offset) + ntohl(c->len), + ntohl(rom->header->align)); + continue; + } + /* Is this file big enough for our needs? */ + if (ntohl(c->len) >= size){ + ret = offset; + break; + } + offset += ALIGN(ntohl(c->offset) + ntohl(c->len), + ntohl(rom->header->align)); + } else { + fprintf(stderr, "Corrupt rom -- found no header at %d\n", offset); + exit(1); + } + } + + if (ret < 0) + return NULL; + + /* figure out the real end of this file, and hence the size */ + /* compute where the next file is */ + nextoffset = ALIGN(ret + ntohl(c->len) + headersize((char *)CBFS_NAME(c)), + ntohl(rom->header->align)); + /* compute where the end of this new file might be */ + truncoffset = ALIGN(ret + size + headersize((char *)CBFS_NAME(c)), + ntohl(rom->header->align)); + /* If there is more than align bytes difference, create a new empty file */ + /* later, we can add code to merge all empty files. */ + if (nextoffset - truncoffset > ntohl(rom->header->align)) { + unsigned int csize; + csize = headersize(""); + newfile = (struct cbfs_file *)ROM_PTR(rom, truncoffset); + rom_set_header(rom, newfile, "", + nextoffset - truncoffset - csize, CBFS_COMPONENT_NULL); + } else truncoffset = nextoffset; + + c->len = htonl(size); + + return ((struct cbfs_file *)ROM_PTR(rom, ret)); +} + struct cbfs_file *rom_find(struct rom *rom, unsigned int offset) { while (offset < rom->fssize) { @@ -49,29 +181,6 @@ ntohl(rom->header->align))); } -struct cbfs_file *rom_find_empty(struct rom *rom) -{ - unsigned int offset = ntohl(rom->header->offset); - unsigned int ret = ntohl(rom->header->offset); - - while (offset < rom->fssize) { - - struct cbfs_file *c = - (struct cbfs_file *)ROM_PTR(rom, offset); - - if (!strcmp(c->magic, COMPONENT_MAGIC)) { - offset += ALIGN(ntohl(c->offset) + ntohl(c->len), - ntohl(rom->header->align)); - - ret = offset; - } else - offset += ntohl(rom->header->align); - } - - return (ret < rom->fssize) ? - (struct cbfs_file *)ROM_PTR(rom, ret) : NULL; -} - struct cbfs_file *rom_find_by_name(struct rom *rom, const char *name) { struct cbfs_file *c = rom_find_first(rom); @@ -92,44 +201,37 @@ unsigned int ret = 0; while (c) { - ret = ROM_OFFSET(rom, c) + ntohl(c->offset) + ntohl(c->len); + int type; + type = ntohl(c->type); + if ((c->type == CBFS_COMPONENT_DELETED) || + (c->type == CBFS_COMPONENT_NULL)) + continue; + ret += ROM_OFFSET(rom, c) + ntohl(c->offset) + ntohl(c->len); c = rom_find_next(rom, c); } return ret; } +/** + * delete an item. This is a flash-friendly version -- it just blows the + * type to 0. Nothing else is changed. + * N.B. We no longer shuffle contents of ROM. That will come later. + * @param rom The rom + * @param name Name of file to remove. + * @return -1 on error, 0 if a file was set to deleted. + */ int rom_remove(struct rom *rom, const char *name) { struct cbfs_file *c = rom_find_by_name(rom, name); - struct cbfs_file *n; - int clear; if (c == NULL) { ERROR("Component %s does not exist\n", name); return -1; } - /* Get the next component - and copy it into the current space if it - * exists. If there is no next component, just delete c. */ + c->type = CBFS_COMPONENT_DELETED; - n = rom_find_next(rom, c); - - if (n != NULL) { - memcpy(c, n, rom->fssize - ROM_OFFSET(rom, n)); - clear = ROM_OFFSET(rom, n) - ROM_OFFSET(rom, c); - } - else { /* No component after this one. */ - unsigned int csize; - csize = sizeof(struct cbfs_file) + ALIGN(strlen(name) + 1, 16); - clear = ntohl(c->len) + csize; - memcpy(c, ((void*)c) + clear, - rom->fssize - (ROM_OFFSET(rom, c)+clear)); - } - - /* Zero the new space, which is always at the end. */ - memset(ROM_PTR(rom, rom->fssize - clear), 0, clear); - return 0; } @@ -145,14 +247,24 @@ *size = ntohl(c->len); - csize = sizeof(struct cbfs_file) + ALIGN(strlen(name) + 1, 16); + csize = headersize(name); *buf = ((unsigned char *)c) + csize; return 0; } +/** + * Add a new file named 'name', of type 'type', size 'size'. Initialize that file + * with the contents of 'buffer'. + * @param rom The rom + * @param name file name + * @param buffer file data + * @param size Amount of data + * @param type File type + * @returns -1 on failure, 0 on success + */ int rom_add(struct rom *rom, const char *name, void *buffer, int size, int type) { - struct cbfs_file *c = rom_find_empty(rom); + struct cbfs_file *c = rom_alloc(rom, size); unsigned int offset; unsigned int csize; @@ -166,27 +278,18 @@ return -1; } - csize = sizeof(struct cbfs_file) + ALIGN(strlen(name) + 1, 16); + csize = headersize(name); offset = ROM_OFFSET(rom, c); - if (offset + csize + size > rom->fssize) { - ERROR("There is not enough room in this ROM for this\n"); - ERROR("component. I need %d bytes, only have %d bytes avail\n", - csize + size, rom->fssize - offset); - - return -1; - } - strcpy(c->magic, COMPONENT_MAGIC); - c->len = htonl(size); c->offset = htonl(csize); c->type = htonl(type); - memset(CBFS_NAME(c), 0, ALIGN(strlen(name) + 1, 16)); - strcpy((char *)CBFS_NAME(c), name); + setname(c, name); memcpy(((unsigned char *)c) + csize, buffer, size); return 0; } + Modified: trunk/coreboot-v2/util/cbfstool/util.c =================================================================== --- trunk/coreboot-v2/util/cbfstool/util.c 2009-05-08 00:45:47 UTC (rev 4260) +++ trunk/coreboot-v2/util/cbfstool/util.c 2009-05-08 19:23:00 UTC (rev 4261) @@ -218,6 +218,9 @@ ROM_WRITEL(rom, rom->size - 4, 0xFFFFFFF0 - bootblocksize - sizeof(struct cbfs_header)); + + /* write the empty header */ + rom_set_header(rom, (struct cbfs_file *)rom->ptr, "", -1, CBFS_COMPONENT_NULL); return 0; }

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[flashrom] r477 - trunk
by svn＠coreboot.org 08 May '09

08 May '09

Author: uwe Date: 2009-05-08 19:50:51 +0200 (Fri, 08 May 2009) New Revision: 477 Modified: trunk/chipset_enable.c Log: Make chipset list alphabetically ordered as the other lists. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/chipset_enable.c =================================================================== --- trunk/chipset_enable.c 2009-05-08 17:43:22 UTC (rev 476) +++ trunk/chipset_enable.c 2009-05-08 17:50:51 UTC (rev 477) @@ -878,62 +878,57 @@ #define OK 0 #define NT 1 /* Not tested */ +/* Please keep this list alphabetically sorted by vendor/device. */ static const FLASH_ENABLE enables[] = { - {0x1039, 0x0630, NT, "SiS", "SiS630", enable_flash_sis630}, - {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, - {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, - {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, - {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, + {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, + {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, + {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, + {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, + {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, + {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, + {0x1002, 0x438D, OK, "AMD", "SB600", enable_flash_sb600}, + {0x1002, 0x439d, OK, "AMD", "SB700", enable_flash_sb600}, + {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, + {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, + {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, - {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, + {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, + {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, + {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, + {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, + {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, + {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, + {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, {0x8086, 0x244c, OK, "Intel", "ICH2-M", enable_flash_ich_4e}, + {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, {0x8086, 0x2480, OK, "Intel", "ICH3-S", enable_flash_ich_4e}, - {0x8086, 0x248c, OK, "Intel", "ICH3-M", enable_flash_ich_4e}, {0x8086, 0x24c0, OK, "Intel", "ICH4/ICH4-L", enable_flash_ich_4e}, {0x8086, 0x24cc, OK, "Intel", "ICH4-M", enable_flash_ich_4e}, {0x8086, 0x24d0, OK, "Intel", "ICH5/ICH5R", enable_flash_ich_4e}, - {0x8086, 0x25a1, OK, "Intel", "6300ESB", enable_flash_ich_4e}, - {0x8086, 0x2670, OK, "Intel", "631xESB/632xESB/3100", enable_flash_ich_dc}, {0x8086, 0x2640, OK, "Intel", "ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, OK, "Intel", "ICH6-M", enable_flash_ich_dc}, - {0x8086, 0x5031, OK, "Intel", "EP80579", enable_flash_ich7}, {0x8086, 0x27b0, OK, "Intel", "ICH7DH", enable_flash_ich7}, {0x8086, 0x27b8, OK, "Intel", "ICH7/ICH7R", enable_flash_ich7}, {0x8086, 0x27b9, OK, "Intel", "ICH7M", enable_flash_ich7}, {0x8086, 0x27bd, OK, "Intel", "ICH7MDH", enable_flash_ich7}, - {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, - {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, + {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2812, OK, "Intel", "ICH8DH", enable_flash_ich8}, {0x8086, 0x2814, OK, "Intel", "ICH8DO", enable_flash_ich8}, + {0x8086, 0x2810, OK, "Intel", "ICH8/ICH8R", enable_flash_ich8}, {0x8086, 0x2815, OK, "Intel", "ICH8M", enable_flash_ich8}, + {0x8086, 0x2811, OK, "Intel", "ICH8M-E", enable_flash_ich8}, + {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, {0x8086, 0x2912, OK, "Intel", "ICH9DH", enable_flash_ich9}, {0x8086, 0x2914, OK, "Intel", "ICH9DO", enable_flash_ich9}, + {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, + {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, {0x8086, 0x2916, OK, "Intel", "ICH9R", enable_flash_ich9}, - {0x8086, 0x2917, OK, "Intel", "ICH9M-E", enable_flash_ich9}, - {0x8086, 0x2918, OK, "Intel", "ICH9", enable_flash_ich9}, - {0x8086, 0x2919, OK, "Intel", "ICH9M", enable_flash_ich9}, - {0x8086, 0x3a14, OK, "Intel", "ICH10DO", enable_flash_ich10}, - {0x8086, 0x3a16, OK, "Intel", "ICH10R", enable_flash_ich10}, - {0x8086, 0x3a18, OK, "Intel", "ICH10", enable_flash_ich10}, - {0x8086, 0x3a1a, OK, "Intel", "ICH10D", enable_flash_ich10}, - {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, - {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, - {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, - {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, - {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, - {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, - {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, - {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, - {0x1078, 0x0100, OK, "AMD", "CS5530(A)", enable_flash_cs5530}, - {0x100b, 0x0510, NT, "AMD", "SC1100", enable_flash_sc1100}, - {0x1039, 0x0008, OK, "SiS", "SiS5595", enable_flash_sis5595}, - {0x1022, 0x2080, OK, "AMD", "CS5536", enable_flash_cs5536}, - {0x1022, 0x7468, OK, "AMD", "AMD8111", enable_flash_amd8111}, - {0x1002, 0x438D, OK, "AMD", "SB600", enable_flash_sb600}, - {0x1002, 0x439d, OK, "AMD", "SB700", enable_flash_sb600}, - {0x10B9, 0x1533, OK, "ALi", "M1533", enable_flash_ali_m1533}, + {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x7000, OK, "Intel", "PIIX3", enable_flash_piix4}, + {0x8086, 0x7110, OK, "Intel", "PIIX4/4E/4M", enable_flash_piix4}, + {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, {0x10de, 0x0050, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* LPC */ {0x10de, 0x0051, OK, "NVIDIA", "CK804", enable_flash_ck804}, /* Pro */ /* Slave, should not be here, to fix known bug for A01. */ @@ -951,10 +946,16 @@ {0x10de, 0x0366, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* LPC */ {0x10de, 0x0367, OK, "NVIDIA", "MCP55", enable_flash_mcp55}, /* Pro */ {0x10de, 0x0548, OK, "NVIDIA", "MCP67", enable_flash_mcp55}, - {0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400}, - {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, - {0x1022, 0x3000, OK, "AMD", "Elan SC520", get_flashbase_sc520}, - {0x1022, 0x7440, OK, "AMD", "AMD-768", enable_flash_amd8111}, + {0x1039, 0x0008, OK, "SiS", "SiS5595", enable_flash_sis5595}, + {0x1039, 0x0630, NT, "SiS", "SiS630", enable_flash_sis630}, + {0x1106, 0x8324, OK, "VIA", "CX700", enable_flash_vt823x}, + {0x1106, 0x8231, NT, "VIA", "VT8231", enable_flash_vt823x}, + {0x1106, 0x3177, OK, "VIA", "VT8235", enable_flash_vt823x}, + {0x1106, 0x3227, OK, "VIA", "VT8237", enable_flash_vt823x}, + {0x1106, 0x3337, OK, "VIA", "VT8237A", enable_flash_vt823x}, + {0x1106, 0x3372, OK, "VIA", "VT8237S", enable_flash_vt8237s_spi}, + {0x1106, 0x0586, OK, "VIA", "VT82C586A/B", enable_flash_amd8111}, + {0x1106, 0x0686, NT, "VIA", "VT82C686A/B", enable_flash_amd8111}, }; void print_supported_chipsets(void)

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[PATCH] flashrom: External flasher support
by Carl-Daniel Hailfinger 08 May '09

08 May '09

To prepare flashrom for Paraflasher (or other external flasher) support, each chip read/write access is either handled as memory mapped access or external flasher cycle. External flashers can set the flasher variable to their own ID/number during startup and handle accesses in the switch statement inside chip_{read,write}[bwl]. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-external_infrastructure/flash.h =================================================================== --- flashrom-external_infrastructure/flash.h (Revision 471) +++ flashrom-external_infrastructure/flash.h (Arbeitskopie) @@ -76,36 +76,6 @@ #endif #endif -static inline void chip_writeb(uint8_t b, volatile void *addr) -{ - *(volatile uint8_t *) addr = b; -} - -static inline void chip_writew(uint16_t b, volatile void *addr) -{ - *(volatile uint16_t *) addr = b; -} - -static inline void chip_writel(uint32_t b, volatile void *addr) -{ - *(volatile uint32_t *) addr = b; -} - -static inline uint8_t chip_readb(const volatile void *addr) -{ - return *(volatile uint8_t *) addr; -} - -static inline uint16_t chip_readw(const volatile void *addr) -{ - return *(volatile uint16_t *) addr; -} - -static inline uint32_t chip_readl(const volatile void *addr) -{ - return *(volatile uint32_t *) addr; -} - #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) struct flashchip { @@ -550,6 +520,15 @@ int coreboot_init(void); extern char *lb_part, *lb_vendor; +/* external.c */ +void chip_writeb(uint8_t b, volatile void *addr); +void chip_writew(uint16_t b, volatile void *addr); +void chip_writel(uint32_t b, volatile void *addr); +uint8_t chip_readb(const volatile void *addr); +uint16_t chip_readw(const volatile void *addr); +uint32_t chip_readl(const volatile void *addr); +int read_memmapped(struct flashchip *flash, uint8_t *buf); + /* spi.c */ int probe_spi_rdid(struct flashchip *flash); int probe_spi_rdid4(struct flashchip *flash); Index: flashrom-external_infrastructure/Makefile =================================================================== --- flashrom-external_infrastructure/Makefile (Revision 471) +++ flashrom-external_infrastructure/Makefile (Arbeitskopie) @@ -34,7 +34,7 @@ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o \ sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o physmap.o \ flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \ - ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o + ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o external.o all: pciutils dep $(PROGRAM) Index: flashrom-external_infrastructure/external.c =================================================================== --- flashrom-external_infrastructure/external.c (Revision 0) +++ flashrom-external_infrastructure/external.c (Revision 0) @@ -0,0 +1,111 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include "flash.h" + +int flasher = 0; +#define FLASHER_INTERNAL 0 +#define FLASHER_PARAFLASHER 1 + +#define POISON_BYTE 0x5a + +void chip_writeb(uint8_t b, volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + *(volatile uint8_t *) addr = b; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + } +} + +void chip_writew(uint16_t b, volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + *(volatile uint16_t *) addr = b; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + } +} + +void chip_writel(uint32_t b, volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + *(volatile uint32_t *) addr = b; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + } +} + +uint8_t chip_readb(const volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + return *(volatile uint8_t *) addr; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + return POISON_BYTE; + } +} + +uint16_t chip_readw(const volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + return *(volatile uint16_t *) addr; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + return (POISON_BYTE << 8) | POISON_BYTE; + } +} + +uint32_t chip_readl(const volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + return *(volatile uint32_t *) addr; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + return (POISON_BYTE << 24) | (POISON_BYTE << 16) | + (POISON_BYTE << 8) | POISON_BYTE; + } +} + +int read_memmapped(struct flashchip *flash, uint8_t *buf) +{ + int i; + + /* We could do a memcpy as optimization if the flash is onboard */ + //memcpy(buf, (const char *)flash->virtual_memory, flash->total_size * 1024); + for (i = 0; i < flash->total_size * 1024; i++) + buf[i] = chip_readb(flash->virtual_memory + i); + + return 0; +} + -- http://www.hailfinger.org/ Index: flashrom-external_infrastructure/flash.h =================================================================== --- flashrom-external_infrastructure/flash.h (Revision 471) +++ flashrom-external_infrastructure/flash.h (Arbeitskopie) @@ -76,36 +76,6 @@ #endif #endif -static inline void chip_writeb(uint8_t b, volatile void *addr) -{ - *(volatile uint8_t *) addr = b; -} - -static inline void chip_writew(uint16_t b, volatile void *addr) -{ - *(volatile uint16_t *) addr = b; -} - -static inline void chip_writel(uint32_t b, volatile void *addr) -{ - *(volatile uint32_t *) addr = b; -} - -static inline uint8_t chip_readb(const volatile void *addr) -{ - return *(volatile uint8_t *) addr; -} - -static inline uint16_t chip_readw(const volatile void *addr) -{ - return *(volatile uint16_t *) addr; -} - -static inline uint32_t chip_readl(const volatile void *addr) -{ - return *(volatile uint32_t *) addr; -} - #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) struct flashchip { @@ -550,6 +520,15 @@ int coreboot_init(void); extern char *lb_part, *lb_vendor; +/* external.c */ +void chip_writeb(uint8_t b, volatile void *addr); +void chip_writew(uint16_t b, volatile void *addr); +void chip_writel(uint32_t b, volatile void *addr); +uint8_t chip_readb(const volatile void *addr); +uint16_t chip_readw(const volatile void *addr); +uint32_t chip_readl(const volatile void *addr); +int read_memmapped(struct flashchip *flash, uint8_t *buf); + /* spi.c */ int probe_spi_rdid(struct flashchip *flash); int probe_spi_rdid4(struct flashchip *flash); Index: flashrom-external_infrastructure/Makefile =================================================================== --- flashrom-external_infrastructure/Makefile (Revision 471) +++ flashrom-external_infrastructure/Makefile (Arbeitskopie) @@ -34,7 +34,7 @@ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o \ sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o physmap.o \ flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \ - ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o + ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o external.o all: pciutils dep $(PROGRAM) Index: flashrom-external_infrastructure/external.c =================================================================== --- flashrom-external_infrastructure/external.c (Revision 0) +++ flashrom-external_infrastructure/external.c (Revision 0) @@ -0,0 +1,111 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include "flash.h" + +int flasher = 0; +#define FLASHER_INTERNAL 0 +#define FLASHER_PARAFLASHER 1 + +#define POISON_BYTE 0x5a + +void chip_writeb(uint8_t b, volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + *(volatile uint8_t *) addr = b; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + } +} + +void chip_writew(uint16_t b, volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + *(volatile uint16_t *) addr = b; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + } +} + +void chip_writel(uint32_t b, volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + *(volatile uint32_t *) addr = b; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + } +} + +uint8_t chip_readb(const volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + return *(volatile uint8_t *) addr; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + return POISON_BYTE; + } +} + +uint16_t chip_readw(const volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + return *(volatile uint16_t *) addr; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + return (POISON_BYTE << 8) | POISON_BYTE; + } +} + +uint32_t chip_readl(const volatile void *addr) +{ + switch (flasher) { + case FLASHER_INTERNAL: + return *(volatile uint32_t *) addr; + break; + default: + fprintf(stderr, "ERROR: Unsupported flasher hardware!\n"); + return (POISON_BYTE << 24) | (POISON_BYTE << 16) | + (POISON_BYTE << 8) | POISON_BYTE; + } +} + +int read_memmapped(struct flashchip *flash, uint8_t *buf) +{ + int i; + + /* We could do a memcpy as optimization if the flash is onboard */ + //memcpy(buf, (const char *)flash->virtual_memory, flash->total_size * 1024); + for (i = 0; i < flash->total_size * 1024; i++) + buf[i] = chip_readb(flash->virtual_memory + i); + + return 0; +} +

3 9

[flashrom] r476 - trunk
by svn＠coreboot.org 08 May '09

08 May '09

Author: hailfinger Date: 2009-05-08 19:43:22 +0200 (Fri, 08 May 2009) New Revision: 476 Added: trunk/internal.c Modified: trunk/Makefile trunk/flash.h trunk/flashrom.c Log: Add external flasher support: - Read/write accesses through function pointers - Command line parameter for internal/external flasher - Board and chipset setup moved to internal init function - Shutdown stuff moved to internal shutdown function As a side benefit, this will allow us to undo chipset write enable during shutdown. Tested by Uwe on real hardware. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/Makefile =================================================================== --- trunk/Makefile 2009-05-08 17:15:15 UTC (rev 475) +++ trunk/Makefile 2009-05-08 17:43:22 UTC (rev 476) @@ -34,7 +34,7 @@ w49f002u.o 82802ab.o pm49fl00x.o sst49lf040.o en29f002a.o \ sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o physmap.o \ flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \ - ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o + ichspi.o w39v040c.o sb600spi.o wbsio_spi.o m29f002.o internal.o all: pciutils dep $(PROGRAM) Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-05-08 17:15:15 UTC (rev 475) +++ trunk/flash.h 2009-05-08 17:43:22 UTC (rev 476) @@ -76,34 +76,64 @@ #endif #endif -static inline void chip_writeb(uint8_t b, volatile void *addr) +extern int programmer; +#define PROGRAMMER_INTERNAL 0x00 + +struct programmer_entry { + const char *vendor; + const char *name; + + int (*init) (void); + int (*shutdown) (void); + + void (*chip_writeb) (uint8_t val, volatile void *addr); + void (*chip_writew) (uint16_t val, volatile void *addr); + void (*chip_writel) (uint32_t val, volatile void *addr); + uint8_t (*chip_readb) (const volatile void *addr); + uint16_t (*chip_readw) (const volatile void *addr); + uint32_t (*chip_readl) (const volatile void *addr); +}; + +extern const struct programmer_entry programmer_table[]; + +static inline int programmer_init(void) { - *(volatile uint8_t *) addr = b; + return programmer_table[programmer].init(); } -static inline void chip_writew(uint16_t b, volatile void *addr) +static inline int programmer_shutdown(void) { - *(volatile uint16_t *) addr = b; + return programmer_table[programmer].shutdown(); } -static inline void chip_writel(uint32_t b, volatile void *addr) +static inline void chip_writeb(uint8_t val, volatile void *addr) { - *(volatile uint32_t *) addr = b; + programmer_table[programmer].chip_writeb(val, addr); } +static inline void chip_writew(uint16_t val, volatile void *addr) +{ + programmer_table[programmer].chip_writew(val, addr); +} + +static inline void chip_writel(uint32_t val, volatile void *addr) +{ + programmer_table[programmer].chip_writel(val, addr); +} + static inline uint8_t chip_readb(const volatile void *addr) { - return *(volatile uint8_t *) addr; + return programmer_table[programmer].chip_readb(addr); } static inline uint16_t chip_readw(const volatile void *addr) { - return *(volatile uint16_t *) addr; + return programmer_table[programmer].chip_readw(addr); } static inline uint32_t chip_readl(const volatile void *addr) { - return *(volatile uint32_t *) addr; + return programmer_table[programmer].chip_readl(addr); } #define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0])) @@ -535,6 +565,16 @@ void *physmap(const char *descr, unsigned long phys_addr, size_t len); void physunmap(void *virt_addr, size_t len); +/* internal.c */ +int internal_init(void); +int internal_shutdown(void); +void internal_chip_writeb(uint8_t val, volatile void *addr); +void internal_chip_writew(uint16_t val, volatile void *addr); +void internal_chip_writel(uint32_t val, volatile void *addr); +uint8_t internal_chip_readb(const volatile void *addr); +uint16_t internal_chip_readw(const volatile void *addr); +uint32_t internal_chip_readl(const volatile void *addr); + /* flashrom.c */ extern int verbose; #define printf_debug(x...) { if (verbose) printf(x); } Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-05-08 17:15:15 UTC (rev 475) +++ trunk/flashrom.c 2009-05-08 17:43:22 UTC (rev 476) @@ -21,7 +21,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#include <errno.h> #include <fcntl.h> #include <sys/types.h> #include <sys/stat.h> @@ -30,52 +29,28 @@ #include <string.h> #include <stdlib.h> #include <getopt.h> -#include <pci/pci.h> #include "flash.h" char *chip_to_probe = NULL; -struct pci_access *pacc; /* For board and chipset_enable */ int exclude_start_page, exclude_end_page; int verbose = 0; +int programmer = PROGRAMMER_INTERNAL; -struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device) -{ - struct pci_dev *temp; - struct pci_filter filter; +const struct programmer_entry programmer_table[] = { + { + .init = internal_init, + .shutdown = internal_shutdown, + .chip_readb = internal_chip_readb, + .chip_readw = internal_chip_readw, + .chip_readl = internal_chip_readl, + .chip_writeb = internal_chip_writeb, + .chip_writew = internal_chip_writew, + .chip_writel = internal_chip_writel, + }, - pci_filter_init(NULL, &filter); - filter.vendor = vendor; - filter.device = device; + {}, +}; - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) - return temp; - - return NULL; -} - -struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, - uint16_t card_vendor, uint16_t card_device) -{ - struct pci_dev *temp; - struct pci_filter filter; - - pci_filter_init(NULL, &filter); - filter.vendor = vendor; - filter.device = device; - - for (temp = pacc->devices; temp; temp = temp->next) - if (pci_filter_match(&filter, temp)) { - if ((card_vendor == - pci_read_word(temp, PCI_SUBSYSTEM_VENDOR_ID)) - && (card_device == - pci_read_word(temp, PCI_SUBSYSTEM_ID))) - return temp; - } - - return NULL; -} - void map_flash_registers(struct flashchip *flash) { size_t size = flash->total_size * 1024; @@ -362,9 +337,6 @@ int force = 0; int read_it = 0, write_it = 0, erase_it = 0, verify_it = 0; int ret = 0, i; -#if defined(__FreeBSD__) || defined(__DragonFly__) - int io_fd; -#endif static struct option long_options[] = { {"read", 0, 0, 'r'}, @@ -380,6 +352,7 @@ {"layout", 1, 0, 'l'}, {"image", 1, 0, 'i'}, {"list-supported", 0, 0, 'L'}, + {"programmer", 1, 0, 'p'}, {"help", 0, 0, 'h'}, {"version", 0, 0, 'R'}, {0, 0, 0, 0} @@ -401,7 +374,7 @@ } setbuf(stdout, NULL); - while ((opt = getopt_long(argc, argv, "rRwvVEfc:s:e:m:l:i:Lh", + while ((opt = getopt_long(argc, argv, "rRwvVEfc:s:e:m:l:i:p:Lh", long_options, &option_index)) != EOF) { switch (opt) { case 'r': @@ -460,6 +433,14 @@ print_supported_boards(); exit(0); break; + case 'p': + if (strncmp(optarg, "internal", 8) == 0) { + programmer = PROGRAMMER_INTERNAL; + } else { + printf("Error: Unknown programmer.\n"); + exit(1); + } + break; case 'R': /* print_version() is always called during startup. */ exit(0); @@ -479,42 +460,10 @@ if (optind < argc) filename = argv[optind++]; - /* First get full io access */ -#if defined (__sun) && (defined(__i386) || defined(__amd64)) - if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { -#elif defined(__FreeBSD__) || defined (__DragonFly__) - if ((io_fd = open("/dev/io", O_RDWR)) < 0) { -#else - if (iopl(3) != 0) { -#endif - fprintf(stderr, "ERROR: Could not get IO privileges (%s).\nYou need to be root.\n", strerror(errno)); - exit(1); - } + ret = programmer_init(); - /* Initialize PCI access for flash enables */ - pacc = pci_alloc(); /* Get the pci_access structure */ - /* Set all options you want -- here we stick with the defaults */ - pci_init(pacc); /* Initialize the PCI library */ - pci_scan_bus(pacc); /* We want to get the list of devices */ - myusec_calibrate_delay(); - /* We look at the lbtable first to see if we need a - * mainboard specific flash enable sequence. - */ - coreboot_init(); - - /* try to enable it. Failure IS an option, since not all motherboards - * really need this to be done, etc., etc. - */ - ret = chipset_flash_enable(); - if (ret == -2) { - printf("WARNING: No chipset found. Flash detection " - "will most likely fail.\n"); - } - - board_flash_enable(lb_vendor, lb_part); - for (i = 0; i < ARRAY_SIZE(flashes); i++) { flashes[i] = probe_flash(i ? flashes[i - 1] + 1 : flashchips, 0); @@ -704,8 +653,7 @@ if (verify_it) ret |= verify_flash(flash, buf); -#ifdef __FreeBSD__ - close(io_fd); -#endif + programmer_shutdown(); + return ret; } Added: trunk/internal.c =================================================================== --- trunk/internal.c (rev 0) +++ trunk/internal.c 2009-05-08 17:43:22 UTC (rev 476) @@ -0,0 +1,154 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2009 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <stdint.h> +#include <string.h> +#include <stdlib.h> +#include <fcntl.h> +#include <sys/types.h> +#include <sys/stat.h> +#include <errno.h> +#include <pci/pci.h> +#include "flash.h" + +#if defined(__FreeBSD__) || defined(__DragonFly__) +int io_fd; +#endif + +struct pci_access *pacc; /* For board and chipset_enable */ + +struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device) +{ + struct pci_dev *temp; + struct pci_filter filter; + + pci_filter_init(NULL, &filter); + filter.vendor = vendor; + filter.device = device; + + for (temp = pacc->devices; temp; temp = temp->next) + if (pci_filter_match(&filter, temp)) + return temp; + + return NULL; +} + +struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, + uint16_t card_vendor, uint16_t card_device) +{ + struct pci_dev *temp; + struct pci_filter filter; + + pci_filter_init(NULL, &filter); + filter.vendor = vendor; + filter.device = device; + + for (temp = pacc->devices; temp; temp = temp->next) + if (pci_filter_match(&filter, temp)) { + if ((card_vendor == + pci_read_word(temp, PCI_SUBSYSTEM_VENDOR_ID)) + && (card_device == + pci_read_word(temp, PCI_SUBSYSTEM_ID))) + return temp; + } + + return NULL; +} + +int internal_init(void) +{ + int ret = 0; + + /* First get full io access */ +#if defined (__sun) && (defined(__i386) || defined(__amd64)) + if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) { +#elif defined(__FreeBSD__) || defined (__DragonFly__) + if ((io_fd = open("/dev/io", O_RDWR)) < 0) { +#else + if (iopl(3) != 0) { +#endif + fprintf(stderr, "ERROR: Could not get IO privileges (%s).\nYou need to be root.\n", strerror(errno)); + exit(1); + } + + /* Initialize PCI access for flash enables */ + pacc = pci_alloc(); /* Get the pci_access structure */ + /* Set all options you want -- here we stick with the defaults */ + pci_init(pacc); /* Initialize the PCI library */ + pci_scan_bus(pacc); /* We want to get the list of devices */ + + /* We look at the lbtable first to see if we need a + * mainboard specific flash enable sequence. + */ + coreboot_init(); + + /* try to enable it. Failure IS an option, since not all motherboards + * really need this to be done, etc., etc. + */ + ret = chipset_flash_enable(); + if (ret == -2) { + printf("WARNING: No chipset found. Flash detection " + "will most likely fail.\n"); + } + + board_flash_enable(lb_vendor, lb_part); + + return ret; +} + +int internal_shutdown(void) +{ +#if defined(__FreeBSD__) || defined(__DragonFly__) + close(io_fd); +#endif + + return 0; +} + +void internal_chip_writeb(uint8_t val, volatile void *addr) +{ + *(volatile uint8_t *) addr = val; +} + +void internal_chip_writew(uint16_t val, volatile void *addr) +{ + *(volatile uint16_t *) addr = val; +} + +void internal_chip_writel(uint32_t val, volatile void *addr) +{ + *(volatile uint32_t *) addr = val; +} + +uint8_t internal_chip_readb(const volatile void *addr) +{ + return *(volatile uint8_t *) addr; +} + +uint16_t internal_chip_readw(const volatile void *addr) +{ + return *(volatile uint16_t *) addr; +} + +uint32_t internal_chip_readl(const volatile void *addr) +{ + return *(volatile uint32_t *) addr; +} +

1 0

[flashrom] r475 - trunk
by svn＠coreboot.org 08 May '09

08 May '09

Author: hailfinger Date: 2009-05-08 19:15:15 +0200 (Fri, 08 May 2009) New Revision: 475 Modified: trunk/flashrom.c Log: Re-add a line which got deleted in r473 by accident. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-05-08 16:23:34 UTC (rev 474) +++ trunk/flashrom.c 2009-05-08 17:15:15 UTC (rev 475) @@ -236,6 +236,8 @@ fprintf(stderr, "ERROR: flashrom has no erase function for this flash chip.\n"); return 1; } + flash->erase(flash); + if (!flash->read) { printf("FAILED!\n"); fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n");

1 0

[flashrom] Transaction Error with opcode 0x03 failed...
by Stan Yong 08 May '09

08 May '09

Hi all, I'm having problems with the flashrom on my system. I'm trying to read out the rom content from my machine which is a hp machine with ich9 controller and Amtel AT26DF321 flash chip. However, the reading only halfway through and error occur. Anyone encountered this? Can provide some advice on this? Thanks. Attached is the error output: ...sanity check ...outside the Asylum at 0/00/0 ...OK Decided to use Intel-conf1 Scanning bus 00 for devices... Scanning bus 01 for devices... Scanning bus 20 for devices... Scanning bus 30 for devices... Scanning bus 07 for devices... Calibrating delay loop... 648M loops per second. ok No coreboot table found. Found chipset "Intel ICH9DO", enabling flash write... BIOS Lock Enable: enabled, BIOS Write Enable: disabled, BIOS_CNTL is 0x2 tried to set 0xdc to 0x3 (0x2) on Intel ICH9DO failed (WARNING ONLY) Root Complex Register Block address = 0xfed1c000 GCS = 0xb60464: BIOS Interface Lock-Down: disabled, BOOT BIOS Straps: 0x1 (SPI) Top Swap : not enabled SPIBAR = 0xfed1c000 + 0x3800 0x04: 0xe008 (HSFS) FLOCKDN 1, FDV 1, FDOPSS 1, SCIP 0, BERASE 1, AEL 0, FCERR 0, FDONE 0 0x50: 0x00001a1b (FRAP) BMWAG 0, BMRAG 0, BRWA 26, BRRA 27 0x54: 0x00000000 (FREG0) 0x58: 0x03ff0240 (FREG1) 0x5C: 0x023f000b (FREG2) 0x60: 0x00020001 (FREG3) 0x64: 0x000a0003 (FREG4) 0x74: 0x83ff03f0 (PR0) 0x78: 0x00000000 (PR1) 0x7C: 0x00000000 (PR2) 0x80: 0x00000000 (PR3) 0x84: 0x00000000 (PR4) 0x90: 0x007f400c (SSFS, SSFC) 0x94: 0x0606 (PREOP) 0x96: 0xb6f0 (OPTYPE) 0x98: 0x0220059f (OPMENU) 0x9C: 0x03020103 (OPMENU+4) 0xA0: 0x00000000 (BBAR) 0xB0: 0x00000000 (FDOC) WARNING: SPI Configuration Lockdown activated. Generating OPCODES... generate_opcodes: Opcode = 9f generate_opcodes: Opcode = 5 generate_opcodes: Opcode = 20 generate_opcodes: Opcode = 2 generate_opcodes: Opcode = 3 generate_opcodes: Opcode = 1 generate_opcodes: Opcode = 2 generate_opcodes: Opcode = 3 done SPI Read Configuration: prefetching disabled, caching enabled, FAILED! Probing for Atmel AT26DF321, 4096 KB: base = ffc00000, sys_pasgesize = 4096, pagesize = 4194304 BBAR: 0x0 RDID returned 1f 47 00. probe_spi_rdid_generic: id1 0x1f, id2 0x4700 BBAR: 0x0 Chip status register is 10 Found chip "Atmel AT26DF321" (4096 KB) at physical address 0xffc00000. === This flash part has status UNTESTED for operations: PROBE READ ERASE WRITE Please email a report to flashrom(a)coreboot.org if any of the above operations work correctly for you with this flash part. Please include the full output from the program, including chipset found. Thank you for your help! === Reading flash... ich_spi_read_page: offset=0, number=256, buf=01630020 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=256, number=256, buf=01630120 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=512, number=256, buf=01630220 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=768, number=256, buf=01630320 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=1024, number=256, buf=01630420 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=1280, number=256, buf=01630520 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=1536, number=256, buf=01630620 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=1792, number=256, buf=01630720 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=2048, number=256, buf=01630820 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=2304, number=256, buf=01630920 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=2560, number=256, buf=01630A20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=2816, number=256, buf=01630B20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=3072, number=256, buf=01630C20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=3328, number=256, buf=01630D20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=3584, number=256, buf=01630E20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=3840, number=256, buf=01630F20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=4096, number=256, buf=01631020 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=4352, number=256, buf=01631120 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=4608, number=256, buf=01631220 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=4864, number=256, buf=01631320 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=5120, number=256, buf=01631420 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=5376, number=256, buf=01631520 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=5632, number=256, buf=01631620 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=5888, number=256, buf=01631720 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=6144, number=256, buf=01631820 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=6400, number=256, buf=01631920 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=6656, number=256, buf=01631A20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=6912, number=256, buf=01631B20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=7168, number=256, buf=01631C20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=7424, number=256, buf=01631D20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=7680, number=256, buf=01631E20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=7936, number=256, buf=01631F20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=8192, number=256, buf=01632020 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=8448, number=256, buf=01632120 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=8704, number=256, buf=01632220 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=8960, number=256, buf=01632320 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=9216, number=256, buf=01632420 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=9472, number=256, buf=01632520 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=9728, number=256, buf=01632620 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=9984, number=256, buf=01632720 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=10240, number=256, buf=01632820 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=10496, number=256, buf=01632920 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=10752, number=256, buf=01632A20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=11008, number=256, buf=01632B20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=11264, number=256, buf=01632C20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=11520, number=256, buf=01632D20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=11776, number=256, buf=01632E20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=12032, number=256, buf=01632F20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=12288, number=256, buf=01633020 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=12544, number=256, buf=01633120 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=12800, number=256, buf=01633220 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=13056, number=256, buf=01633320 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=13312, number=256, buf=01633420 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=13568, number=256, buf=01633520 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=13824, number=256, buf=01633620 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=14080, number=256, buf=01633720 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=14336, number=256, buf=01633820 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=14592, number=256, buf=01633920 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=14848, number=256, buf=01633A20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=15104, number=256, buf=01633B20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=15360, number=256, buf=01633C20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=15616, number=256, buf=01633D20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=15872, number=256, buf=01633E20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=16128, number=256, buf=01633F20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=16384, number=256, buf=01634020 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=16640, number=256, buf=01634120 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=16896, number=256, buf=01634220 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=17152, number=256, buf=01634320 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=17408, number=256, buf=01634420 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=17664, number=256, buf=01634520 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=17920, number=256, buf=01634620 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=18176, number=256, buf=01634720 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=18432, number=256, buf=01634820 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=18688, number=256, buf=01634920 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=18944, number=256, buf=01634A20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=19200, number=256, buf=01634B20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=19456, number=256, buf=01634C20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=19712, number=256, buf=01634D20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=19968, number=256, buf=01634E20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=20224, number=256, buf=01634F20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=20480, number=256, buf=01635020 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=20736, number=256, buf=01635120 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=20992, number=256, buf=01635220 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=21248, number=256, buf=01635320 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=21504, number=256, buf=01635420 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=21760, number=256, buf=01635520 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=22016, number=256, buf=01635620 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=22272, number=256, buf=01635720 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=22528, number=256, buf=01635820 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=22784, number=256, buf=01635920 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=23040, number=256, buf=01635A20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=23296, number=256, buf=01635B20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=23552, number=256, buf=01635C20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=23808, number=256, buf=01635D20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=24064, number=256, buf=01635E20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=24320, number=256, buf=01635F20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=24576, number=256, buf=01636020 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=24832, number=256, buf=01636120 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=25088, number=256, buf=01636220 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=25344, number=256, buf=01636320 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=25600, number=256, buf=01636420 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=25856, number=256, buf=01636520 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=26112, number=256, buf=01636620 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=26368, number=256, buf=01636720 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=26624, number=256, buf=01636820 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=26880, number=256, buf=01636920 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=27136, number=256, buf=01636A20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=27392, number=256, buf=01636B20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=27648, number=256, buf=01636C20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=27904, number=256, buf=01636D20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=28160, number=256, buf=01636E20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=28416, number=256, buf=01636F20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=28672, number=256, buf=01637020 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=28928, number=256, buf=01637120 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=29184, number=256, buf=01637220 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=29440, number=256, buf=01637320 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=29696, number=256, buf=01637420 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=29952, number=256, buf=01637520 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=30208, number=256, buf=01637620 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=30464, number=256, buf=01637720 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=30720, number=256, buf=01637820 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=30976, number=256, buf=01637920 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=31232, number=256, buf=01637A20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=31488, number=256, buf=01637B20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=31744, number=256, buf=01637C20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=32000, number=256, buf=01637D20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=32256, number=256, buf=01637E20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=32512, number=256, buf=01637F20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=32768, number=256, buf=01638020 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=33024, number=256, buf=01638120 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=33280, number=256, buf=01638220 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=33536, number=256, buf=01638320 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=33792, number=256, buf=01638420 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=34048, number=256, buf=01638520 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=34304, number=256, buf=01638620 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=34560, number=256, buf=01638720 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=34816, number=256, buf=01638820 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=35072, number=256, buf=01638920 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=35328, number=256, buf=01638A20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=35584, number=256, buf=01638B20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=35840, number=256, buf=01638C20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=36096, number=256, buf=01638D20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=36352, number=256, buf=01638E20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=36608, number=256, buf=01638F20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=36864, number=256, buf=01639020 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=37120, number=256, buf=01639120 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=37376, number=256, buf=01639220 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=37632, number=256, buf=01639320 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=37888, number=256, buf=01639420 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=38144, number=256, buf=01639520 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=38400, number=256, buf=01639620 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=38656, number=256, buf=01639720 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=38912, number=256, buf=01639820 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=39168, number=256, buf=01639920 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=39424, number=256, buf=01639A20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=39680, number=256, buf=01639B20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=39936, number=256, buf=01639C20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=40192, number=256, buf=01639D20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=40448, number=256, buf=01639E20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=40704, number=256, buf=01639F20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=40960, number=256, buf=0163A020 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=41216, number=256, buf=0163A120 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=41472, number=256, buf=0163A220 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=41728, number=256, buf=0163A320 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=41984, number=256, buf=0163A420 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=42240, number=256, buf=0163A520 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=42496, number=256, buf=0163A620 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=42752, number=256, buf=0163A720 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=43008, number=256, buf=0163A820 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=43264, number=256, buf=0163A920 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=43520, number=256, buf=0163AA20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=43776, number=256, buf=0163AB20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=44032, number=256, buf=0163AC20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=44288, number=256, buf=0163AD20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=44544, number=256, buf=0163AE20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=44800, number=256, buf=0163AF20 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 BBAR: 0x0 ich_spi_read_page: offset=45056, number=256, buf=0163B020 BBAR: 0x0 Transaction error! run OPCODE 0x03 failed Error readingdone.

4 10

[flashrom] r474 - trunk
by svn＠coreboot.org 08 May '09

08 May '09

Author: uwe Date: 2009-05-08 18:23:34 +0200 (Fri, 08 May 2009) New Revision: 474 Modified: trunk/board_enable.c Log: Keep list of boards alphabetically sorted. This is (among other things) useful/required for the -L output and the upcoming wiki-syntax output of supported boards. Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/board_enable.c =================================================================== --- trunk/board_enable.c 2009-05-08 12:49:03 UTC (rev 473) +++ trunk/board_enable.c 2009-05-08 16:23:34 UTC (rev 474) @@ -654,39 +654,40 @@ int (*enable) (const char *name); }; +/* Please keep this list alphabetically ordered by vendor/board name. */ struct board_pciid_enable board_pciid_enables[] = { /* first pci-id set [4], second pci-id set [4], coreboot id [2], boardname, flash enable */ - {0x1106, 0x0571, 0x1462, 0x7120, 0, 0, 0, 0, "msi", "kt4v", "MSI KT4V", board_msi_kt4v}, + {0x8086, 0x1130, 0, 0, 0x105a, 0x0d30, 0x105a, 0x4d33, "acorp", "6a815epd", "Acorp 6A815EPD", board_acorp_6a815epd}, + {0x1022, 0x746B, 0x1022, 0x36C0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group DBE61", board_artecgroup_dbe6x}, + {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group DBE62", board_artecgroup_dbe6x}, + {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS A7V8-MX SE", board_asus_a7v8x_mx}, {0x8086, 0x1a30, 0x1043, 0x8070, 0x8086, 0x244b, 0x1043, 0x8028, NULL, NULL, "ASUS P4B266", ich2_gpio22_raise}, + {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS P5A", board_asus_p5a}, + {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "BioStar P4M80-M4", board_biostar_p4m80_m4}, + {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX EP-BX3", board_epox_ep_bx3}, + {0x1039, 0x0761, 0, 0, 0, 0, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE GA-2761GXDK", it87xx_probe_spi_flash}, + {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE GA-7VT600", board_biostar_p4m80_m4}, {0x10de, 0x0360, 0, 0, 0, 0, 0, 0, "gigabyte", "m57sli", "GIGABYTE GA-M57SLI-S4", it87xx_probe_spi_flash}, {0x10de, 0x03e0, 0, 0, 0, 0, 0, 0, "gigabyte", "m61p", "GIGABYTE GA-M61P-S3", it87xx_probe_spi_flash}, {0x1002, 0x4398, 0x1458, 0x5004, 0x1002, 0x4385, 0x1458, 0x4385, NULL, NULL, "GIGABYTE GA-MA78G-DS3H", it87xx_probe_spi_flash}, - /* SB600 LPC, RD790 North. Neither are specific to the GA-MA790FX-DQ6. The coreboot ID is here to be able to trigger the board enable more easily. */ {0x1002, 0x438d, 0x1458, 0x5001, 0x1002, 0x5956, 0x1002, 0x5956, "gigabyte", "ma790fx-dq6", "GIGABYTE GA-MA790FX-DQ6", it87xx_probe_spi_flash}, - {0x1039, 0x0761, 0, 0, 0, 0, 0, 0, "gigabyte", "2761gxdk", "GIGABYTE GA-2761GXDK", it87xx_probe_spi_flash}, + {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, "hp", "dl145_g3", "HP DL145 G3", board_hp_dl145_g3_enable}, + {0x1166, 0x0205, 0x1014, 0x0347, 0, 0, 0, 0, "ibm", "x3455", "IBM x3455", board_ibm_x3455}, + {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, "Intel D201GLY", wbsio_check_for_spi}, {0x1022, 0x7468, 0, 0, 0, 0, 0, 0, "iwill", "dk8_htx", "IWILL DK8-HTX", w83627hf_gpio24_raise_2e}, - {0x10de, 0x005e, 0, 0, 0, 0, 0, 0, "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e}, - {0x1022, 0x746B, 0x1022, 0x36C0, 0, 0, 0, 0, "AGAMI", "ARUMA", "agami Aruma", w83627hf_gpio24_raise_2e}, - {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m}, - {0x1106, 0x3177, 0x1043, 0x80A1, 0x1106, 0x3205, 0x1043, 0x8118, NULL, NULL, "ASUS A7V8-MX SE", board_asus_a7v8x_mx}, - {0x1106, 0x3227, 0x1106, 0xAA01, 0x1106, 0x0259, 0x1106, 0xAA01, NULL, NULL, "VIA EPIA SP", board_via_epia_sp}, - {0x1106, 0x0314, 0x1106, 0xaa08, 0x1106, 0x3227, 0x1106, 0xAA08, NULL, NULL, "VIA EPIA-CN", board_via_epia_sp}, - {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, "Tyan Tomcat K7M", board_asus_a7v8x_mx}, - {0x10B9, 0x1541, 0, 0, 0x10B9, 0x1533, 0, 0, "asus", "p5a", "ASUS P5A", board_asus_p5a}, - {0x1166, 0x0205, 0x1014, 0x0347, 0, 0, 0, 0, "ibm", "x3455", "IBM x3455", board_ibm_x3455}, - {0x8086, 0x7110, 0, 0, 0x8086, 0x7190, 0, 0, "epox", "ep-bx3", "EPoX EP-BX3", board_epox_ep_bx3}, - {0x8086, 0x1130, 0, 0, 0x105a, 0x0d30, 0x105a, 0x4d33, "acorp", "6a815epd", "Acorp 6A815EPD", board_acorp_6a815epd}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe61", "Artec Group DBE61", board_artecgroup_dbe6x}, - {0x1022, 0x2090, 0, 0, 0x1022, 0x2080, 0, 0, "artecgroup", "dbe62", "Artec Group DBE62", board_artecgroup_dbe6x}, /* Note: There are >= 2 version of the Kontron 986LCD-M/mITX! */ {0x8086, 0x27b8, 0, 0, 0, 0, 0, 0, "kontron", "986lcd-m", "Kontron 986LCD-M", board_kontron_986lcd_m}, {0x10ec, 0x8168, 0x10ec, 0x8168, 0x104c, 0x8023, 0x104c, 0x8019, "kontron", "986lcd-m", "Kontron 986LCD-M", board_kontron_986lcd_m}, - {0x1106, 0x3149, 0x1565, 0x3206, 0x1106, 0x3344, 0x1565, 0x1202, NULL, NULL, "BioStar P4M80-M4", board_biostar_p4m80_m4}, - {0x1106, 0x3227, 0x1458, 0x5001, 0x10ec, 0x8139, 0x1458, 0xe000, NULL, NULL, "GIGABYTE GA-7VT600", board_biostar_p4m80_m4}, + {0x10de, 0x005e, 0, 0, 0, 0, 0, 0, "msi", "k8n-neo3", "MSI K8N Neo3", w83627thf_gpio4_4_raise_4e}, {0x1106, 0x3149, 0x1462, 0x7094, 0x10ec, 0x8167, 0x1462, 0x094c, NULL, NULL, "MSI K8T Neo2", w83627thf_gpio4_4_raise_2e}, - {0x1039, 0x5513, 0x8086, 0xd61f, 0x1039, 0x6330, 0x8086, 0xd61f, NULL, NULL, "Intel D201GLY", wbsio_check_for_spi}, + {0x1106, 0x0571, 0x1462, 0x7120, 0, 0, 0, 0, "msi", "kt4v", "MSI KT4V", board_msi_kt4v}, {0x8086, 0x2658, 0x1462, 0x7046, 0x1106, 0x3044, 0x1462, 0x046d, NULL, NULL, "MSI MS-7046", ich6_gpio19_raise}, - {0x1166, 0x0223, 0x103c, 0x320d, 0x102b, 0x0522, 0x103c, 0x31fa, "hp", "dl145_g3", "HP DL145 G3", board_hp_dl145_g3_enable}, + /* SB600 LPC, RD790 North. Neither are specific to the GA-MA790FX-DQ6. The coreboot ID is here to be able to trigger the board enable more easily. */ + {0x8086, 0x1076, 0x8086, 0x1176, 0x1106, 0x3059, 0x10f1, 0x2498, NULL, NULL, "Tyan Tomcat K7M", board_asus_a7v8x_mx}, + {0x1106, 0x0314, 0x1106, 0xaa08, 0x1106, 0x3227, 0x1106, 0xAA08, NULL, NULL, "VIA EPIA-CN", board_via_epia_sp}, + {0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, "VIA EPIA M/MII/...", board_via_epia_m}, + {0x1106, 0x3227, 0x1106, 0xAA01, 0x1106, 0x0259, 0x1106, 0xAA01, NULL, NULL, "VIA EPIA SP", board_via_epia_sp}, {0x1106, 0x5337, 0x1458, 0xb003, 0x1106, 0x287e, 0x1106, 0x337e, "via", "pc3500g", "VIA PC3500G", it87xx_probe_spi_flash}, { 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL}, /* end marker */ };

1 0

[PATCH] flashrom: Explicit read functions
by Carl-Daniel Hailfinger 08 May '09

08 May '09

Flashrom assumes that the flash chip contents are available via mmap if no read function is defined. This special case is handled in lots of places all over the code. Remove the special case and use the read_memmapped function. Not only does this allow us to fix a read bug in flashrom I recently uncovered on ICH SPI, it also allows us to add support for Paraflasher to flashrom. This depends on the external flasher support patch I sent a few minutes ago. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: flashrom-explicit_read/flashchips.c =================================================================== --- flashrom-explicit_read/flashchips.c (Revision 472) +++ flashrom-explicit_read/flashchips.c (Arbeitskopie) @@ -48,6 +48,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -61,6 +62,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -74,6 +76,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -87,6 +90,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -100,6 +104,7 @@ .probe = probe_jedec, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -113,6 +118,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -126,6 +132,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -139,6 +146,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -377,6 +385,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -390,6 +399,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -529,6 +539,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -542,6 +553,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -569,6 +581,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -582,6 +595,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -595,6 +609,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -608,6 +623,7 @@ .probe = probe_49fl00x, .erase = erase_49fl00x, .write = write_49fl00x, + .read = read_memmapped, }, { @@ -621,6 +637,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -634,6 +651,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -647,6 +665,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -660,6 +679,7 @@ .probe = probe_jedec, .erase = NULL, .write = NULL, + .read = read_memmapped, }, { @@ -673,6 +693,7 @@ .probe = probe_jedec, .erase = NULL, .write = NULL, + .read = read_memmapped, }, { @@ -686,6 +707,7 @@ .probe = probe_m29f400bt, .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, + .read = read_memmapped, }, { @@ -699,6 +721,7 @@ .probe = probe_m29f400bt, .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, + .read = read_memmapped, }, { @@ -712,6 +735,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -725,6 +749,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -892,6 +917,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -905,6 +931,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -918,6 +945,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -1085,6 +1113,7 @@ .probe = probe_49fl00x, .erase = erase_49fl00x, .write = write_49fl00x, + .read = read_memmapped, }, { @@ -1098,6 +1127,7 @@ .probe = probe_49fl00x, .erase = erase_49fl00x, .write = write_49fl00x, + .read = read_memmapped, }, { @@ -1111,6 +1141,7 @@ .probe = probe_lhf00l04, .erase = erase_lhf00l04, .write = write_lhf00l04, + .read = read_memmapped, }, { @@ -1222,6 +1253,7 @@ .probe = probe_28sf040, .erase = erase_28sf040, .write = write_28sf040, + .read = read_memmapped, }, { @@ -1235,6 +1267,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1248,6 +1281,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1261,6 +1295,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1274,6 +1309,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1287,6 +1323,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1300,6 +1337,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1313,6 +1351,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1326,6 +1365,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1339,6 +1379,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1352,6 +1393,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1365,6 +1407,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1378,6 +1421,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1391,6 +1435,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1404,6 +1449,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1417,6 +1463,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1430,6 +1477,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1443,6 +1491,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1456,6 +1505,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1469,6 +1519,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1482,6 +1533,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1495,6 +1547,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1508,6 +1561,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1521,6 +1575,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1534,6 +1589,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1547,6 +1603,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1700,6 +1757,7 @@ .probe = probe_jedec, .erase = erase_m29f002, .write = write_m29f002b, + .read = read_memmapped, }, { @@ -1713,6 +1771,7 @@ .probe = probe_jedec, .erase = erase_m29f002, .write = write_m29f002t, + .read = read_memmapped, }, { @@ -1726,6 +1785,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -1739,6 +1799,7 @@ .probe = probe_m29f400bt, .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, + .read = read_memmapped, }, { @@ -1752,6 +1813,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1765,6 +1827,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1778,6 +1841,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1791,6 +1855,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1804,6 +1869,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1817,6 +1883,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1830,6 +1897,7 @@ .probe = probe_49lfxxxc, .erase = NULL, .write = NULL, + .read = read_memmapped, }, { @@ -1843,6 +1911,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -1856,6 +1925,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -1869,6 +1939,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -1882,6 +1953,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1895,6 +1967,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -1908,6 +1981,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -1921,6 +1995,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -1934,6 +2009,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2003,6 +2079,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2016,6 +2093,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2029,6 +2107,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2042,6 +2121,7 @@ .probe = probe_w29ee011, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2055,6 +2135,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2068,6 +2149,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2081,6 +2163,7 @@ .probe = probe_w39v040c, .erase = erase_w39v040c, .write = write_w39v040c, + .read = read_memmapped, }, { @@ -2094,6 +2177,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2107,6 +2191,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2120,6 +2205,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2133,6 +2219,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2146,6 +2233,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2159,6 +2247,7 @@ .probe = probe_winbond_fwhub, .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, + .read = read_memmapped, }, { @@ -2172,6 +2261,7 @@ .probe = probe_winbond_fwhub, .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, + .read = read_memmapped, }, { @@ -2185,6 +2275,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2198,6 +2289,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2211,6 +2303,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2224,6 +2317,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2237,6 +2331,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2250,6 +2345,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { NULL } Index: flashrom-explicit_read/flashrom.c =================================================================== --- flashrom-explicit_read/flashrom.c (Revision 472) +++ flashrom-explicit_read/flashrom.c (Arbeitskopie) @@ -145,9 +145,11 @@ int idx; int total_size = flash->total_size * 1024; uint8_t *buf2 = (uint8_t *) calloc(total_size, sizeof(char)); - if (flash->read == NULL) - memcpy(buf2, (const char *)flash->virtual_memory, total_size); - else + if (!flash->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flash->read(flash, buf2); printf("Verifying flash... "); @@ -191,9 +193,11 @@ exit(1); } printf("Reading flash... "); - if (flash->read == NULL) - memcpy(buf, (const char *)flash->virtual_memory, size); - else + if (!flash->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flash->read(flash, buf); if (exclude_end_position - exclude_start_position > 0) @@ -219,11 +223,13 @@ fprintf(stderr, "ERROR: flashrom has no erase function for this flash chip.\n"); return 1; } - flash->erase(flash); - if (NULL == flash->read) - memcpy(buf, (const char *)flash->virtual_memory, size); - else + if (!flash->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flash->read(flash, buf); + for (erasedbytes = 0; erasedbytes < size; erasedbytes++) if (0xff != buf[erasedbytes]) { printf("FAILED!\n"); @@ -537,9 +543,11 @@ exit(1); } printf("Force reading flash... "); - if (!flashes[0]->read) - memcpy(buf, (const char *)flashes[0]->virtual_memory, size); - else + if (!flashes[0]->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flashes[0]->read(flashes[0], buf); if (exclude_end_position - exclude_start_position > 0) @@ -648,6 +656,9 @@ */ // //////////////////////////////////////////////////////////// + /* FIXME: This memcpy will not work for SPI nor external flashers. + * Convert to chip_readb. + */ if (exclude_end_position - exclude_start_position > 0) memcpy(buf + exclude_start_position, (const char *)flash->virtual_memory + -- http://www.hailfinger.org/ Index: flashrom-explicit_read/flashchips.c =================================================================== --- flashrom-explicit_read/flashchips.c (Revision 472) +++ flashrom-explicit_read/flashchips.c (Arbeitskopie) @@ -48,6 +48,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -61,6 +62,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -74,6 +76,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -87,6 +90,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -100,6 +104,7 @@ .probe = probe_jedec, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -113,6 +118,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -126,6 +132,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -139,6 +146,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -377,6 +385,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -390,6 +399,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -529,6 +539,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -542,6 +553,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -569,6 +581,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -582,6 +595,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -595,6 +609,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -608,6 +623,7 @@ .probe = probe_49fl00x, .erase = erase_49fl00x, .write = write_49fl00x, + .read = read_memmapped, }, { @@ -621,6 +637,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -634,6 +651,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -647,6 +665,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -660,6 +679,7 @@ .probe = probe_jedec, .erase = NULL, .write = NULL, + .read = read_memmapped, }, { @@ -673,6 +693,7 @@ .probe = probe_jedec, .erase = NULL, .write = NULL, + .read = read_memmapped, }, { @@ -686,6 +707,7 @@ .probe = probe_m29f400bt, .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, + .read = read_memmapped, }, { @@ -699,6 +721,7 @@ .probe = probe_m29f400bt, .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, + .read = read_memmapped, }, { @@ -712,6 +735,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -725,6 +749,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -892,6 +917,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -905,6 +931,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -918,6 +945,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -1085,6 +1113,7 @@ .probe = probe_49fl00x, .erase = erase_49fl00x, .write = write_49fl00x, + .read = read_memmapped, }, { @@ -1098,6 +1127,7 @@ .probe = probe_49fl00x, .erase = erase_49fl00x, .write = write_49fl00x, + .read = read_memmapped, }, { @@ -1111,6 +1141,7 @@ .probe = probe_lhf00l04, .erase = erase_lhf00l04, .write = write_lhf00l04, + .read = read_memmapped, }, { @@ -1222,6 +1253,7 @@ .probe = probe_28sf040, .erase = erase_28sf040, .write = write_28sf040, + .read = read_memmapped, }, { @@ -1235,6 +1267,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1248,6 +1281,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1261,6 +1295,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1274,6 +1309,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1287,6 +1323,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1300,6 +1337,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1313,6 +1351,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1326,6 +1365,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1339,6 +1379,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1352,6 +1393,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1365,6 +1407,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1378,6 +1421,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1391,6 +1435,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1404,6 +1449,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1417,6 +1463,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1430,6 +1477,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1443,6 +1491,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1456,6 +1505,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1469,6 +1519,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1482,6 +1533,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1495,6 +1547,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1508,6 +1561,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1521,6 +1575,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1534,6 +1589,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1547,6 +1603,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1700,6 +1757,7 @@ .probe = probe_jedec, .erase = erase_m29f002, .write = write_m29f002b, + .read = read_memmapped, }, { @@ -1713,6 +1771,7 @@ .probe = probe_jedec, .erase = erase_m29f002, .write = write_m29f002t, + .read = read_memmapped, }, { @@ -1726,6 +1785,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -1739,6 +1799,7 @@ .probe = probe_m29f400bt, .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, + .read = read_memmapped, }, { @@ -1752,6 +1813,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1765,6 +1827,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1778,6 +1841,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1791,6 +1855,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1804,6 +1869,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1817,6 +1883,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1830,6 +1897,7 @@ .probe = probe_49lfxxxc, .erase = NULL, .write = NULL, + .read = read_memmapped, }, { @@ -1843,6 +1911,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -1856,6 +1925,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -1869,6 +1939,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -1882,6 +1953,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1895,6 +1967,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -1908,6 +1981,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -1921,6 +1995,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -1934,6 +2009,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2003,6 +2079,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2016,6 +2093,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2029,6 +2107,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2042,6 +2121,7 @@ .probe = probe_w29ee011, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2055,6 +2135,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2068,6 +2149,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2081,6 +2163,7 @@ .probe = probe_w39v040c, .erase = erase_w39v040c, .write = write_w39v040c, + .read = read_memmapped, }, { @@ -2094,6 +2177,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2107,6 +2191,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2120,6 +2205,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2133,6 +2219,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2146,6 +2233,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2159,6 +2247,7 @@ .probe = probe_winbond_fwhub, .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, + .read = read_memmapped, }, { @@ -2172,6 +2261,7 @@ .probe = probe_winbond_fwhub, .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, + .read = read_memmapped, }, { @@ -2185,6 +2275,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2198,6 +2289,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2211,6 +2303,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2224,6 +2317,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2237,6 +2331,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2250,6 +2345,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { NULL } Index: flashrom-explicit_read/flashrom.c =================================================================== --- flashrom-explicit_read/flashrom.c (Revision 472) +++ flashrom-explicit_read/flashrom.c (Arbeitskopie) @@ -145,9 +145,11 @@ int idx; int total_size = flash->total_size * 1024; uint8_t *buf2 = (uint8_t *) calloc(total_size, sizeof(char)); - if (flash->read == NULL) - memcpy(buf2, (const char *)flash->virtual_memory, total_size); - else + if (!flash->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flash->read(flash, buf2); printf("Verifying flash... "); @@ -191,9 +193,11 @@ exit(1); } printf("Reading flash... "); - if (flash->read == NULL) - memcpy(buf, (const char *)flash->virtual_memory, size); - else + if (!flash->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flash->read(flash, buf); if (exclude_end_position - exclude_start_position > 0) @@ -219,11 +223,13 @@ fprintf(stderr, "ERROR: flashrom has no erase function for this flash chip.\n"); return 1; } - flash->erase(flash); - if (NULL == flash->read) - memcpy(buf, (const char *)flash->virtual_memory, size); - else + if (!flash->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flash->read(flash, buf); + for (erasedbytes = 0; erasedbytes < size; erasedbytes++) if (0xff != buf[erasedbytes]) { printf("FAILED!\n"); @@ -537,9 +543,11 @@ exit(1); } printf("Force reading flash... "); - if (!flashes[0]->read) - memcpy(buf, (const char *)flashes[0]->virtual_memory, size); - else + if (!flashes[0]->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flashes[0]->read(flashes[0], buf); if (exclude_end_position - exclude_start_position > 0) @@ -648,6 +656,9 @@ */ // //////////////////////////////////////////////////////////// + /* FIXME: This memcpy will not work for SPI nor external flashers. + * Convert to chip_readb. + */ if (exclude_end_position - exclude_start_position > 0) memcpy(buf + exclude_start_position, (const char *)flash->virtual_memory +

2 2

[flashrom] r473 - trunk
by svn＠coreboot.org 08 May '09

08 May '09

Author: hailfinger Date: 2009-05-08 14:49:03 +0200 (Fri, 08 May 2009) New Revision: 473 Modified: trunk/flash.h trunk/flashchips.c trunk/flashrom.c Log: Flashrom assumes that the flash chip contents are available via mmap if no read function is defined. This special case is handled in lots of places all over the code. Remove the special case and use the read_memmapped function. Not only does this allow us to fix a read bug in flashrom I recently uncovered on ICH SPI, it also allows us to add support for Paraflasher to flashrom. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/flash.h =================================================================== --- trunk/flash.h 2009-05-07 13:24:49 UTC (rev 472) +++ trunk/flash.h 2009-05-08 12:49:03 UTC (rev 473) @@ -539,6 +539,7 @@ extern int verbose; #define printf_debug(x...) { if (verbose) printf(x); } void map_flash_registers(struct flashchip *flash); +int read_memmapped(struct flashchip *flash, uint8_t *buf); /* layout.c */ int show_id(uint8_t *bios, int size, int force); Modified: trunk/flashchips.c =================================================================== --- trunk/flashchips.c 2009-05-07 13:24:49 UTC (rev 472) +++ trunk/flashchips.c 2009-05-08 12:49:03 UTC (rev 473) @@ -48,6 +48,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -61,6 +62,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -74,6 +76,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -87,6 +90,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -100,6 +104,7 @@ .probe = probe_jedec, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -113,6 +118,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -126,6 +132,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -139,6 +146,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -377,6 +385,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -390,6 +399,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -529,6 +539,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -542,6 +553,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -569,6 +581,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -582,6 +595,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -595,6 +609,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -608,6 +623,7 @@ .probe = probe_49fl00x, .erase = erase_49fl00x, .write = write_49fl00x, + .read = read_memmapped, }, { @@ -621,6 +637,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -634,6 +651,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -647,6 +665,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_en29f002a, + .read = read_memmapped, }, { @@ -660,6 +679,7 @@ .probe = probe_jedec, .erase = NULL, .write = NULL, + .read = read_memmapped, }, { @@ -673,6 +693,7 @@ .probe = probe_jedec, .erase = NULL, .write = NULL, + .read = read_memmapped, }, { @@ -686,6 +707,7 @@ .probe = probe_m29f400bt, .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, + .read = read_memmapped, }, { @@ -699,6 +721,7 @@ .probe = probe_m29f400bt, .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, + .read = read_memmapped, }, { @@ -712,6 +735,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -725,6 +749,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -892,6 +917,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -905,6 +931,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -918,6 +945,7 @@ .probe = probe_29f002, .erase = erase_29f002, .write = write_29f002, + .read = read_memmapped, }, { @@ -1085,6 +1113,7 @@ .probe = probe_49fl00x, .erase = erase_49fl00x, .write = write_49fl00x, + .read = read_memmapped, }, { @@ -1098,6 +1127,7 @@ .probe = probe_49fl00x, .erase = erase_49fl00x, .write = write_49fl00x, + .read = read_memmapped, }, { @@ -1111,6 +1141,7 @@ .probe = probe_lhf00l04, .erase = erase_lhf00l04, .write = write_lhf00l04, + .read = read_memmapped, }, { @@ -1222,6 +1253,7 @@ .probe = probe_28sf040, .erase = erase_28sf040, .write = write_28sf040, + .read = read_memmapped, }, { @@ -1235,6 +1267,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1248,6 +1281,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1261,6 +1295,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1274,6 +1309,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1287,6 +1323,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1300,6 +1337,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1313,6 +1351,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1326,6 +1365,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1339,6 +1379,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1352,6 +1393,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1365,6 +1407,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1378,6 +1421,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -1391,6 +1435,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1404,6 +1449,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1417,6 +1463,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1430,6 +1477,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1443,6 +1491,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1456,6 +1505,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1469,6 +1519,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1482,6 +1533,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1495,6 +1547,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1508,6 +1561,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1521,6 +1575,7 @@ .probe = probe_sst_fwhub, .erase = erase_sst_fwhub, .write = write_sst_fwhub, + .read = read_memmapped, }, { @@ -1534,6 +1589,7 @@ .probe = probe_jedec, .erase = erase_49lf040, .write = write_49lf040, + .read = read_memmapped, }, { @@ -1547,6 +1603,7 @@ .probe = probe_49lfxxxc, .erase = erase_49lfxxxc, .write = write_49lfxxxc, + .read = read_memmapped, }, { @@ -1700,6 +1757,7 @@ .probe = probe_jedec, .erase = erase_m29f002, .write = write_m29f002b, + .read = read_memmapped, }, { @@ -1713,6 +1771,7 @@ .probe = probe_jedec, .erase = erase_m29f002, .write = write_m29f002t, + .read = read_memmapped, }, { @@ -1726,6 +1785,7 @@ .probe = probe_29f040b, .erase = erase_29f040b, .write = write_29f040b, + .read = read_memmapped, }, { @@ -1739,6 +1799,7 @@ .probe = probe_m29f400bt, .erase = erase_m29f400bt, .write = write_coreboot_m29f400bt, + .read = read_memmapped, }, { @@ -1752,6 +1813,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1765,6 +1827,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1778,6 +1841,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1791,6 +1855,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1804,6 +1869,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1817,6 +1883,7 @@ .probe = probe_stm50flw0x0x, .erase = erase_stm50flw0x0x, .write = write_stm50flw0x0x, + .read = read_memmapped, }, { @@ -1830,6 +1897,7 @@ .probe = probe_49lfxxxc, .erase = NULL, .write = NULL, + .read = read_memmapped, }, { @@ -1843,6 +1911,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -1856,6 +1925,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -1869,6 +1939,7 @@ .probe = probe_82802ab, .erase = erase_82802ab, .write = write_82802ab, + .read = read_memmapped, }, { @@ -1882,6 +1953,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -1895,6 +1967,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -1908,6 +1981,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -1921,6 +1995,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -1934,6 +2009,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2003,6 +2079,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2016,6 +2093,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2029,6 +2107,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2042,6 +2121,7 @@ .probe = probe_w29ee011, .erase = erase_chip_jedec, .write = write_jedec, + .read = read_memmapped, }, { @@ -2055,6 +2135,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2068,6 +2149,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2081,6 +2163,7 @@ .probe = probe_w39v040c, .erase = erase_w39v040c, .write = write_w39v040c, + .read = read_memmapped, }, { @@ -2094,6 +2177,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2107,6 +2191,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_39sf020, + .read = read_memmapped, }, { @@ -2120,6 +2205,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2133,6 +2219,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2146,6 +2233,7 @@ .probe = probe_jedec, .erase = erase_chip_jedec, .write = write_49f002, + .read = read_memmapped, }, { @@ -2159,6 +2247,7 @@ .probe = probe_winbond_fwhub, .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, + .read = read_memmapped, }, { @@ -2172,6 +2261,7 @@ .probe = probe_winbond_fwhub, .erase = erase_winbond_fwhub, .write = write_winbond_fwhub, + .read = read_memmapped, }, { @@ -2185,6 +2275,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2198,6 +2289,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2211,6 +2303,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2224,6 +2317,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2237,6 +2331,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { @@ -2250,6 +2345,7 @@ .probe = probe_spi_rdid, .erase = NULL, .write = NULL, + .read = NULL, }, { NULL } Modified: trunk/flashrom.c =================================================================== --- trunk/flashrom.c 2009-05-07 13:24:49 UTC (rev 472) +++ trunk/flashrom.c 2009-05-08 12:49:03 UTC (rev 473) @@ -4,6 +4,7 @@ * Copyright (C) 2000 Silicon Integrated System Corporation * Copyright (C) 2004 Tyan Corp <yhlu(a)tyan.com> * Copyright (C) 2005-2008 coresystems GmbH + * Copyright (C) 2008,2009 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -81,6 +82,18 @@ flash->virtual_registers = physmap("flash chip registers", (0xFFFFFFFF - 0x400000 - size + 1), size); } +int read_memmapped(struct flashchip *flash, uint8_t *buf) +{ + int i; + + /* We could do a memcpy as optimization if the flash is onboard */ + //memcpy(buf, (const char *)flash->virtual_memory, flash->total_size * 1024); + for (i = 0; i < flash->total_size * 1024; i++) + buf[i] = chip_readb(flash->virtual_memory + i); + + return 0; +} + struct flashchip *probe_flash(struct flashchip *first_flash, int force) { volatile uint8_t *bios; @@ -145,9 +158,11 @@ int idx; int total_size = flash->total_size * 1024; uint8_t *buf2 = (uint8_t *) calloc(total_size, sizeof(char)); - if (flash->read == NULL) - memcpy(buf2, (const char *)flash->virtual_memory, total_size); - else + if (!flash->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flash->read(flash, buf2); printf("Verifying flash... "); @@ -191,9 +206,11 @@ exit(1); } printf("Reading flash... "); - if (flash->read == NULL) - memcpy(buf, (const char *)flash->virtual_memory, size); - else + if (!flash->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flash->read(flash, buf); if (exclude_end_position - exclude_start_position > 0) @@ -219,11 +236,13 @@ fprintf(stderr, "ERROR: flashrom has no erase function for this flash chip.\n"); return 1; } - flash->erase(flash); - if (NULL == flash->read) - memcpy(buf, (const char *)flash->virtual_memory, size); - else + if (!flash->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flash->read(flash, buf); + for (erasedbytes = 0; erasedbytes < size; erasedbytes++) if (0xff != buf[erasedbytes]) { printf("FAILED!\n"); @@ -537,9 +556,11 @@ exit(1); } printf("Force reading flash... "); - if (!flashes[0]->read) - memcpy(buf, (const char *)flashes[0]->virtual_memory, size); - else + if (!flashes[0]->read) { + printf("FAILED!\n"); + fprintf(stderr, "ERROR: flashrom has no read function for this flash chip.\n"); + return 1; + } else flashes[0]->read(flashes[0], buf); if (exclude_end_position - exclude_start_position > 0) @@ -648,6 +669,9 @@ */ // //////////////////////////////////////////////////////////// + /* FIXME: This memcpy will not work for SPI nor external flashers. + * Convert to chip_readb. + */ if (exclude_end_position - exclude_start_position > 0) memcpy(buf + exclude_start_position, (const char *)flash->virtual_memory +

1 0

GSoC: Seabios USB Option ROM, small initial planning
by Leandro Dorileo 07 May '09

07 May '09

Hi Guys I was talking to Jason and we found we need to draw a bit better the API and responsibilities between us. I figure out I`m going to support hardware detection and initialization, and a framework to read and write blocks from MSC devices. Looking the current libpayload`s source code I found UHCI is pretty complete and meets the requirements I mentioned above. So, the focus should be put on EHCI and OHCI. Of course bug fixing what becomes needed as well. Again looking in the source code, I found abstractions that will ease the process of coupling the other host controller interface drivers, I don`t have many questions regarding the internal design and API of libpayload(by now at least) but how Jason is going to integrate and use libpayload usb stack. To test and improve my understanding I put together[1] some code from FILO, libpayload and a stub option ROM, just to see how it`s supposed to be integrate(PS: this option ROM is a work in progress and will be used just for testing the usb implementations I`m going to do, and it`s not functional yet). For now, I have two major questions, #1: I`ve seen other projects like FILO including libpayload with svn:external, once seabios is maintained with git, how it should be done with seabios? how would we manage the source code integration and maintainability between seabios and libpayload?. #2: libpayload uses kbuild/kconfig but seabios doesn`t, what would be the best approach to integrate their build system? (PS: Sorry, it wasn`t two questions, but many questions and two areas. ;-) ) A third questions would be, how people test the libpayload stuffs? do they write small payloads for that? is that feasible writing an option ROM for testing the libpayload`s usb stack? A last question. Should I CC the mentors and people I judge interested? or, is coreboot(a)coreboot.org good enough? ;-) [1] - http://vps.dorilex.net/cgi-bin/gitweb.cgi Thanks in advance.... -- (°= Leandro Dorileo //\ ldorileo(a)gmail.com - http://www.dorilex.net V_/ Software is a matter of freedom.

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coreboot May 2009