coreboot April 2008

coreboot@coreboot.org

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404 discussions

#95: Run coreboot in VirtualBox
by coreboot 10 Dec '14

10 Dec '14

#95: Run coreboot in VirtualBox ---------------------------------+------------------------------------------ Reporter: uwe | Owner: somebody Type: defect | Status: new Priority: minor | Milestone: Component: misc | Version: Keywords: | Dependencies: Patchstatus: there is no patch | ---------------------------------+------------------------------------------ It would be nice if we could test coreboot images in VirtualBox, see http://virtualbox.org/. VirtualBox does not (yet) provide a simple mechanism to use a different BIOS in their emulated machines (something like "-L" in qemu). Instead the BIOS image (a custom bochs BIOS + LGPL'g VGABIOS) is converted to C code (an array of bytes, or the like) and merged into the VirtualBox executable. The relevant files are {{{ src/VBox/Devices/PC/DevPcBios.cpp bldprogs/bin2c.c }}} if someone want to hack VirtualBox to easily support using coreboot images instead of their usual BIOS. -- Ticket URL: <http://tracker.coreboot.org/trac/coreboot/ticket/95> coreboot <http://www.coreboot.org/>

2 8

filo and usb boot
by Masoud Fatollahy 18 Aug '10

18 Aug '10

Hi, Why is it problem to boot from an usb port when we are using linuxbios and filo. as I can see all usb code are there, what is missing? Thanks, /Masoud

4 8

[LinuxBIOS] Add initial support for intel i855gme northbridge
by Jon Dufresne 20 Jan '09

20 Jan '09

Add initial support for i855gme. This is a work in progress and I don't expect it to work on all boards, or even any besides mine. This is based heavily on i855pm. Signed off by Jon Dufresne <jon.dufresne(a)gmail.com>

4 4

[LinuxBIOS] A8N5X port
by Robert Millan 21 Nov '08

21 Nov '08

This patch includes config files for the asus/a8n5x port. It is the same as asus/a8n_e with a different pnp layout, so I used #include's whenever possible. System boots and is usable with usb keyboard. works: - serial port - vga (old pci card) - memtest86+ succeeds, but only with Rudolf's patch for unbuffered dimms in K8. Otherwise you get spurious memory corruption. - ide disk - usb doesn't: - ps/2 keyboard - onboard ethernet - vga pci-e card (??) - any other pci card I tried wasn't tested: - sata - game port - onboard audio (not supported by alsa anyway) - ps/2 mouse -- Robert Millan <GPLv2> I know my rights; I want my phone call! <DRM> What use is a phone call, if you are unable to speak? (as seen on /.)

8 27

LZMA magic number
by Myles Watson 30 Sep '08

30 Sep '08

Is there a magic number for LZMA? Should there be? I accidentally used an uncompressed payload with v2 when it expected a compressed payload, and it gave me the message: Decoder scratchpad too small!! Decoding error = 1 I think it would be nicer to have an error like: Payload not compressed with lzma! Myles

5 9

[v3] VT8237R support
by Corey Osgood 28 Aug '08

28 Aug '08

See attached. Not perfect, but enough to get started with.

5 11

[PATCH] v3: missing 640k-1024k mem hole for i440bxemulation
by Carl-Daniel Hailfinger 22 Aug '08

22 Aug '08

i440bxemulation is missing the 640k-1024k mem hole. geodelx has the hole. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: LinuxBIOSv3-stuff/northbridge/intel/i440bxemulation/i440bx.c =================================================================== --- LinuxBIOSv3-stuff/northbridge/intel/i440bxemulation/i440bx.c (Revision 644) +++ LinuxBIOSv3-stuff/northbridge/intel/i440bxemulation/i440bx.c (Arbeitskopie) @@ -59,7 +59,10 @@ mc_dev = dev->link[0].children; if (mc_dev) { idx = 10; - ram_resource(dev, idx++, 0, tolmk); + /* 0 .. 640 KB */ + ram_resource(dev, idx++, 0, 640); + /* 1 MB .. (Systop - 1 MB) (in KB) */ + ram_resource(dev, idx++, 1024, tolmk - 1024); } phase4_assign_resources(&dev->link[0]); } -- http://www.hailfinger.org/

4 6

[PATCH] v3: convert stage2 and initram makefile rules from object to source files
by Carl-Daniel Hailfinger 02 Aug '08

02 Aug '08

Convert stage2 and initram makefile rules from object to source files. This creates a clearer distinction between source files in the source tree we want to have compiled and indirectly created object/source files in the object tree. It also will make enable us to move to whole-program optimization/compilation which should yield substantial size savings. Then again, we may be able to do that without the makefile conversion as well. This is a RFC, not to be applied immediately. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: LinuxBIOSv3-makefilerewrite/southbridge/amd/cs5536/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/southbridge/amd/cs5536/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/southbridge/amd/cs5536/Makefile (Arbeitskopie) @@ -21,7 +21,7 @@ ifeq ($(CONFIG_SOUTHBRIDGE_AMD_CS5536),y) -STAGE2_CHIPSET_OBJ += $(obj)/southbridge/amd/cs5536/cs5536.o +STAGE2_CHIPSET_SRC += $(src)/southbridge/amd/cs5536/cs5536.c STAGE0_CHIPSET_OBJ += $(obj)/southbridge/amd/cs5536/stage1.o Index: LinuxBIOSv3-makefilerewrite/southbridge/intel/i82371eb/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/southbridge/intel/i82371eb/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/southbridge/intel/i82371eb/Makefile (Arbeitskopie) @@ -20,6 +20,6 @@ ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_I82371EB),y) -STAGE2_CHIPSET_OBJ += $(obj)/southbridge/intel/i82371eb/i82371eb.o +STAGE2_CHIPSET_SRC += $(src)/southbridge/intel/i82371eb/i82371eb.c endif Index: LinuxBIOSv3-makefilerewrite/superio/winbond/w83627hf/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/superio/winbond/w83627hf/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/superio/winbond/w83627hf/Makefile (Arbeitskopie) @@ -25,6 +25,6 @@ STAGE0_CHIPSET_OBJ += $(obj)/device/pnp_raw.o # Always add to variables, as there could be more than one Super I/O. -STAGE2_CHIPSET_OBJ += $(obj)/superio/winbond/w83627hf/superio.o +STAGE2_CHIPSET_SRC += $(src)/superio/winbond/w83627hf/superio.c endif Index: LinuxBIOSv3-makefilerewrite/superio/fintek/f71805f/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/superio/fintek/f71805f/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/superio/fintek/f71805f/Makefile (Arbeitskopie) @@ -24,6 +24,6 @@ STAGE0_CHIPSET_OBJ += $(obj)/device/pnp_raw.o # Always add to variables, as there could be more than one Super I/O. -STAGE2_CHIPSET_OBJ += $(obj)/superio/fintek/f71805f/superio.o +STAGE2_CHIPSET_SRC += $(src)/superio/fintek/f71805f/superio.c endif Index: LinuxBIOSv3-makefilerewrite/mainboard/adl/msm800sev/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/mainboard/adl/msm800sev/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/mainboard/adl/msm800sev/Makefile (Arbeitskopie) @@ -21,12 +21,12 @@ STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o -INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ +INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ $(src)/southbridge/amd/cs5536/smbus_initram.c \ $(src)/arch/x86/geodelx/geodelx.c -STAGE2_MAINBOARD_OBJ = +STAGE2_MAINBOARD_SRC = $(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" Index: LinuxBIOSv3-makefilerewrite/mainboard/amd/norwich/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/mainboard/amd/norwich/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/mainboard/amd/norwich/Makefile (Arbeitskopie) @@ -21,12 +21,12 @@ STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o -INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ +INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ $(src)/southbridge/amd/cs5536/smbus_initram.c \ $(src)/arch/x86/geodelx/geodelx.c -STAGE2_MAINBOARD_OBJ = irq_tables.o +STAGE2_MAINBOARD_SRC = irq_tables.c $(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" Index: LinuxBIOSv3-makefilerewrite/mainboard/artecgroup/dbe61/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/mainboard/artecgroup/dbe61/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/mainboard/artecgroup/dbe61/Makefile (Arbeitskopie) @@ -21,11 +21,11 @@ STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o -INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ +INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ $(src)/arch/x86/geodelx/geodelx.c -STAGE2_MAINBOARD_OBJ = +STAGE2_MAINBOARD_SRC = $(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" Index: LinuxBIOSv3-makefilerewrite/mainboard/artecgroup/dbe62/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/mainboard/artecgroup/dbe62/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/mainboard/artecgroup/dbe62/Makefile (Arbeitskopie) @@ -21,11 +21,11 @@ STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o -INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ +INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ $(src)/arch/x86/geodelx/geodelx.c -STAGE2_MAINBOARD_OBJ = irq_tables.o +STAGE2_MAINBOARD_SRC = irq_tables.c $(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" Index: LinuxBIOSv3-makefilerewrite/mainboard/pcengines/alix1c/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/mainboard/pcengines/alix1c/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/mainboard/pcengines/alix1c/Makefile (Arbeitskopie) @@ -21,11 +21,11 @@ STAGE0_MAINBOARD_OBJ := $(obj)/mainboard/$(MAINBOARDDIR)/stage1.o -INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ +INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/northbridge/amd/geodelx/raminit.c \ $(src)/arch/x86/geodelx/geodelx.c -STAGE2_MAINBOARD_OBJ = irq_tables.o +STAGE2_MAINBOARD_SRC = irq_tables.c $(obj)/coreboot.vpd: $(Q)printf " BUILD DUMMY VPD\n" Index: LinuxBIOSv3-makefilerewrite/mainboard/emulation/qemu-x86/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/mainboard/emulation/qemu-x86/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/mainboard/emulation/qemu-x86/Makefile (Arbeitskopie) @@ -28,10 +28,10 @@ # directory and is built from what was auto.c in v2. # -INITRAM_OBJ = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ +INITRAM_SRC = $(src)/mainboard/$(MAINBOARDDIR)/initram.c \ $(src)/mainboard/$(MAINBOARDDIR)/initram_printktest.c -STAGE2_MAINBOARD_OBJ = vga.o +STAGE2_MAINBOARD_SRC = vga.c # # VPD or SIP ROM or... how does NVIDIA call it? Index: LinuxBIOSv3-makefilerewrite/device/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/device/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/device/Makefile (Arbeitskopie) @@ -24,6 +24,6 @@ $(Q)printf " CC $(subst $(shell pwd)/,,$(@))\n" $(Q)$(CC) $(INITCFLAGS) -c $< -o $@ -STAGE2_DEVICE_OBJ = device.o device_util.o root_device.o \ - pci_device.o pci_ops.o pci_rom.o pnp_device.o pnp_raw.o +STAGE2_DEVICE_SRC = device.c device_util.c root_device.c \ + pci_device.c pci_ops.c pci_rom.c pnp_device.c pnp_raw.c Index: LinuxBIOSv3-makefilerewrite/northbridge/amd/geodelx/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/northbridge/amd/geodelx/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/northbridge/amd/geodelx/Makefile (Arbeitskopie) @@ -21,9 +21,9 @@ ifeq ($(CONFIG_NORTHBRIDGE_AMD_GEODELX),y) -STAGE2_CHIPSET_OBJ += $(obj)/northbridge/amd/geodelx/geodelx.o \ - $(obj)/northbridge/amd/geodelx/vsmsetup.o \ - $(obj)/util/x86emu/vm86_gdt.o \ - $(obj)/northbridge/amd/geodelx/grphinit.o +STAGE2_CHIPSET_SRC += $(src)/northbridge/amd/geodelx/geodelx.c \ + $(src)/northbridge/amd/geodelx/vsmsetup.c \ + $(src)/util/x86emu/vm86_gdt.c \ + $(src)/northbridge/amd/geodelx/grphinit.c endif Index: LinuxBIOSv3-makefilerewrite/northbridge/intel/i440bxemulation/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/northbridge/intel/i440bxemulation/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/northbridge/intel/i440bxemulation/Makefile (Arbeitskopie) @@ -21,6 +21,6 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_I440BXEMULATION),y) -STAGE2_CHIPSET_OBJ += $(obj)/northbridge/intel/i440bxemulation/i440bx.o +STAGE2_CHIPSET_SRC += $(src)/northbridge/intel/i440bxemulation/i440bx.c endif Index: LinuxBIOSv3-makefilerewrite/arch/x86/Makefile =================================================================== --- LinuxBIOSv3-makefilerewrite/arch/x86/Makefile (Revision 626) +++ LinuxBIOSv3-makefilerewrite/arch/x86/Makefile (Arbeitskopie) @@ -179,27 +179,32 @@ # TODO: This should be compressed with the default compressor. # -STAGE2_LIB_OBJ = stage2.o clog2.o mem.o tables.o delay.o \ - compute_ip_checksum.o string.o +STAGE2_LIB_SRC = stage2.c clog2.c mem.c tables.c delay.c \ + compute_ip_checksum.c string.c -STAGE2_ARCH_X86_OBJ = archtables.o coreboot_table.o udelay_io.o -STAGE2_ARCH_X86_OBJ += pci_ops_auto.o pci_ops_conf1.o pci_ops_conf2.o -STAGE2_ARCH_X86_OBJ += keyboard.o i8259.o isa-dma.o +STAGE2_ARCH_X86_SRC = archtables.c coreboot_table.c udelay_io.c +STAGE2_ARCH_X86_SRC += pci_ops_auto.c pci_ops_conf1.c pci_ops_conf2.c +STAGE2_ARCH_X86_SRC += keyboard.c i8259.c isa-dma.c ifeq ($(CONFIG_PIRQ_TABLE),y) -STAGE2_ARCH_X86_OBJ += pirq_routing.o +STAGE2_ARCH_X86_SRC += pirq_routing.c endif STAGE2_DYNAMIC_OBJ = statictree.o -STAGE2_OBJ := $(patsubst %,$(obj)/lib/%,$(STAGE2_LIB_OBJ)) \ - $(patsubst %,$(obj)/arch/x86/%,$(STAGE2_ARCH_X86_OBJ)) \ - $(patsubst %,$(obj)/device/%,$(STAGE2_DEVICE_OBJ)) \ - $(patsubst %,$(obj)/mainboard/$(MAINBOARDDIR)/%,$(STAGE2_MAINBOARD_OBJ)) \ - $(patsubst %,$(obj)/mainboard/$(MAINBOARDDIR)/%,$(STAGE2_DYNAMIC_OBJ)) +STAGE2_SRC := $(patsubst %,$(src)/lib/%,$(STAGE2_LIB_SRC)) \ + $(patsubst %,$(src)/arch/x86/%,$(STAGE2_ARCH_X86_SRC)) \ + $(patsubst %,$(src)/device/%,$(STAGE2_DEVICE_SRC)) \ + $(patsubst %,$(src)/mainboard/$(MAINBOARDDIR)/%,$(STAGE2_MAINBOARD_SRC)) -STAGE2_OBJ += $(STAGE2_CHIPSET_OBJ) +STAGE2_SRC += $(STAGE2_CHIPSET_SRC) +STAGE2_OBJ := $(patsubst $(src)/%.c,$(obj)/%.o,$(STAGE2_SRC)) + +# This one is special, but only due to slightly incorrect rules and dependencies. +# Don't change the dependencies for now. +STAGE2_OBJ += $(patsubst %,$(obj)/mainboard/$(MAINBOARDDIR)/%,$(STAGE2_DYNAMIC_OBJ)) + ifeq ($(CONFIG_PCI_OPTION_ROM_RUN),y) ifeq ($(CONFIG_PCI_OPTION_ROM_RUN_X86EMU),y) # x86emu wants libgcc @@ -215,7 +220,7 @@ STAGE2_OBJ_NEEDED = $(filter-out $(STAGE0_OBJ), $(STAGE2_OBJ)) -$(obj)/coreboot.stage2 $(obj)/coreboot.stage2.map: $(obj)/stage0.o $(STAGE2_OBJ_NEEDED) +$(obj)/coreboot.stage2 $(obj)/coreboot.stage2.map: $(obj)/stage0.o $(STAGE2_OBJ_NEEDED) $(STAGE2_SRC) $(Q)# leave a .o with full symbols in it for debugging. $(Q)printf " LD $(subst $(shell pwd)/,,$(@))\n" $(Q)$(LD) -R $(obj)/stage0.o -Ttext 0x2000 --entry=stage2 \ @@ -249,9 +254,9 @@ $(Q)printf " AS $(subst $(shell pwd)/,,$(@))\n" $(Q)$(AS) $(obj)/arch/x86/stage0_asm.s -o $@ -$(obj)/coreboot.initram $(obj)/coreboot.initram.map: $(obj)/stage0.init $(obj)/stage0-prefixed.o $(INITRAM_OBJ) +$(obj)/coreboot.initram $(obj)/coreboot.initram.map: $(obj)/stage0.init $(obj)/stage0-prefixed.o $(INITRAM_SRC) $(Q)printf " CC $(subst $(shell pwd)/,,$(@)) (XIP)\n" - $(Q)$(CC) $(INITCFLAGS) -D_SHARED -fPIE -c -combine $(INITRAM_OBJ) -o $(obj)/coreboot.initram_partiallylinked.o + $(Q)$(CC) $(INITCFLAGS) -D_SHARED -fPIE -c -combine $(INITRAM_SRC) -o $(obj)/coreboot.initram_partiallylinked.o $(Q)# initram links against stage0 $(Q)printf " LD $(subst $(shell pwd)/,,$(@))\n" $(Q)$(LD) -Ttext 0 --entry main -N -R $(obj)/stage0-prefixed.o \ -- http://www.hailfinger.org/

2 4

some thoughts on dts vs. Kconfig vs. makefiles vs. C code
by ron minnich 11 Jul '08

11 Jul '08

I have no idea if this helps. But there's been discussion of "DRAM settings in DTS" and "where does CARBASE go" and so on, so I think we need to try to document some rules. Here is a first cut. thanks ron

7 33

[PATCH] buildrom: Update kconfig to recent version
by Uwe Hermann 02 Jul '08

02 Jul '08

See patch. The actual patch is buildrom_update_kconfig.patch.gz but that's huge and totally unreadable so I recommend reviewing buildrom_update_kconfig_makefile.patch That's the only change to the buildrom code itself, the rest is just replacing the whole scripts/kconfig/ dir with the new kconfig. I used the coreinfo kconfig/ with only a handful of string replacements a la s/coreinfo/buildrom/ so the diff to coreinfo's kconfig is tiny. I did some ad-hoc testing with this, tried various kconfig targets (menuconfig, xconfig, gconfig, ...) and various buildrom builds and it seems to work fine so far, but some more testing by others is highly appreciated. Thanks, Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

3 6

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coreboot April 2008