coreboot September 2007

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367 discussions

[LinuxBIOS] r18 - buildrom-devel/bin
by svn＠openbios.org 12 Sep '07

12 Sep '07

Author: ward Date: 2007-09-12 18:39:06 +0200 (Wed, 12 Sep 2007) New Revision: 18 Modified: buildrom-devel/bin/doquilt.sh Log: Make doquilt.sh a bit smarter about dealing with quilt patch trees. Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Jordan Crouse <jordan.crouse(a)amd.com> Modified: buildrom-devel/bin/doquilt.sh =================================================================== --- buildrom-devel/bin/doquilt.sh 2007-08-29 16:54:43 UTC (rev 17) +++ buildrom-devel/bin/doquilt.sh 2007-09-12 16:39:06 UTC (rev 18) @@ -22,6 +22,13 @@ exit 0 fi +# Sometimes the patch order matches. In that case, we can pass the entire patch subdirectory +# to this script as the second argument, and we'll copy it into $DIR/patches/ +if [ -d $1 ]; then + cp -pr $1/* $DIR/patches/ + shift +fi + while [ $# -gt 0 ]; do echo `basename $1` >> $DIR/patches/series cp $1 $DIR/patches

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[LinuxBIOS] ASUS M2N32-SLI Deluxe
by Stefan Reinauer 12 Sep '07

12 Sep '07

Hi, I am working on the Asus M2N32-SLI Deluxe and I started out with the Gigabyte target as base. I had to disable ht optimization in the CAR code, or the machine would not survive the reset. It gets to device enumeration now, but it seems it keeps looping on the devices on bus 0 until it runs out of heap: LinuxBIOS-2.0.0_m57sli_Fallback Tue Jul 31 11:11:26 EDT 2007 starting... *sysinfo range: [000cf000,000cf730) bsp_apicid=00 core0 started: started ap apicid: 01 SBLink=00 NC node|link=00 begin msr fid, vid 3106121206100202 end msr fid, vid 3106121206100202 mcp55_num:01 ht reset - ignoring Ram1.00 Ram2.00 Unbuffered 400Mhz Interleaved RAM: 0x00200000 KB Ram3 dimm_mask = 00000011 x4_mask = 00000000 x16_mask = 00000000 single_rank_mask = 00000000 ODC = 00113222 Addr Timing= 00202520 Initializing memory: done Setting variable MTRR 2, base: 0MB, range: 2048MB, type WB set DQS timing:RcvrEn:Pass1: 00 CTLRMaxDelay=11 done set DQS timing:DQSPos: 00 done set DQS timing:RcvrEn:Pass2: 00 CTLRMaxDelay=42 done Total DQS Training : tsc [00]=000000003307610e Total DQS Training : tsc [01]=0000000033e8c69a Total DQS Training : tsc [02]=0000000068f5bcda Total DQS Training : tsc [03]=000000006ac2555a Ram4 v_esp=000ceeb8 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Copying LinuxBIOS to RAM. src=fffdf000 dst=00100000 linxbios_ram.nrv2b length = 0000d704 linxbios_ram.bin length = 00022550 Jumping to LinuxBIOS. LinuxBIOS-2.0.0_m57sli_Fallback Tue Jul 31 11:11:26 EDT 2007 booting... Enumerating buses... APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 enabled PCI: 00:18.3 siblings=1 CPU: APIC: 00 enabled CPU: APIC: 01 enabled PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled PCI: 00:1e.0 [10de/0369] enabled PCI: 00:1f.0 [10de/0360] enabled PCI: 00:1f.1 [10de/0368] enabled PCI: 00:1f.2 [10de/036a] enabled PCI: 00:1f.3 [10de/036b] enabled PCI: 00:00.0 [10de/036c] enabled PCI: 00:00.0 Hypertransport link capability not foundPCI: pci_scan_bus for bus 00 PCI: 00:00.0 [10de/036c] enabled PCI: 00:00.1 [10de/036d] enabled Disabling static device: PCI: 00:01.0 Disabling static device: PCI: 00:01.1 PCI: 00:02.0 [10de/036e] enabled PCI: 00:03.0 [10de/037f] enabled PCI: 00:03.1 [10de/037f] enabled PCI: 00:03.2 [10de/037f] enabled PCI: 00:04.0 [10de/0370] enabled PCI: 00:04.1 [10de/0371] enabled Disabling static device: PCI: 00:05.0 Disabling static device: PCI: 00:05.1 Disabling static device: PCI: 00:05.2 PCI: 00:06.0 [10de/0372] enabled PCI: 00:07.0 [10de/0372] enabled PCI: 00:08.0 [10de/0376] enabled PCI: 00:09.0 [10de/0374] disabled PCI: 00:0a.0 [10de/0374] enabled PCI: 00:0b.0 [10de/0378] enabled PCI: 00:0c.0 [10de/0375] enabled PCI: 00:0d.0 [10de/0377] enabled Disabling static device: PCI: 00:0e.0 PCI: 00:0f.0 [10de/02f4] enabled PCI: 00:0f.1 [10de/02fa] enabled PCI: 00:0f.2 [10de/02fe] enabled PCI: 00:0f.3 [10de/02f8] enabled PCI: 00:0f.4 [10de/02f9] enabled PCI: 00:0f.5 [10de/02ff] enabled PCI: 00:0f.6 [10de/027f] enabled PCI: 00:0f.7 [10de/027e] enabled PCI: 00:11.0 subbordinate bus PCI Express PCI: 00:11.0 [10de/02fc] enabled PCI: 00:12.0 subbordinate bus PCI Express PCI: 00:12.0 [10de/02fd] enabled PCI: 00:13.0 subbordinate bus PCI Express PCI: 00:13.0 [10de/02fb] enabled PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled PCI: 00:1e.0 [10de/0369] enabled PCI: 00:1f.0 [10de/0360] enabled PCI: 00:1f.1 [10de/0368] enabled PCI: 00:1f.2 [10de/036a] enabled PCI: 00:1f.3 [10de/036b] enabled PCI: 00:00.0 [10de/036c] enabled PCI: 00:00.1 [10de/036d] enabled PCI: 00:02.0 [10de/036e] enabled PCI: 00:03.0 [10de/037f] enabled PCI: 00:03.1 [10de/037f] enabled PCI: 00:03.2 [10de/037f] enabled PCI: 00:04.0 [10de/0370] enabled PCI: 00:04.1 [10de/0371] enabled PCI: 00:06.0 [10de/0372] enabled PCI: 00:07.0 [10de/0372] enabled PCI: 00:08.0 [10de/0376] enabled PCI: 00:09.0 [10de/0374] enabled PCI: 00:0a.0 [10de/0374] enabled PCI: 00:0b.0 [10de/0378] enabled PCI: 00:0c.0 [10de/0375] enabled PCI: 00:0d.0 [10de/0377] enabled PCI: 00:0f.0 [10de/02f4] enabled PCI: 00:0f.1 [10de/02fa] enabled PCI: 00:0f.2 [10de/02fe] enabled PCI: 00:0f.3 [10de/02f8] enabled PCI: 00:0f.4 [10de/02f9] enabled PCI: 00:0f.5 [10de/02ff] enabled PCI: 00:0f.6 [10de/027f] enabled PCI: 00:0f.7 [10de/027e] enabled PCI: 00:11.0 subbordinate bus PCI Express PCI: 00:11.0 [10de/02fc] enabled PCI: 00:12.0 subbordinate bus PCI Express PCI: 00:12.0 [10de/02fd] enabled PCI: 00:13.0 subbordinate bus PCI Express PCI: 00:13.0 [10de/02fb] enabled PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled PCI: 00:1e.0 [10de/0369] enabled PCI: 00:1f.0 [10de/0360] enabled PCI: 00:1f.1 [10de/0368] enabled PCI: 00:1f.2 [10de/036a] enabled PCI: 00:1f.3 [10de/036b] enabled PCI: 00:00.0 [10de/036c] enabled PCI: 00:00.1 [10de/036d] enabled PCI: 00:02.0 [10de/036e] enabled PCI: 00:03.0 [10de/037f] enabled PCI: 00:03.1 [10de/037f] enabled PCI: 00:03.2 [10de/037f] enabled PCI: 00:04.0 [10de/0370] enabled PCI: 00:04.1 [10de/0371] enabled PCI: 00:06.0 [10de/0372] enabled PCI: 00:07.0 [10de/0372] enabled PCI: 00:08.0 [10de/0376] enabled PCI: 00:09.0 [10de/0374] enabled PCI: 00:0a.0 [10de/0374] enabled PCI: 00:0b.0 [10de/0378] enabled PCI: 00:0c.0 [10de/0375] enabled PCI: 00:0d.0 [10de/0377] enabled PCI: 00:0f.0 [10de/02f4] enabled PCI: 00:0f.1 [10de/02fa] enabled PCI: 00:0f.2 [10de/02fe] enabled PCI: 00:0f.3 [10de/02f8] enabled PCI: 00:0f.4 [10de/02f9] enabled PCI: 00:0f.5 [10de/02ff] enabled PCI: 00:0f.6 [10de/027f] enabled PCI: 00:0f.7 [10de/027e] enabled PCI: 00:11.0 subbordinate bus PCI Express PCI: 00:11.0 [10de/02fc] enabled PCI: 00:12.0 subbordinate bus PCI Express PCI: 00:12.0 [10de/02fd] enabled PCI: 00:13.0 subbordinate bus PCI Express PCI: 00:13.0 [10de/02fb] enabled PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled Error! malloc: free_mem_ptr >= free_mem_end_ptr Factory bios comes up with these devices: 00:00.0 0500: 10de:02f4 (rev a2) 00:00.1 0500: 10de:02fa (rev a2) 00:00.2 0500: 10de:02fe (rev a2) 00:00.3 0500: 10de:02f8 (rev a2) 00:00.4 0500: 10de:02f9 (rev a2) 00:00.5 0500: 10de:02ff (rev a2) 00:00.6 0500: 10de:027f (rev a2) 00:00.7 0500: 10de:027e (rev a2) 00:03.0 0604: 10de:02fd (rev a1) 00:04.0 0604: 10de:02fb (rev a1) 00:08.0 0500: 10de:0369 (rev a1) 00:09.0 0601: 10de:0360 (rev a2) 00:09.1 0c05: 10de:0368 (rev a2) 00:09.2 0500: 10de:036a (rev a2) 00:0a.0 0c03: 10de:036c (rev a1) 00:0a.1 0c03: 10de:036d (rev a2) 00:0c.0 0101: 10de:036e (rev a1) 00:0d.0 0101: 10de:037f (rev a2) 00:0d.1 0101: 10de:037f (rev a2) 00:0d.2 0101: 10de:037f (rev a2) 00:0e.0 0604: 10de:0370 (rev a2) 00:0e.1 0403: 10de:0371 (rev a2) 00:10.0 0680: 10de:0373 (rev a2) 00:11.0 0680: 10de:0373 (rev a2) 00:12.0 0604: 10de:0376 (rev a2) 00:14.0 0604: 10de:0374 (rev a2) 00:16.0 0604: 10de:0375 (rev a2) 00:17.0 0604: 10de:0377 (rev a2) 00:18.0 0600: 1022:1100 00:18.1 0600: 1022:1101 00:18.2 0600: 1022:1102 00:18.3 0600: 1022:1103 02:00.0 0300: 10de:0392 (rev a1) 03:0b.0 0c00: 104c:8023 06:00.0 0180: 1095:3132 (rev 01) 00:00.0 RAM memory: nVidia Corporation C51 Host Bridge (rev a2) 00:00.1 RAM memory: nVidia Corporation C51 Memory Controller 0 (rev a2) 00:00.2 RAM memory: nVidia Corporation C51 Memory Controller 1 (rev a2) 00:00.3 RAM memory: nVidia Corporation C51 Memory Controller 5 (rev a2) 00:00.4 RAM memory: nVidia Corporation C51 Memory Controller 4 (rev a2) 00:00.5 RAM memory: nVidia Corporation C51 Host Bridge (rev a2) 00:00.6 RAM memory: nVidia Corporation C51 Memory Controller 3 (rev a2) 00:00.7 RAM memory: nVidia Corporation C51 Memory Controller 2 (rev a2) 00:03.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1) 00:04.0 PCI bridge: nVidia Corporation C51 PCI Express Bridge (rev a1) 00:08.0 RAM memory: nVidia Corporation MCP55 Memory Controller (rev a1) 00:09.0 ISA bridge: nVidia Corporation MCP55 LPC Bridge (rev a2) 00:09.1 SMBus: nVidia Corporation MCP55 SMBus (rev a2) 00:09.2 RAM memory: nVidia Corporation MCP55 Memory Controller (rev a2) 00:0a.0 USB Controller: nVidia Corporation MCP55 USB Controller (rev a1) 00:0a.1 USB Controller: nVidia Corporation MCP55 USB Controller (rev a2) 00:0c.0 IDE interface: nVidia Corporation MCP55 IDE (rev a1) 00:0d.0 IDE interface: nVidia Corporation MCP55 SATA Controller (rev a2) 00:0d.1 IDE interface: nVidia Corporation MCP55 SATA Controller (rev a2) 00:0d.2 IDE interface: nVidia Corporation MCP55 SATA Controller (rev a2) 00:0e.0 PCI bridge: nVidia Corporation MCP55 PCI bridge (rev a2) 00:0e.1 Audio device: nVidia Corporation MCP55 High Definition Audio (rev a2) 00:10.0 Bridge: nVidia Corporation MCP55 Ethernet (rev a2) 00:11.0 Bridge: nVidia Corporation MCP55 Ethernet (rev a2) 00:12.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2) 00:14.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2) 00:16.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2) 00:17.0 PCI bridge: nVidia Corporation MCP55 PCI Express bridge (rev a2) 00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] HyperTransport Technology Configuration 00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Address Map 00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] DRAM Controller 00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 [Athlon64/Opteron] Miscellaneous Control 02:00.0 VGA compatible controller: nVidia Corporation G70 [GeForce 7600 GS] (rev a1) 03:0b.0 FireWire (IEEE 1394): Texas Instruments TSB43AB22/A IEEE-1394a-2000 Controller (PHY/Link) 06:00.0 Mass storage controller: Silicon Image, Inc. SiI 3132 Serial ATA Raid II Controller (rev 01) Any ideas what could go wrong? -- coresystems GmbH • Brahmsstr. 16 • D-79104 Freiburg i. Br. Tel.: +49 761 7668825 • Fax: +49 761 7664613 Email: info(a)coresystems.de • http://www.coresystems.de/

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[LinuxBIOS] Tyan S2885 interrupt problem...
by Richard Wei 12 Sep '07

12 Sep '07

Traped in the interrupt problem for a long time. Need someone's guidance. When I disabled SMP and Power Management support in Linux 2.6.14, I was able to enter the shell without any IRQ ability (IRQ=0) for all PCI devices. Checking for some discussions and found out that most of the successful case has to turn them on, and expect I/O APIC and local APIC to assigned IRQ for PCI devices. Am I on the right track? Or is there other method to assigned IRQ? But everytime init_lapic_sysfs called, the kernel hang~ Did I miss anything? Any suggestion is appreciated~ Richard Wei ========================================================== Environment: MB:Tyan S2885 Only one AMD Opteron CPU is mounted on. LinuxBIOSv2-2751, Linux 2.6.14 ======================================================== log message (I/O APIC Enabled) ======================================================== LinuxBIOS-2.0.0_s2885_Fallback Wed Sep 12 09:39:37 CST 2007 starting... 01 nodes initialized. core0 started: started ap apicid: SBLink=02 NC node|link=00 busn=40 NC node|link=02 ht reset - LinuxBIOS-2.0.0_s2885_Fallback Wed Sep 12 09:39:37 CST 2007 starting... 01 nodes initialized. core0 started: started ap apicid: SBLink=02 NC node|link=00 busn=40 NC node|link=02 Ram1.00 Ram2.00 Ram3 Initializing memory: done Ram4 v_esp=000cfd24 testx = 5a5a5a5a Copying data from cache to RAM -- switching to use RAM as stack... Done testx = 5a5a5a5a Disabling cache as ram now Clearing initial memory region: Done Copying LinuxBIOS to RAM. src=fffe0000 dst=00004000 linxbios_ram.nrv2b length = 000093a5 linxbios_ram.bin length = 0001898c Jumping to LinuxBIOS. LinuxBIOS-2.0.0_s2885_Fallback Wed Sep 12 09:39:37 CST 2007 booting... Enumerating buses... APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 enabled PCI: 00:18.3 siblings=0 Found Rev E or Rev F later single core CPU: APIC: 00 enabled PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled PCI: 00:00.0 [1022/7450] enabled PCI: 00:0a.0 [1022/7450] enabled next_unitid: 000c PCI: 00:00.0 [1022/7460] enabled PCI: 00:0c.0 [1022/7460] enabled next_unitid: 0010 PCI: pci_scan_bus for bus 00 PCI: 00:06.0 [1022/7460] enabled PCI: 00:07.0 [1022/7468] enabled PCI: 00:07.1 [1022/7469] enabled PCI: 00:07.2 [1022/746a] enabled PCI: 00:07.3 [1022/746b] enabled PCI: 00:07.5 [1022/746d] enabled PCI: 00:0a.0 [1022/7450] enabled PCI: 00:0a.1 [1022/7451] enabled PCI: 00:0b.0 [1022/7450] enabled PCI: 00:0b.1 [1022/7451] enabled PCI: pci_scan_bus for bus 01 PCI: 01:00.0 [1022/7464] enabled PCI: 01:00.1 [1022/7464] enabled PCI: 01:0b.0 [1095/3114] enabled PCI: 01:0c.0 [104c/8023] enabled PCI: pci_scan_bus returning with max=001 PNP: 002e.0 enabled PNP: 002e.1 disabled PNP: 002e.2 enabled PNP: 002e.3 enabled PNP: 002e.5 enabled PNP: 002e.6 disabled PNP: 002e.7 disabled PNP: 002e.8 disabled PNP: 002e.9 disabled PNP: 002e.a disabled PNP: 002e.b enabled smbus: PCI: 00:07.3[0]->I2C: 01:50 enabled smbus: PCI: 00:07.3[0]->I2C: 01:51 enabled smbus: PCI: 00:07.3[0]->I2C: 01:52 enabled smbus: PCI: 00:07.3[0]->I2C: 01:53 enabled smbus: PCI: 00:07.3[0]->I2C: 01:54 enabled smbus: PCI: 00:07.3[0]->I2C: 01:55 enabled smbus: PCI: 00:07.3[0]->I2C: 01:56 enabled smbus: PCI: 00:07.3[0]->I2C: 01:57 enabled PCI: pci_scan_bus for bus 02 PCI: 02:09.0 [14e4/16a7] enabled PCI: pci_scan_bus returning with max=002 PCI: 02: 100MHz PCI-X PCI: 02:09.0 AMD8131 PCI-X tuning PCI: pci_scan_bus for bus 03 PCI: pci_scan_bus returning with max=003 PCI: 03: 133MHz PCI-X PCI: pci_scan_bus returning with max=003 PCI: 40:00.0 [1022/7454] enabled PCI: 40:01.0 [1022/7454] enabled next_unitid: 0004 PCI: pci_scan_bus for bus 40 PCI: 40:01.0 [1022/7454] enabled PCI: 40:02.0 [1022/7455] enabled PCI: pci_scan_bus for bus 41 PCI: 41:00.0 [10de/0181] enabled PCI: pci_scan_bus returning with max=041 PCI: pci_scan_bus returning with max=041 PCI: pci_scan_bus returning with max=041 done Allocating resources... Reading resources... PCI: 40:02.0 1c <- [0x00fffff000 - 0x00ffffefff] bus 41 io PCI: 00:06.0 24 <- [0x00fff00000 - 0x00ffefffff] bus 01 prefmem PCI: 00:0a.0 1c <- [0x00fffff000 - 0x00ffffefff] bus 02 io PCI: 00:0a.0 24 <- [0xfffffffffff00000 - 0xffffffffffefffff] bus 02 prefmem Done reading resources. Setting resources... PCI: 00:18.0 1d8 <- [0x0000003000 - 0x0000002fff] io <node 0 link 0> PCI: 00:18.0 1b8 <- [0x00e0000000 - 0x00f3ffffff] prefmem <node 0 link 0> PCI: 00:18.0 1b0 <- [0x00f8000000 - 0x00f91fffff] mem <node 0 link 0> PCI: 00:18.0 1d2 <- [0x0000001000 - 0x0000002fff] io <node 0 link 2> PCI: 00:18.0 1aa <- [0x00f9500000 - 0x00f94fffff] prefmem <node 0 link 2> PCI: 00:18.0 1a2 <- [0x00f9200000 - 0x00f94fffff] mem <node 0 link 2> PCI: 40:01.0 10 <- [0x00e0000000 - 0x00efffffff] prefmem PCI: 40:01.0 14 <- [0x00f9100000 - 0x00f9100000] mem PCI: 40:02.0 24 <- [0x00f0000000 - 0x00f3ffffff] bus 41 prefmem PCI: 40:02.0 20 <- [0x00f8000000 - 0x00f90fffff] bus 41 mem PCI: 41:00.0 10 <- [0x00f8000000 - 0x00f8ffffff] mem PCI: 41:00.0 14 <- [0x00f0000000 - 0x00f3ffffff] prefmem PCI: 41:00.0 30 <- [0x00f9000000 - 0x00f901ffff] romem PCI: 00:06.0 1c <- [0x0000001000 - 0x0000001fff] bus 01 io PCI: 00:06.0 20 <- [0x00f9200000 - 0x00f92fffff] bus 01 mem PCI: 01:00.0 10 <- [0x00f9204000 - 0x00f9204fff] mem PCI: 01:00.1 10 <- [0x00f9205000 - 0x00f9205fff] mem PCI: 01:0b.0 10 <- [0x0000001010 - 0x0000001017] io PCI: 01:0b.0 14 <- [0x0000001030 - 0x0000001033] io PCI: 01:0b.0 18 <- [0x0000001020 - 0x0000001027] io PCI: 01:0b.0 1c <- [0x0000001040 - 0x0000001043] io PCI: 01:0b.0 20 <- [0x0000001000 - 0x000000100f] io PCI: 01:0b.0 24 <- [0x00f9207000 - 0x00f92073ff] mem PCI: 01:0c.0 10 <- [0x00f9206000 - 0x00f92067ff] mem PCI: 01:0c.0 14 <- [0x00f9200000 - 0x00f9203fff] mem PNP: 002e.0 60 <- [0x00000003f0 - 0x00000003f7] io PNP: 002e.0 70 <- [0x0000000006 - 0x0000000006] irq PNP: 002e.0 74 <- [0x0000000002 - 0x0000000002] drq PNP: 002e.2 60 <- [0x00000003f8 - 0x00000003ff] io PNP: 002e.2 70 <- [0x0000000004 - 0x0000000004] irq PNP: 002e.3 60 <- [0x00000002f8 - 0x00000002ff] io PNP: 002e.3 70 <- [0x0000000003 - 0x0000000003] irq PNP: 002e.5 60 <- [0x0000000060 - 0x0000000060] io PNP: 002e.5 62 <- [0x0000000064 - 0x0000000064] io PNP: 002e.5 70 <- [0x0000000001 - 0x0000000001] irq PNP: 002e.5 72 <- [0x000000000c - 0x000000000c] irq PNP: 002e.b 60 <- [0x0000000290 - 0x0000000297] io PNP: 002e.b 70 <- [0x0000000005 - 0x0000000005] irq PCI: 00:07.1 20 <- [0x0000002860 - 0x000000286f] io PCI: 00:07.2 10 <- [0x0000002840 - 0x000000285f] io PCI: 00:07.3 58 <- [0x0000002000 - 0x00000020ff] io PCI: 00:07.5 10 <- [0x0000002400 - 0x00000024ff] io PCI: 00:07.5 14 <- [0x0000002800 - 0x000000283f] io PCI: 00:0a.0 20 <- [0x00f9300000 - 0x00f93fffff] bus 02 mem PCI: 02:09.0 10 <- [0x00f9300000 - 0x00f930ffff] mem64 PCI: 00:0a.1 10 <- [0x00f9400000 - 0x00f9400fff] mem64 PCI: 00:0b.1 10 <- [0x00f9401000 - 0x00f9401fff] mem64 PCI: 00:18.3 94 <- [0x00f4000000 - 0x00f7ffffff] mem <gart> Done setting resources. Done allocating resources. Enabling resources... PCI: 00:18.0 cmd <- 140 PCI: 40:01.0 subsystem <- 10f1/2885 PCI: 40:01.0 cmd <- 146 PCI: 40:02.0 bridge ctrl <- 0003 PCI: 40:02.0 cmd <- 146 PCI: 41:00.0 cmd <- 142 PCI: 00:06.0 bridge ctrl <- 0003 PCI: 00:06.0 cmd <- 147 PCI: 01:00.0 subsystem <- 10f1/2885 PCI: 01:00.0 cmd <- 142 PCI: 01:00.1 subsystem <- 10f1/2885 PCI: 01:00.1 cmd <- 142 PCI: 01:0b.0 subsystem <- 10f1/2885 PCI: 01:0b.0 cmd <- 143 PCI: 01:0c.0 cmd <- 142 PCI: 00:07.0 subsystem <- 10f1/2885 PCI: 00:07.0 cmd <- 14f w83627hf hwm smbus enabled PCI: 00:07.1 subsystem <- 10f1/2885 PCI: 00:07.1 cmd <- 141 PCI: 00:07.2 subsystem <- 10f1/2885 PCI: 00:07.2 cmd <- 141 PCI: 00:07.3 subsystem <- 10f1/2885 PCI: 00:07.3 cmd <- 141 PCI: 00:07.5 subsystem <- 10f1/2885 PCI: 00:07.5 cmd <- 141 PCI: 00:0a.0 bridge ctrl <- 0003 PCI: 00:0a.0 cmd <- 146 PCI: 02:09.0 subsystem <- 10f1/2885 PCI: 02:09.0 cmd <- 142 PCI: 00:0a.1 subsystem <- 10f1/2885 PCI: 00:0a.1 cmd <- 146 PCI: 00:0b.1 subsystem <- 10f1/2885 PCI: 00:0b.1 cmd <- 146 PCI: 00:18.1 subsystem <- 10f1/2885 PCI: 00:18.1 cmd <- 140 PCI: 00:18.2 subsystem <- 10f1/2885 PCI: 00:18.2 cmd <- 140 PCI: 00:18.3 cmd <- 140 done. Initializing devices... Root Device init APIC_CLUSTER: 0 init Initializing CPU #0 CPU: vendor AMD device 20f51 CPU: family 0f, model 25, stepping 01 Enabling cache Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 512MB, type WB DONE variable MTRRs Clear out the extra MTRR's MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled CPU model AMD Opteron(tm) Processor 248 Setting up local apic... apic_id: 0x00 done. Clearing memory 2048K - 524288K: ------- done CPU #0 Initialized All AP CPUs stopped PCI: 00:18.0 init PCI: 40:02.0 init PCI: 00:0a.0 init PCI: 02:09.0 init PCI: 00:06.0 init PCI: 01:0b.0 init PCI: 00:07.0 init amd8111: ioapic bsp_apicid = 00 RTC Init Invalid CMOS LB checksum enabling HPET @0xfed00000 PNP: 002e.0 init PNP: 002e.2 init PNP: 002e.3 init PNP: 002e.5 init PNP: 002e.b init PCI: 00:07.1 init IDE1 IDE0 PCI: 00:07.3 init set power on after power fail PCI: 00:18.1 init PCI: 00:18.2 init PCI: 00:18.3 init NB: Function 3 Misc Control.. done. PCI: 01:0c.0 init PCI: 41:00.0 init Devices initialized Writing IRQ routing tables to 0xf0000...done. Wrote the mp table end at: 00000020 - 000003e0 Moving GDT to 0x500...ok Adjust low_table_end from 0x00000530 to 0x00001000 Adjust rom_table_end from 0x000f0400 to 0x00100000 Wrote linuxbios table at: 00000530 - 00000dbc checksum 6d01 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 rom_stream: 0xfffc0000 - 0xfffdffff Found ELF candidate at offset 0 header_offset is 0 Try to load at offset 0x0 New segment addr 0x100000 size 0x23740 offset 0xc0 filesize 0x9594 (cleaned up) New segment addr 0x100000 size 0x23740 offset 0xc0 filesize 0x9594 New segment addr 0x123740 size 0x48 offset 0x9660 filesize 0x48 (cleaned up) New segment addr 0x123740 size 0x48 offset 0x9660 filesize 0x48 Dropping non PT_LOAD segment Dropping non PT_LOAD segment Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000023740 filesz: 0x00 00000000009594 Clearing Segment: addr: 0x0000000000109594 memsz: 0x000000000001a1ac Loading Segment: addr: 0x0000000000123740 memsz: 0x0000000000000048 filesz: 0x00 00000000000048 Jumping to boot code at 0x106568 FILO version 0.5 (root(a)host.domain.com) Tue Sep 4 11:25:34 CST 2007 collect_sys_info: boot eax = 0xe1fb007 collect_sys_info: boot ebx = 0x1ffda180 collect_sys_info: boot arg = 0x1ffda180 malloc_diag: alloc: 0 bytes (0 blocks), free: 16376 bytes (1 blocks) malloc_diag: alloc: 24 bytes (1 blocks), free: 16352 bytes (1 blocks) collect_elfboot_info: Bootloader: elfboot collect_elfboot_info: Version: 1.3 malloc_diag: alloc: 40 bytes (2 blocks), free: 16336 bytes (1 blocks) collect_linuxbios_info: Searching for LinuxBIOS tables... find_lb_table: Found canidate at: 00000530 find_lb_table: header checksum o.k. find_lb_table: table checksum o.k. find_lb_table: record count o.k. collect_linuxbios_info: Found LinuxBIOS table at: 00000530 convert_memmap: 0x00000000000000 0x00000000001000 16 convert_memmap: 0x00000000001000 0x0000000009f000 1 convert_memmap: 0x000000000c0000 0x00000000030000 1 convert_memmap: 0x000000000f0000 0x00000000010000 16 convert_memmap: 0x00000000100000 0x0000001ff00000 1 collect_sys_info: 0000000000001000-00000000000a0000 collect_sys_info: 00000000000c0000-00000000000f0000 collect_sys_info: 0000000000100000-0000000020000000 collect_sys_info: RAM 512 MB relocate: Current location: 0x100000-0x123787 relocate: Relocating to 0x1ffdc870-0x1ffffff7... ok setup_timers: CPU 2191 MHz Press <Enter> for default boot, or <Esc> for boot prompt... timed out boot: hda1:/vmlinuz-2.6.14 root=/dev/VolGroup00/LogVol00 initrd=/initrd-2.6.14.i mg console=tty0 console=ttyS0,115200 enforcing=0 malloc_diag: alloc: 176 bytes (3 blocks), free: 16200 bytes (1 blocks) malloc_diag: alloc: 192 bytes (4 blocks), free: 16184 bytes (1 blocks) file_open: dev=hda1, path=/vmlinuz-2.6.14 ide_software_reset: Waiting for ide0 to become ready for reset... ok ide_software_reset: await 1 ide_software_reset: await 2 init_drive: Testing for hda init_drive: Probing for hda init_drive: LBA mode, sectors=19746720 init_drive: Init device params... ok hda: LBA 10GB: IBM-DTTA-371010 init_drive: Testing for hdb init_drive: Testing for hdb devopen: Partition 1 start 63 length 208782 Mounted ext2fs malloc_diag: alloc: 176 bytes (3 blocks), free: 16200 bytes (1 blocks) elf_load: Not a bootable ELF image malloc_diag: alloc: 192 bytes (4 blocks), free: 16184 bytes (1 blocks) file_open: dev=hda1, path=/vmlinuz-2.6.14 devopen: already open malloc_diag: alloc: 176 bytes (3 blocks), free: 16200 bytes (1 blocks) Found Linux version 2.6.14 (root(a)localhost.localdomain) #37 SMP Tue Sep 18 20:17 :17 CST 2007 (protocol 0x204) (loadflags 0x1) bzImage. init_linux_params: Setting up paramters at 0x90000 set_memory_size: 0000000000001000 - 00000000000a0000 set_memory_size: 00000000000c0000 - 00000000000f0000 set_memory_size: 0000000000100000 - 0000000020000000 set_memory_size: ramtop=0x20000000 set_memory_size: ext_mem_k=64512, alt_mem_k=523264 parse_command_line: original command line: "root=/dev/VolGroup00/LogVol00 initrd =/initrd-2.6.14.img console=tty0 console=ttyS0,115200 enforcing=0" parse_command_line: kernel command line at 0x91000 malloc_diag: alloc: 208 bytes (4 blocks), free: 16168 bytes (1 blocks) parse_command_line: initrd=/initrd-2.6.14.img parse_command_line: kernel command line (75 bytes): "root=/dev/VolGroup00/LogVol 00 console=tty0 console=ttyS0,115200 enforcing=0" load_linux_kernel: offset=0x2000 addr=0x100000 size=0x1613f1 Loading kernel... ok file_open: dev=<NULL>, path=/initrd-2.6.14.img load_initrd: start=0x1feec000 end=0x1ffdb9af Loading initrd... ok malloc_diag: alloc: 176 bytes (3 blocks), free: 16200 bytes (1 blocks) start_linux: eip=0x100000 Jumping to entry point... Linux version 2.6.14 (root(a)localhost.localdomain) (gcc version 3.4.3 20041212 (R ed Hat 3.4.3-9.EL4)) #37 SMP Tue Sep 18 20:17:17 CST 2007 BIOS-provided physical RAM map: BIOS-e820: 0000000000001000 - 00000000000a0000 (usable) BIOS-e820: 0000000000100000 - 0000000020000000 (usable) 0MB HIGHMEM available. 512MB LOWMEM available. found SMP MP-table at 00000010 DMI not present. Intel MultiProcessor Specification v1.4 Virtual Wire compatibility mode. OEM ID: TYAN Product ID: S2885 APIC at: 0xFEE00000 Processor #0 15:5 APIC version 16 I/O APIC #1 Version 17 at 0xFEC00000. I/O APIC #2 Version 17 at 0xF9400000. I/O APIC #3 Version 17 at 0xF9401000. Enabling APIC mode: Flat. Using 3 I/O APICs Processors: 1 Allocating PCI resources starting at 30000000 (gap: 20000000:e0000000) Built 1 zonelists Kernel command line: root=/dev/VolGroup00/LogVol00 console=tty0 console=ttyS0,11 5200 enforcing=0 Initializing CPU#0 PID hash table entries: 4096 (order: 12, 65536 bytes) Detected 2192.178 MHz processor. Using tsc for high-res timesource Console: colour dummy device 80x25 Dentry cache hash table entries: 131072 (order: 7, 524288 bytes) Inode-cache hash table entries: 65536 (order: 6, 262144 bytes) Memory: 514504k/524288k available (2103k kernel code, 9200k reserved, 633k data, 196k init, 0k highmem) Checking if this processor honours the WP bit even in supervisor mode... Ok. Calibrating delay using timer specific routine.. 4392.77 BogoMIPS (lpj=8785558) Mount-cache hash table entries: 512 CPU: L1 I Cache: 64K (64 bytes/line), D cache 64K (64 bytes/line) CPU: L2 Cache: 1024K (64 bytes/line) Intel machine check architecture supported. Intel machine check reporting enabled on CPU#0. mtrr: v2.0 (20020519) Enabling fast FPU save and restore... done. Enabling unmasked SIMD FPU exception support... done. Checking 'hlt' instruction... OK. CPU0: AMD Opteron(tm) Processor 248 stepping 01 Total of 1 processors activated (4392.77 BogoMIPS). ENABLING IO-APIC IRQs ..TIMER: vector=0x31 pin1=2 pin2=0 Brought up 1 CPUs checking if image is initramfs... it is Freeing initrd memory: 958k freed NET: Registered protocol family 16 PCI: Using configuration type 1 Linux Plug and Play Support v0.97 (c) Adam Belay SCSI subsystem initialized usbcore: registered new driver usbfs usbcore: registered new driver hub PCI: Probing PCI hardware PCI: Probing PCI hardware (bus 00) PCI: Unable to handle 64-bit address space for bridge 0000:00:0a.0 PCI: Unable to handle 64-bit address for device 0000:40:01.0 PCI: Discovered primary peer bus 40 [IRQ] PCI: Using IRQ router default [1022/7468] at 0000:00:07.0 PCI->APIC IRQ transform: 0000:00:07.2[D] -> IRQ 19 PCI->APIC IRQ transform: 0000:00:07.5[B] -> IRQ 17 PCI->APIC IRQ transform: 0000:01:00.0[D] -> IRQ 19 PCI->APIC IRQ transform: 0000:01:00.1[D] -> IRQ 19 PCI->APIC IRQ transform: 0000:01:0b.0[A] -> IRQ 17 PCI->APIC IRQ transform: 0000:01:0c.0[A] -> IRQ 19 PCI->APIC IRQ transform: 0000:02:09.0[A] -> IRQ 24 PCI->APIC IRQ transform: 0000:41:00.0[A] -> IRQ 16 PCI: Bridge: 0000:00:06.0 IO window: 1000-1fff MEM window: f9200000-f92fffff PREFETCH window: 30000000-300fffff PCI: Bridge: 0000:00:0a.0 IO window: disabled. MEM window: f9300000-f93fffff PREFETCH window: 30100000-301fffff PCI: Bridge: 0000:00:0b.0 IO window: disabled. MEM window: disabled. PREFETCH window: disabled. PCI: Bridge: 0000:40:02.0 IO window: disabled. MEM window: f8000000-f90fffff PREFETCH window: f0000000-f3ffffff Unable to handle kernel NULL pointer dereference at virtual address 00000053 printing eip: c01c5c68 *pde = 00000000 Oops: 0000 [#1] SMP Modules linked in: CPU: 0 EIP: 0060:[<c01c5c68>] Not tainted VLI EFLAGS: 00010282 (2.6.14) EIP is at kref_get+0x8/0x50 eax: 00000053 ebx: 00000053 ecx: c036dba0 edx: 00000032 esi: dfede000 edi: 00000000 ebp: 00000000 esp: dfedff7c ds: 007b es: 007b ss: 0068 Process swapper (pid: 1, threadinfo=dfede000 task=c14eaa50) Stack: c036dbb4 c01c51d7 c036dbcc c035a0c8 0000003b c01c51d7 00000053 c035a0c8 c01c4f07 0000003b c03d5c3c dfede000 00000000 c03bd071 c035a0c8 c03b0a84 00000000 c033ed08 00000000 dfede000 00000000 00000000 c010039c 00000002 Call Trace: [<c01c51d7>] kobject_get+0x17/0x20 [<c01c51d7>] kobject_get+0x17/0x20 [<c01c4f07>] kobject_add+0x37/0xf0 [<c03bd071>] init_lapic_sysfs+0x21/0x40 [<c03b0a84>] do_initcalls+0x54/0xd0 [<c010039c>] init+0x7c/0x220 [<c0100320>] init+0x0/0x220 [<c0101225>] kernel_thread_helper+0x5/0x10 Code: 8b 5c 24 10 8b 7c 24 18 8b 6c 24 1c 83 c4 20 c3 90 90 90 8b 44 24 04 c7 00 01 00 00 00 c3 90 8d 74 26 00 53 83 ec 10 8b 5c 24 18 <8b> 03 85 c0 74 08 f0 ff 03 83 c4 10 5b c3 c7 44 24 0c 20 00 00 <0>Kernel panic - not syncing: Attempted to kill init! ____________________________________________________________________________________ Luggage? GPS? Comic books? Check out fitting gifts for grads at Yahoo! Search http://search.yahoo.com/search?fr=oni_on_mail&p=graduation+gifts&cs=bz

2 1

[LinuxBIOS] denver in april
by ron minnich 11 Sep '07

11 Sep '07

I've been asked for the following: "#1, can you use your mailing list to quickly take the temperature of those likely to attend, to see if they are sufficiently interested in a Denver meeting on March 31-April 1 in Denver. ", so, let me know if you think you could attend this. ron

5 4

[LinuxBIOS] quadcore opteron
by Fridel Fainshtein 11 Sep '07

11 Sep '07

Hi, Does quad core opteron needs some special software? If yes, is there any supporting open source code? (May be just first steps, cache as ram etc.) Thanks

4 4

[LinuxBIOS] ICH8(82801H) USB problem
by Jia Jianwei 11 Sep '07

11 Sep '07

I'm portting BIOS on Q965+ICH8DO, USB port in ICH8 is not working anyway, It's always reporting address assign timeout when I plug in a usb device, the error message is like this: hub.c: new USB device 00:1d.0-1, assigned address 4 usb_control/bulk_msg: timeout usb.c: USB device not accepting new address=4 (error=-110) I checked interrupt, seems interupt increased after USB device plug in. Can anyone give me some clues? Thanks in advance! Regards, Jianwei

3 3

[LinuxBIOS] r2770 build service
by LinuxBIOS information 11 Sep '07

11 Sep '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2770 to the LinuxBIOS source repository and caused the following changes: Change Log: Change out/in combinations to pci_read/write_byte in sis630 chipset enable. Signed-off-by: Alex Beregszaszi <alex(a)rtfs.hu> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2770&device=hdama&vendor=… Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2770&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2770&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2770&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2770&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2770&device=dk8x&vendor=i… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

1 0

[LinuxBIOS] [PATCH] Flashrom: sis630 simplification
by Alex Beregszaszi 11 Sep '07

11 Sep '07

Hi, attached patch changes out/in combinations to pci_read/write_byte in sis630 chipset enable. -- Alex

6 7

[LinuxBIOS] r2770 - trunk/util/flashrom
by svn＠openbios.org 11 Sep '07

11 Sep '07

Author: uwe Date: 2007-09-11 17:58:18 +0200 (Tue, 11 Sep 2007) New Revision: 2770 Modified: trunk/util/flashrom/chipset_enable.c Log: Change out/in combinations to pci_read/write_byte in sis630 chipset enable. Signed-off-by: Alex Beregszaszi <alex(a)rtfs.hu> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: trunk/util/flashrom/chipset_enable.c =================================================================== --- trunk/util/flashrom/chipset_enable.c 2007-09-09 20:24:29 UTC (rev 2769) +++ trunk/util/flashrom/chipset_enable.c 2007-09-11 15:58:18 UTC (rev 2770) @@ -46,13 +46,11 @@ char b; /* Enable 0xFFF8000~0xFFFF0000 decoding on SiS 540/630 */ - outl(0x80000840, 0x0cf8); - b = inb(0x0cfc) | 0x0b; - outb(b, 0xcfc); + b = pci_read_byte(dev, 0x40); + pci_write_byte(dev, 0x40, b | 0xb); /* Flash write enable on SiS 540/630 */ - outl(0x80000845, 0x0cf8); - b = inb(0x0cfd) | 0x40; - outb(b, 0xcfd); + b = pci_read_byte(dev, 0x45); + pci_write_byte(dev, 0x45, b | 0x40); /* The same thing on SiS 950 SuperIO side */ outb(0x87, 0x2e);

1 0

[LinuxBIOS] Xen and LinuxBIOS
by Joop Boonen 11 Sep '07

11 Sep '07

All, I'm thinking of buying a GA-M57SLI-S4 mainboard. As AMD-V isn't activated in the BIOS I probably want to use LinuxBIOS. As i want to use virtualisation i would like to know if LinuxBIOS also supports Xen i.e. I use a Xen aware kernel in LinuxBIOS that works. I would like to use LinuxBIOS in combination with OpenSuSE. Regards, Joop Boonen.

3 2

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coreboot September 2007