coreboot September 2007

coreboot@coreboot.org

81 participants
367 discussions

[LinuxBIOS] adlo
by Myles Watson 25 Sep '07

25 Sep '07

I've been struggling with booting windows on my Tyan s2891 box. For some reason the CD detection routine is a little flaky, but I can get it to boot every time if I have a raw hard drive and give it a few seconds after the Etherboot prompt before I tell it to load adlo. This also depends on the debugging output being enabled, so I suspect a timing issue, but I don't know where to look. I can install Windows XP on the hard drive. When I restart the machine (without the CD) it starts copying things from the hard drive into memory, displays the status bar on the bottom, then fails (the status bar turns orange, then blue) I think it may have to do with LBA translation, but my drives are getting recognized fine. I'm attaching my patch. I grabbed makesym.perl and biossums.c from Bochs so I could run it in the simulator as well. Some of the changes are for my debugging convenience. I'm open to suggestions for what to try next. Thanks, Myles

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[LinuxBIOS] [PATCH] Add pointer to device tree to LinuxBIOS table
by Jens Freimann 25 Sep '07

25 Sep '07

Hi, this patch adds a pointer to the LinuxBIOS table which points to the root device. I use it to access the LB device tree from Open Firmware. There is one patch for v2 and another one for v3. Bye, Jens

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[LinuxBIOS] sata issues on tyan s2891
by Ward Vandewege 25 Sep '07

25 Sep '07

Hi all, I finally got our tyan s2891 to boot LinuxBIOS (the ck804 chipset can't emulate SATA disks as IDE, so you need linux-as-a-bootloader + kexec to make it boot), but it turns out there are some issues with SATA. This machine has 4 sata ports, to three of which a drive is connected. All drives are identical. I'm testing using a stock 2.6.22.6, 64 bit, no special boot parameters. When booted into the proprietary BIOS, all three drives are properly and swiftly detected during boot. There is a bit of confusion: the Linux kernel sees sata controller 1 as the second controller, and sata controller 2 as the first. The drives are physically connected to sata controller 1 (drive 1,2) and sata controller 2 (drive 3). Position 4 on sata controller 2 is empty. The kernel sees the drives as controller 1 position 2, and controller 2 position 3,4. When booting with LinuxBIOS, only one of the drives is detected. (as it so happens, drive 3 on sata controller 2). The drive in position 4 on controller 2 is half detected as you'll see in the logs - the drive type is read out, but detection times out. The drive at position 2 on controller 1 is not detected at all. I have saved boot logs, lspci -vvvnx, lspci, lshw and x86info -mp output, all of which you can find here: http://ward.vandewege.net/s2891/ The linuxbios boot log is somewhat complicated - you'll see the machine boots a stripped-down 2.6.22.2 first (from rom, LAB), and then kexecs into a full-fledged 2.6.22.6. The system does boot eventually, but only because those 3 drives happen to be configured as software raid-1. It also takes a long time for the system to come up, because the sata detection on the drive in position 4 times out for both kernels. Any thoughts? Thanks, Ward. -- Ward Vandewege <ward(a)fsf.org> Free Software Foundation - Senior System Administrator

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[LinuxBIOS] r40 - buildrom-devel/packages/filo/conf
by svn＠openbios.org 25 Sep '07

25 Sep '07

Author: ward Date: 2007-09-25 21:49:42 +0200 (Tue, 25 Sep 2007) New Revision: 40 Modified: buildrom-devel/packages/filo/conf/tyan-s2891-Config Log: Disable full FILO debugging output by default, this is not necessary (trivial). Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Ward Vandewege <ward(a)gnu.org> Modified: buildrom-devel/packages/filo/conf/tyan-s2891-Config =================================================================== --- buildrom-devel/packages/filo/conf/tyan-s2891-Config 2007-09-24 22:13:39 UTC (rev 39) +++ buildrom-devel/packages/filo/conf/tyan-s2891-Config 2007-09-25 19:49:42 UTC (rev 40) @@ -31,7 +31,7 @@ LINUX_LOADER = 1 # Debugging -DEBUG_ALL = 1 +#DEBUG_ALL = 1 #DEBUG_ELFBOOT = 1 #DEBUG_ELFNOTE = 1 #DEBUG_LINUXBIOS = 1

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[LinuxBIOS] LinuxBios For Buy 2 Get 1 OLPC Laptop
by big one 25 Sep '07

25 Sep '07

OLPC (One Laptop Per Child) "Buy 2 Get 1" Laptops are sold for the public. One laptop is sent to the buyer and the other laptop is sent to a child in poor developing country. Unfortunately there is NO BIOS in OLPC, therefore public users cannot use FreeDOS, BSD, AROS, Haiku, ReactOS etc. Is it possible to port LinuxBIOS to OLPC laptops? Who can do this job? Thank you. _____________________________________________________________ = You want FREE web-based email ? = You want your own @qon.lao.net address?? = Then you want LaoNet's WebMail ! = Get it at http://webmail.lao.net !!

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Re: [LinuxBIOS] Two more CS5530 IRQ steering questions
by Jonathan Sturges 25 Sep '07

25 Sep '07

>>Jonathan Sturges wrote: >> Two additional questions about CS5530 IRQ steering: >> 1) Comments from Uwe Hermann and Peter Stuge have indicated that it's really better for the kernel to setup the steering registers. Why is this? It sounds like the BIOS is a good place to set these. I assume that a knowledgeable OS could change them if necessary? At the very least, it does sound like we all agree that it's OK to have LB setup the steering until Linux is fixed. >> >> 2) Question about irq_tables.c. Many of the CS5536 systems have a write_pirq_routing_table() in irq_tables.c that sets the steering registers. I'd like to be able to set the steering registers in CS5530 systems too, but I'm not a software developer and I need some help. So in src/mainboard/artecgroup/dbe61/irq_tables.c, you have: >> /* Set up chipset IRQ steering. */ >> pciAddr = 0x80000000 | (CHIPSET_DEV_NUM << 11) | 0x5C; >> chipset_irq_map = (PIRQD << 12 | PIRQC << 8 | PIRQB << 4 | PIRQA); >> printk_debug("%s(%08X, %04X)\n", __FUNCTION__, pciAddr, >> chipset_irq_map); >> outl(pciAddr & ~3, 0xCF8); >> outl(chipset_irq_map, 0xCFC);My main question with this block of code is what the two outl() calls are for. It looks like pciAddr gets the address of the 0x5c steering register, and chipset_irq_map sets the right bits to set all 4 PIRQ lines. But I'd expect to see the chipset_irq_map written to pciAddr. >> >> As an alternative, Kenji Noguchi used this code block to set the registers in a CS5530 system he's working on (posted 5-May-2007): >> device_t pdev; >> //CS5530A >> pdev = dev_find_slot(0, (0x12 << 3) + 0); >> pci_write_config8(pdev, 0x5c, 0xab); >> pci_write_config8(pdev, 0x5d, 0x09); >> >> >> This block makes more sense to me. Obviously the register values could be set by >> #defines, but it looks simpler to me. >> >> Bottom line is, before I implement IRQ steering for my CS5530 system, I want to understand what the first code block is doing, and if (or why) it's preferable over the 2nd code block. Any guidance is appreciated. >> >> thanks, >> Jonathan > > >outl(pciAddr & ~3, 0xCF8); >outl(chipset_irq_map, 0xCFC) > >is basically the same as > >pci_write_config8(pdev, 0x5c, 0xab); >pci_write_config8(pdev, 0x5d, 0x09); > > >CFC/CF8 is the PCI config space. Ahhh... thanks Marc, that was the clarification I needed. With that in mind, that block of code should work directly with the CS5530 after defining CHIPSET_DEV_NUM appropriately. What about '0x80000000', is that a common base address applicable to all CS553x systems? thanks, Jonathan ____________________________________________________________________________________ Fussy? Opinionated? Impossible to please? Perfect. Join Yahoo!'s user panel and lay it on us. http://surveylink.yahoo.com/gmrs/yahoo_panel_invite.asp?a=7

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Re: [LinuxBIOS] r39 - in buildrom-devel: config/payloads config/platforms packages/filo/conf packages/kernel packages/kernel/conf packages/linuxbios packages/linuxbios/patches
by Uwe Hermann 25 Sep '07

25 Sep '07

On Tue, Sep 25, 2007 at 12:13:39AM +0200, svn(a)openbios.org wrote: > +# Debugging > +DEBUG_ALL = 1 Do you really want this as the default? Should be a config option maybe and default to off (if all of this usually Just Works). > +$(SOURCE_DIR)/$(KERNEL_SOURCE): > + @ mkdir -p $(SOURCE_DIR) ^ Why a space here? > + @ wget -P $(SOURCE_DIR) $(KERNEL_URL)/$(KERNEL_SOURCE) > + > +$(SOURCE_DIR)/$(TINY_SOURCE): > + @ mkdir -p $(SOURCE_DIR) > + @ wget -P $(SOURCE_DIR) $(TINY_URL)/$(TINY_SOURCE) > ++ option CONFIG_COMPRESSED_PAYLOAD_LZMA=1 > ++ option CONFIG_PRECOMPRESSED_PAYLOAD=1 > ++ option ROM_IMAGE_SIZE=0x17000 > ++ option XIP_ROM_SIZE=0x40000 Make all values readable as in 'xyz * 1024' please. Why should we obfuscate this stuff more than necessary? Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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[LinuxBIOS] EFI Payload help: how to identify the resource types and attributes in LB
by Xiong Yi 25 Sep '07

25 Sep '07

Hi, all I am developing the EFI payload for LB (see http://code.google.com/soc/2007/coresystems/appinfo.html?csaid=83B941F46A422 F1A). And I am unifying the resource management of LB and EFI. In more details, I am parsing the LB table and converting it to the HOB structures of Tiano EFI. I described this idea several days ago. (http://www.linuxbios.org/pipermail/linuxbios/2007-June/022340.html) But there is a problem: The Tiano EFI describes the system resources as types and attributes, such as the following definition: //********************************************************* // EFI_RESOURCE_TYPE (define the resource type) //********************************************************* typedef UINT32 EFI_RESOURCE_TYPE; #define EFI_RESOURCE_SYSTEM_MEMORY 0x00000000 (system memory resource) #define EFI_RESOURCE_MEMORY_MAPPED_IO 0x00000001 (memory-mapped IO) #define EFI_RESOURCE_IO 0x00000002 (Processor IO space) #define EFI_RESOURCE_FIRMWARE_DEVICE 0x00000003 (Memory-mapped firmware device) #define EFI_RESOURCE_MEMORY_RESERVED 0x00000005 (Reserved memory address space) #define EFI_RESOURCE_IO_RESERVED 0x00000006 (Reserved IO address space) //************************************************************************** ******** // EFI_RESOURCE_ATTRIBUTE_TYPE(define the resource attributes) //************************************************************************** ******** typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE; // These types can be ORed together as needed. #define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001 (the memory region exists) #define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002 (the memory region has been initialized) #define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004 (the memory region has been tested) And there are similar definitions in the LB's /src/include/device/resourch.h file. But I can just find IORESOURCE_MEM | IORESOURCE_CACHEABLE (system memory) resources types and LB_MEM_RAM, LB_MEM_TABLE attributes in the LB tables. So how to identify other resource types and attributes in LB? Or the current LB implementation just describes these types and attributes, I need to construct the rest resource types and attributes in the payload itself as the exact requirement? By the way, I built the LB with qemu emulation and just track qemu emulation LB's source codes. Thanks & Best regards, Xiong Yi

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[LinuxBIOS] PCI Bridge Parity Errors
by joe＠smittys.pointclark.net 25 Sep '07

25 Sep '07

Hello, Can someone direct me to some good sources where I can find out how to diagnos parity errors in Linux? I NEED to find out why my PCI Bridge has a unclearable parity error. Funny thing, when I Google lspci 82801DB all the PCI Bridges have the Detected Parity Error bit set?? Status: <PERR+ Does that make any sense?? Thanks - Joe

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[LinuxBIOS] [PATCH] style fixes
by Robert Millan 25 Sep '07

25 Sep '07

Style fixes for src/mainboard/asus/a8n_e/Config.lb as described by Uwe: 00:10 < uwe_> nyu: tabs as per guidelines, but for the lower part of Config.lb (the immensely indented/nested sections) I prefer 2 spaces to make it more readable -- Robert Millan <GPLv2> I know my rights; I want my phone call! <DRM> What use is a phone call, if you are unable to speak? (as seen on /.)

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coreboot September 2007