coreboot August 2007

coreboot@coreboot.org

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[LinuxBIOS] [PATCH] v3: printk: change %L to %ll
by Carl-Daniel Hailfinger 26 Aug '07

26 Aug '07

This patch changes all occurences of (working) %Lx to (standards conformant, working) %llx in printk/printf. While I'm at it, affected lines with 271 characters can be broken into smaller chunks. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Index: device/device.c =================================================================== --- device/device.c (Revision 476) +++ device/device.c (Arbeitskopie) @@ -402,7 +402,11 @@ min_align = 0; base = bridge->base; - printk(BIOS_SPEW, "%s compute_allocate_%s: base: %08Lx size: %08Lx align: %d gran: %d\n", dev_path(bus->dev), (bridge->flags & IORESOURCE_IO) ? "io" : (bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem", base, bridge->size, bridge->align, bridge->gran); + printk(BIOS_SPEW, + "%s compute_allocate_%s: base: %08llx size: %08llx align: %d gran: %d\n", + dev_path(bus->dev), + (bridge->flags & IORESOURCE_IO) ? "io" : (bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem", + base, bridge->size, bridge->align, bridge->gran); /* We want different minimum alignments for different kinds of * resources. These minimums are not device type specific but @@ -485,7 +489,7 @@ base += size; printk(BIOS_SPEW, - "%s %02lx * [0x%08Lx - 0x%08Lx] %s\n", + "%s %02lx * [0x%08llx - 0x%08llx] %s\n", dev_path(dev), resource->index, resource->base, @@ -503,7 +507,11 @@ */ bridge->size = align_up(base, bridge->gran) - bridge->base; - printk(BIOS_SPEW, "%s compute_allocate_%s: base: %08Lx size: %08Lx align: %d gran: %d done\n", dev_path(bus->dev), (bridge->flags & IORESOURCE_IO) ? "io" : (bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem", base, bridge->size, bridge->align, bridge->gran); + printk(BIOS_SPEW, + "%s compute_allocate_%s: base: %08llx size: %08llx align: %d gran: %d done\n", + dev_path(bus->dev), + (bridge->flags & IORESOURCE_IO) ? "io" : (bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem", + base, bridge->size, bridge->align, bridge->gran); } #if defined(CONFIG_PCI_OPTION_ROM_RUN) && CONFIG_PCI_OPTION_ROM_RUN == 1 Index: device/pnp_device.c =================================================================== --- device/pnp_device.c (Revision 476) +++ device/pnp_device.c (Arbeitskopie) @@ -87,7 +87,7 @@ { if (!(resource->flags & IORESOURCE_ASSIGNED)) { printk(BIOS_ERR, - "ERROR: %s %02lx %s size: 0x%010Lx not assigned\n", + "ERROR: %s %02lx %s size: 0x%010llx not assigned\n", dev_path(dev), resource->index, resource_type(resource), resource->size); return; Index: device/pci_device.c =================================================================== --- device/pci_device.c (Revision 476) +++ device/pci_device.c (Arbeitskopie) @@ -252,10 +252,10 @@ printk(BIOS_DEBUG, "%s %02x ->", dev_path(dev), resource->index); printk(BIOS_DEBUG, - " value: 0x%08Lx zeroes: 0x%08Lx ones: 0x%08Lx attr: %08lx\n", + " value: 0x%08llx zeroes: 0x%08llx ones: 0x%08llx attr: %08lx\n", value, zeroes, ones, attr); printk(BIOS_DEBUG, - "%s %02x -> size: 0x%08Lx max: 0x%08Lx %s\n ", + "%s %02x -> size: 0x%08llx max: 0x%08llx %s\n ", dev_path(dev), resource->index, resource->size, resource->limit, resource_type(resource)); } @@ -456,7 +456,7 @@ /* Make certain the resource has actually been set. */ if (!(resource->flags & IORESOURCE_ASSIGNED)) { printk(BIOS_ERR, - "ERROR: %s %02lx %s size: 0x%010Lx not assigned\n", + "ERROR: %s %02lx %s size: 0x%010llx not assigned\n", dev_path(dev), resource->index, resource_type(resource), resource->size); return; @@ -863,7 +863,7 @@ (*list)->path.type); continue; } - printk(BIOS_SPEW, "%s: check dev %s it has devfn 0x%x\n", + printk(BIOS_SPEW, "%s: check dev %s it has devfn 0x%02x\n", __func__, (*list)->dtsname, (*list)->path.u.pci.devfn); if ((*list)->path.u.pci.devfn == devfn) { /* Unlink from the list. */ Index: device/device_util.c =================================================================== --- device/device_util.c (Revision 476) +++ device/device_util.c (Arbeitskopie) @@ -229,7 +229,7 @@ memcpy(buffer, "Root Device", 12); break; case DEVICE_ID_PCI: - sprintf(buffer, "PCI: %02x:%02x", id->u.pci.vendor, + sprintf(buffer, "PCI: %04x:%04x", id->u.pci.vendor, id->u.pci.device); break; case DEVICE_ID_PNP: @@ -243,7 +243,7 @@ id->u.apic.device); break; case DEVICE_ID_PCI_DOMAIN: - sprintf(buffer, "PCI_DOMAIN: %02x:%02x", + sprintf(buffer, "PCI_DOMAIN: %04x:%04x", id->u.pci_domain.vendor, id->u.pci_domain.device); break; @@ -602,7 +602,7 @@ #endif } printk(BIOS_DEBUG, - "%s %02lx <- [0x%010Lx - 0x%010Lx] %s%s%s\n", + "%s %02lx <- [0x%010llx - 0x%010llx] %s%s%s\n", dev_path(dev), resource->index, base, end, buf, resource_type(resource), comment); @@ -656,7 +656,7 @@ for (i = 0; i < curdev->resources; i++) { struct resource *resource = &curdev->resource[i]; printk(BIOS_SPEW, - "%s: dev %s, resource %d, flags %lx base 0x%Lx size 0x%Lx\n", + "%s: dev %s, resource %d, flags %lx base 0x%llx size 0x%llx\n", __func__, curdev->dtsname, i, resource->flags, resource->base, resource->size); /* If it isn't the right kind of resource ignore it. */ Index: lib/elfboot.c =================================================================== --- lib/elfboot.c (Revision 476) +++ lib/elfboot.c (Arbeitskopie) @@ -61,7 +61,7 @@ } if (i == mem_entries) { printk(BIOS_ERR, "No matching RAM area found for range:\n"); - printk(BIOS_ERR, " [0x%016Lx, 0x%016Lx)\n", start, end); + printk(BIOS_ERR, " [0x%016llx, 0x%016llx)\n", start, end); printk(BIOS_ERR, "RAM areas\n"); for(i = 0; i < mem_entries; i++) { u64 mstart, mend; @@ -69,7 +69,7 @@ mtype = mem->map[i].type; mstart = unpack_lb64(mem->map[i].start); mend = mstart + unpack_lb64(mem->map[i].size); - printk(BIOS_ERR, " [0x%016Lx, 0x%016Lx) %s\n", + printk(BIOS_ERR, " [0x%016llx, 0x%016llx) %s\n", mstart, mend, (mtype == LB_MEM_RAM)?"RAM":"Reserved"); } Index: northbridge/intel/i440bxemulation/i440bx.c =================================================================== --- northbridge/intel/i440bxemulation/i440bx.c (Revision 476) +++ northbridge/intel/i440bxemulation/i440bx.c (Arbeitskopie) @@ -79,7 +79,7 @@ resource->size = ((resource_t) sizek) << 10; resource->flags = IORESOURCE_MEM | IORESOURCE_CACHEABLE | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; - printk(BIOS_DEBUG, "%s: add ram resoource %Ld bytes\n", __func__, + printk(BIOS_DEBUG, "%s: add ram resource %lld bytes\n", __func__, resource->size); } Index: arch/x86/linuxbios_table.c =================================================================== --- arch/x86/linuxbios_table.c (Revision 476) +++ arch/x86/linuxbios_table.c (Arbeitskopie) @@ -177,7 +177,7 @@ { int entries; - printk(BIOS_DEBUG, "%s: start 0x%Lx size 0x%Lx\n", + printk(BIOS_DEBUG, "%s: start 0x%llx size 0x%llx\n", __func__, start, size); entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]);

2 1

[LinuxBIOS] r479 - in LinuxBIOSv3: arch/x86 device lib northbridge/intel/i440bxemulation
by svn＠openbios.org 26 Aug '07

26 Aug '07

Author: uwe Date: 2007-08-26 14:06:51 +0200 (Sun, 26 Aug 2007) New Revision: 479 Modified: LinuxBIOSv3/arch/x86/linuxbios_table.c LinuxBIOSv3/device/device.c LinuxBIOSv3/device/device_util.c LinuxBIOSv3/device/pci_device.c LinuxBIOSv3/device/pnp_device.c LinuxBIOSv3/lib/elfboot.c LinuxBIOSv3/northbridge/intel/i440bxemulation/i440bx.c Log: This patch changes all occurences of (working) %Lx to (standards conformant, working) %llx in printk/printf. While I'm at it, affected lines with 271 characters can be broken into smaller chunks. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Modified: LinuxBIOSv3/arch/x86/linuxbios_table.c =================================================================== --- LinuxBIOSv3/arch/x86/linuxbios_table.c 2007-08-20 18:21:52 UTC (rev 478) +++ LinuxBIOSv3/arch/x86/linuxbios_table.c 2007-08-26 12:06:51 UTC (rev 479) @@ -177,7 +177,7 @@ { int entries; - printk(BIOS_DEBUG, "%s: start 0x%Lx size 0x%Lx\n", + printk(BIOS_DEBUG, "%s: start 0x%llx size 0x%llx\n", __func__, start, size); entries = (mem->size - sizeof(*mem))/sizeof(mem->map[0]); Modified: LinuxBIOSv3/device/device.c =================================================================== --- LinuxBIOSv3/device/device.c 2007-08-20 18:21:52 UTC (rev 478) +++ LinuxBIOSv3/device/device.c 2007-08-26 12:06:51 UTC (rev 479) @@ -402,7 +402,11 @@ min_align = 0; base = bridge->base; - printk(BIOS_SPEW, "%s compute_allocate_%s: base: %08Lx size: %08Lx align: %d gran: %d\n", dev_path(bus->dev), (bridge->flags & IORESOURCE_IO) ? "io" : (bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem", base, bridge->size, bridge->align, bridge->gran); + printk(BIOS_SPEW, + "%s compute_allocate_%s: base: %08llx size: %08llx align: %d gran: %d\n", + dev_path(bus->dev), + (bridge->flags & IORESOURCE_IO) ? "io" : (bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem", + base, bridge->size, bridge->align, bridge->gran); /* We want different minimum alignments for different kinds of * resources. These minimums are not device type specific but @@ -485,7 +489,7 @@ base += size; printk(BIOS_SPEW, - "%s %02lx * [0x%08Lx - 0x%08Lx] %s\n", + "%s %02lx * [0x%08llx - 0x%08llx] %s\n", dev_path(dev), resource->index, resource->base, @@ -503,7 +507,11 @@ */ bridge->size = align_up(base, bridge->gran) - bridge->base; - printk(BIOS_SPEW, "%s compute_allocate_%s: base: %08Lx size: %08Lx align: %d gran: %d done\n", dev_path(bus->dev), (bridge->flags & IORESOURCE_IO) ? "io" : (bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem", base, bridge->size, bridge->align, bridge->gran); + printk(BIOS_SPEW, + "%s compute_allocate_%s: base: %08llx size: %08llx align: %d gran: %d done\n", + dev_path(bus->dev), + (bridge->flags & IORESOURCE_IO) ? "io" : (bridge->flags & IORESOURCE_PREFETCH) ? "prefmem" : "mem", + base, bridge->size, bridge->align, bridge->gran); } #if defined(CONFIG_PCI_OPTION_ROM_RUN) && CONFIG_PCI_OPTION_ROM_RUN == 1 Modified: LinuxBIOSv3/device/device_util.c =================================================================== --- LinuxBIOSv3/device/device_util.c 2007-08-20 18:21:52 UTC (rev 478) +++ LinuxBIOSv3/device/device_util.c 2007-08-26 12:06:51 UTC (rev 479) @@ -229,7 +229,7 @@ memcpy(buffer, "Root Device", 12); break; case DEVICE_ID_PCI: - sprintf(buffer, "PCI: %02x:%02x", id->u.pci.vendor, + sprintf(buffer, "PCI: %04x:%04x", id->u.pci.vendor, id->u.pci.device); break; case DEVICE_ID_PNP: @@ -243,7 +243,7 @@ id->u.apic.device); break; case DEVICE_ID_PCI_DOMAIN: - sprintf(buffer, "PCI_DOMAIN: %02x:%02x", + sprintf(buffer, "PCI_DOMAIN: %04x:%04x", id->u.pci_domain.vendor, id->u.pci_domain.device); break; @@ -602,7 +602,7 @@ #endif } printk(BIOS_DEBUG, - "%s %02lx <- [0x%010Lx - 0x%010Lx] %s%s%s\n", + "%s %02lx <- [0x%010llx - 0x%010llx] %s%s%s\n", dev_path(dev), resource->index, base, end, buf, resource_type(resource), comment); @@ -656,7 +656,7 @@ for (i = 0; i < curdev->resources; i++) { struct resource *resource = &curdev->resource[i]; printk(BIOS_SPEW, - "%s: dev %s, resource %d, flags %lx base 0x%Lx size 0x%Lx\n", + "%s: dev %s, resource %d, flags %lx base 0x%llx size 0x%llx\n", __func__, curdev->dtsname, i, resource->flags, resource->base, resource->size); /* If it isn't the right kind of resource ignore it. */ Modified: LinuxBIOSv3/device/pci_device.c =================================================================== --- LinuxBIOSv3/device/pci_device.c 2007-08-20 18:21:52 UTC (rev 478) +++ LinuxBIOSv3/device/pci_device.c 2007-08-26 12:06:51 UTC (rev 479) @@ -252,10 +252,10 @@ printk(BIOS_DEBUG, "%s %02x ->", dev_path(dev), resource->index); printk(BIOS_DEBUG, - " value: 0x%08Lx zeroes: 0x%08Lx ones: 0x%08Lx attr: %08lx\n", + " value: 0x%08llx zeroes: 0x%08llx ones: 0x%08llx attr: %08lx\n", value, zeroes, ones, attr); printk(BIOS_DEBUG, - "%s %02x -> size: 0x%08Lx max: 0x%08Lx %s\n ", + "%s %02x -> size: 0x%08llx max: 0x%08llx %s\n ", dev_path(dev), resource->index, resource->size, resource->limit, resource_type(resource)); } @@ -456,7 +456,7 @@ /* Make certain the resource has actually been set. */ if (!(resource->flags & IORESOURCE_ASSIGNED)) { printk(BIOS_ERR, - "ERROR: %s %02lx %s size: 0x%010Lx not assigned\n", + "ERROR: %s %02lx %s size: 0x%010llx not assigned\n", dev_path(dev), resource->index, resource_type(resource), resource->size); return; @@ -863,7 +863,7 @@ (*list)->path.type); continue; } - printk(BIOS_SPEW, "%s: check dev %s it has devfn 0x%x\n", + printk(BIOS_SPEW, "%s: check dev %s it has devfn 0x%02x\n", __func__, (*list)->dtsname, (*list)->path.u.pci.devfn); if ((*list)->path.u.pci.devfn == devfn) { /* Unlink from the list. */ Modified: LinuxBIOSv3/device/pnp_device.c =================================================================== --- LinuxBIOSv3/device/pnp_device.c 2007-08-20 18:21:52 UTC (rev 478) +++ LinuxBIOSv3/device/pnp_device.c 2007-08-26 12:06:51 UTC (rev 479) @@ -87,7 +87,7 @@ { if (!(resource->flags & IORESOURCE_ASSIGNED)) { printk(BIOS_ERR, - "ERROR: %s %02lx %s size: 0x%010Lx not assigned\n", + "ERROR: %s %02lx %s size: 0x%010llx not assigned\n", dev_path(dev), resource->index, resource_type(resource), resource->size); return; Modified: LinuxBIOSv3/lib/elfboot.c =================================================================== --- LinuxBIOSv3/lib/elfboot.c 2007-08-20 18:21:52 UTC (rev 478) +++ LinuxBIOSv3/lib/elfboot.c 2007-08-26 12:06:51 UTC (rev 479) @@ -61,7 +61,7 @@ } if (i == mem_entries) { printk(BIOS_ERR, "No matching RAM area found for range:\n"); - printk(BIOS_ERR, " [0x%016Lx, 0x%016Lx)\n", start, end); + printk(BIOS_ERR, " [0x%016llx, 0x%016llx)\n", start, end); printk(BIOS_ERR, "RAM areas\n"); for(i = 0; i < mem_entries; i++) { u64 mstart, mend; @@ -69,7 +69,7 @@ mtype = mem->map[i].type; mstart = unpack_lb64(mem->map[i].start); mend = mstart + unpack_lb64(mem->map[i].size); - printk(BIOS_ERR, " [0x%016Lx, 0x%016Lx) %s\n", + printk(BIOS_ERR, " [0x%016llx, 0x%016llx) %s\n", mstart, mend, (mtype == LB_MEM_RAM)?"RAM":"Reserved"); } Modified: LinuxBIOSv3/northbridge/intel/i440bxemulation/i440bx.c =================================================================== --- LinuxBIOSv3/northbridge/intel/i440bxemulation/i440bx.c 2007-08-20 18:21:52 UTC (rev 478) +++ LinuxBIOSv3/northbridge/intel/i440bxemulation/i440bx.c 2007-08-26 12:06:51 UTC (rev 479) @@ -79,7 +79,7 @@ resource->size = ((resource_t) sizek) << 10; resource->flags = IORESOURCE_MEM | IORESOURCE_CACHEABLE | IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED; - printk(BIOS_DEBUG, "%s: add ram resoource %Ld bytes\n", __func__, + printk(BIOS_DEBUG, "%s: add ram resource %lld bytes\n", __func__, resource->size); }

1 0

[LinuxBIOS] flashrom for BIOS upgrade on MSI motherboard
by Andre Majorel 26 Aug '07

26 Aug '07

I need to upgrade the Award BIOS on an MSI motherboard. Rather than following MSI's procedure (boot on Windows system floppy and run AWFL####.EXE), I'm thinking of booting on a Linux CD and using flashrom. Are there any particular pitfalls to doing that ? A dump of the current BIOS (flashrom -r bios.bin) reveals that the flash ROM contains some machine-dependent data in three areas (0h-5C0h, 1000h, 74E31h-74E3Fh). Am I supposed to use -s and -e to skirt around it ? Or do I just flash the whole 512 kB and re-do the BIOS config ? The motherboard is an MSI K8N Neo4 Platinum V1. The flash chip is a Pm49FL004T-33JC. Thanks. -- André Majorel <URL:http://www.teaser.fr/~amajorel/> Do not use this account for regular correspondence. See the URL above for contact information.

3 2

[LinuxBIOS] [PATCH] probe_superio: add ITE support (try2)
by Carl-Daniel Hailfinger 26 Aug '07

26 Aug '07

This adds probing for almost all recent (since 1999) ITE Super I/O chips to probe_superio. Not much of the configuration is dumped, however I did verify against all ITE datasheets (including those not available any more) that the probing was non-destructive. More information can be extracted easily, however this needs loads of datasheet surfing. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> --- LinuxBIOSv2/util/probe_superio/probe_superio.c (Revision 2744) +++ LinuxBIOSv2/util/probe_superio/probe_superio.c (Arbeitskopie) @@ -3,6 +3,7 @@ * * Copyright (C) 2006 Ronald Minnich <rminnich(a)gmail.com> * Copyright (C) 2006 coresystems GmbH <info(a)coresystems.de> + * Copyright (C) 2007 Carl-Daniel Hailfinger * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -32,11 +33,16 @@ * if we need this. */ -unsigned char regval(unsigned short port, unsigned short reg) { +unsigned char regval(unsigned short port, unsigned char reg) { outb(reg, port); return inb(port+1); } +void regwrite(unsigned short port, unsigned char reg, unsigned char val) { + outb(reg, port); + outb(val, port+1); +} + void dump_ns8374(unsigned short port) { printf("Enables: 21=%02x, 22=%02x, 23=%02x, 24=%02x, 26=%02x\n", @@ -46,15 +52,13 @@ /* check COM1. This is all we care about at present. */ printf("COM 1 is Globally %s\n", regval(port,0x26)&8 ? "disabled" : "enabled"); /* select com1 */ - outb(0x7, port); - outb(3, port+1); + regwrite(port, 0x07, 0x03); printf("COM 1 is locally %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("COM1 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n", regval(port, 0x60), regval(port, 0x61), regval(port, 0x70), regval(port, 0x71), regval(port, 0x74), regval(port, 0x75), regval(port, 0xf0)); /* select gpio */ - outb(0x7, port); - outb(7, port+1); + regwrite(port, 0x07, 0x07); printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("GPIO 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n", regval(port, 0x60), regval(port, 0x61), regval(port, 0x70), regval(port, 0x71), @@ -85,38 +89,33 @@ printf("2b=%02x\n", regval(port, 0x2b)); /* select UART 1 */ - outb(0x07, port); - outb(0x01, port+1); + regwrite(port, 0x07, 0x01); printf("UART1 is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("UART1 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60), regval(port, 0x61), regval(port, 0x70)&0x0f, regval(port, 0xf0)&0x10 ? "RS485":"RS232"); /* select UART 2 */ - outb(0x07, port); - outb(0x02, port+1); + regwrite(port, 0x07, 0x02); printf("UART2 is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("UART2 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60), regval(port, 0x61), regval(port, 0x70)&0x0f, regval(port, 0xf0)&0x10 ? "RS485":"RS232"); /* select Parport */ - outb(0x07, port); - outb(0x03, port+1); + regwrite(port, 0x07, 0x03); printf("PARPORT is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("PARPORT base=%02x%02x, irq=%02x\n", regval(port, 0x60), regval(port, 0x61), regval(port, 0x70)&0x0f); /* select hw monitor */ - outb(0x07, port); - outb(0x04, port+1); + regwrite(port, 0x07, 0x04); printf("HW monitor is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("HW monitor base=%02x%02x, irq=%02x\n", regval(port, 0x60), regval(port, 0x61), regval(port, 0x70)&0x0f); /* select gpio */ - outb(0x07, port); - outb(0x06, port+1); + regwrite(port, 0x07, 0x05); printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); printf("GPIO 70=%02x, e0=%02x, e1=%02x, e2=%02x, e3=%02x, e4=%02x, e5=%02x\n", regval(port, 0x70), regval(port, 0xe0), regval(port, 0xe1), regval(port, 0xe2), @@ -130,7 +129,30 @@ } +void +dump_ite(unsigned short port, unsigned short id) +{ + int i; + printf ("ITE chip\n"); + for (i=0x20; i<=0x24; i++) + printf("index %02x=%02x\n", i, regval(port, i)); + + switch(id) { + case 0x8702: + case 0x8705: + case 0x8710: + case 0x8712: + case 0x8716: + case 0x8718: + default: + break; + } + /* select UART 1 */ + regwrite(port, 0x07, 0x01); + printf("UART1 is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); +} + void probe_idregs_simple(unsigned short port){ unsigned char id; @@ -167,9 +189,10 @@ void probe_idregs_fintek(unsigned short port){ - unsigned int vid, did; + unsigned int vid, did, success = 0; // Enable configuration sequence (Fintek uses this for example) + // Older ITE chips have the same enable sequence outb(0x87, port); outb(0x87, port); @@ -185,13 +208,10 @@ } did = inb(port+1); - outb(0x21, port); - did = did|(inb(port+1)<<8); + did = did|(regval(port, 0x21)<<8); - outb(0x23, port); - vid = inb(port+1); - outb(0x24, port); - vid = vid|(inb(port+1)<<8); + vid = regval(port, 0x23); + vid = vid|(regval(port, 0x24)<<8); printf("SuperIO found at 0x%02x: vid=0x%04x/did=0x%04x\n", port, vid, did); @@ -199,23 +219,103 @@ return; // printf("%s\n", familyid[id]); + switch(did) { + case 0x1087: // reversed for ITE8710 + success = 1; + dump_ite(port, ((did & 0xff) << 8) | ((did & 0xff00) >> 8)); + // disable configuration + regwrite(port, 0x02, 0x02); + break; + default: + break; + } switch(vid) { case 0x3419: + success = 1; dump_fintek(port, did); break; default: - printf("no dump for 0x%04x/0x%04x\n", vid, did); break; } + if (!success) + printf("no dump for vid 0x%04x, did 0x%04x\n", vid, did); - // disable configuration + // disable configuration (for Fintek, doesn't hurt ITE) outb(0xaa, port); } void +probe_idregs_ite(unsigned short port){ + unsigned int id, chipver; + + // Enable configuration sequence (ITE uses this for newer IT87[012]x) + // IT871[01] uses 0x87, 0x87 -> fintek detection should handle it + // IT8761 uses 0x87, 0x61, 0x55, 0x55/0xaa + // IT86xx series uses different ports + // IT8661 uses 0x86, 0x61, 0x55/0xaa, 0x55/0xaa and 32 more writes + // IT8673 uses 0x86, 0x80, 0x55/0xaa, 0x55/0xaa and 32 more writes + outb(0x87, port); + outb(0x01, port); + outb(0x55, port); + if (port == 0x2e) + outb(0x55, port); + else + outb(0xAA, port); + + // Read Chip ID Byte 1 + id = regval(port, 0x20); + if (id != 0x87) { + if (inb(port) == 0xff ) + printf ("No SuperIO chip found at 0x%04x\n", port); + else + printf("probing 0x%04x, failed (0x%02x), data returns 0x%02x\n", + port, inb(port), inb(port+1)); + return; + } + + id <<= 8; + + // Read Chip ID Byte 2 + id |= regval(port, 0x21); + + // Read Chip Version, only bit 3..0 for all IT87xx + chipver = regval(port, 0x22) & 0x0f; + + /* ID Mapping Table + unknown -> IT8711 (no datasheet) + unknown -> IT8722 (no datasheet) + 0x8702 -> IT8702 + 0x8705 -> IT8700 or IT8705 + 0x8710 -> IT8710 + 0x8712 -> IT8712 + 0x8716 -> IT8716 or IT8726 (identical except CPU voltage control) + 0x8718 -> IT8718 + */ + printf("ITE? SuperIO found at 0x%02x: id=0x%04x, chipver=0x%01x\n", + port, id, chipver); + + switch(id) { + case 0x8702: + case 0x8705: + case 0x8710: //pointless, IT8710 has different enable sequence + case 0x8712: + case 0x8716: + case 0x8718: + dump_ite(port, id); + break; + default: + printf("no dump for id 0x%04x\n", id); + break; + } + // disable configuration + regwrite(port, 0x02, 0x02); +} + +void probe_superio(unsigned short port) { probe_idregs_simple(port); probe_idregs_fintek(port); + probe_idregs_ite(port); } int

5 6

[LinuxBIOS] [patch] flashrom: add support for Asus P5A
by Luc Verhaegen 26 Aug '07

26 Aug '07

Here's the chip_enable code for the ALI M1533 and the board_enable for the Asus P5A, an ALI M1541+M1533 socket 7 motherboard. It's quite nasty: It does an SMBUS read/write to a yet unidentified device, i think it is the superio, but i'm not sure. The Asus P5A also seriously messes up pci-ids, there is nothing dependable there, so people who want to use flashrom on this board should use -m asus:p5a but it works :) This is a board i own myself and this has been tested successfully. Luc Verhaegen.

7 17

[LinuxBIOS] yo, pre-bricking an A8N-E !
by Quux 24 Aug '07

24 Aug '07

wow, it only took me only 3 hrs to pre-brick the Asus A8N-E I got at ebay for €22. I would have been faster, but the ROM / IMAGE SIZE of the current revision ist stated as 7F00 instead of 20000hex as in the M57SLI target. Once I fixed that I could flash the current revision - and the POST card gives me a steady 80. I keep you guys informed but the ASUS A8N target is not even flashable currently (Also the wiki - downloadable ROM image is bad size (20000hex required)). I plan to put together a CDROM .ISO file (a remastered dream linux) with the LB tree and ready-to-flash working filo-ROM-image. should be a quickie. --Q

2 2

[LinuxBIOS] 440bx laptop(s)
by Jon Bradley 23 Aug '07

23 Aug '07

Hi, I have (5) 440bx laptops, that would be much more useful if they booted fast, but messing with the bios seems like a scary thing. I compile LFS (linuxfromscratch) on all of these and customize them with fvwm, very few programs, firefox, abiword, xcalc, some quick scripts to reset the wifi, then give them away, (or sell them :) Anyway, my question: Would it be a cut and dry operation to install LinuxBIOS on the 440bx laptops? One is a ibm 240, 300mhz celeron, the other four are Solis (basicly renamed dell) 266mhz p2's .. all 440bx. Jon.

2 1

[LinuxBIOS] Questions to flashing BIOS chips
by Thomas Buschhardt 23 Aug '07

23 Aug '07

Hallo, I'm new to BIOS-flashing and have some questions and hopefully you can help me out. I got a Galep5 programmer with a DIL32 to PLCC32 Adapter and samples of some flash-memory chips SST 49LF004B (33-4C-NHE). These samples are from Gneral Software Inc. and Insyde Software. I backup the original BIOS to files and delete the chip after that I wrote my linuxbios.rom to the chip(s) and put it to the motherboard (AMD LX DB800), but nothing happen. After that I wrote the original BIOS back to the chip (compare shown ok) and put these into the MB but nothing happen (again). The MB is ok (I tested with other samples). Now my question: Its possible these samples have some "protection" against use with other BIOS (linuxbios :-) ) or how can I find the error? Thanx for answers. Thomas

3 8

[LinuxBIOS] [PATCH] flashrom: Merge common code into a function
by Uwe Hermann 23 Aug '07

23 Aug '07

See patch. This is _not_ tested (other than that it compiles). Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

1 0

[LinuxBIOS] r2748 build service
by LinuxBIOS information 23 Aug '07

23 Aug '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2748 to the LinuxBIOS source repository and caused the following changes: Change Log: Cosmetic fixes (trivial). Signed-off-by: Uwe Hermann <uwe(a)hermann-uwe.de> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2748&device=hdama&vendor=… Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2748&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2748&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2748&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2748&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2748&device=dk8x&vendor=i… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

1 0

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coreboot August 2007