coreboot March 2007

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118 participants
226 discussions

[LinuxBIOS] Add initial support for intel i855gme northbridge
by Jon Dufresne 20 Jan '09

20 Jan '09

Add initial support for i855gme. This is a work in progress and I don't expect it to work on all boards, or even any besides mine. This is based heavily on i855pm. Signed off by Jon Dufresne <jon.dufresne(a)gmail.com>

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[LinuxBIOS] my zepto.se laptop info
by Peter Brännvall 13 Oct '07

13 Oct '07

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Re: [LinuxBIOS] BIOS Saver RD1
by Ken Fuchs 05 Jun '07

05 Jun '07

> On Wed, Aug 03, 2005 at 11:59:20AM +0900, Jun OKAJIMA wrote: > > Probably, most guys here use BIOS Saver. > > And it works well? > > In mine, RD1 for PLCC gets not being writable suddenly. > > I mean, it seems writable but # flash_rom -v fails. > > I solved this problem by a quick hack. > > > > How about yours? You can write RD1 or W49F002U well? > > Any problem happen? Johnathan McDowell wrote: > Even after that it's sometimes a bit flakey and I have to erase, then > write it. I've put the board's original BIOS in the RD1 and am writing > to the SST 39SF020A instead, which works without problems. I've read posts about the RD1 that suggest its integrated flash device is low quality and it may take 10 or more flash attempts to get a good flash update to the RD1 flash device. As a result, many RD1 BIOS Savior users will flash the commercial BIOS image (or other known good BIOS image) into the RD1 integrated flash device as many times as needed to get an image that boots. Then use the original BIOS device to flash test BIOS image (usually LinuxBIOS images among this group), since the original BIOS device usually flashes OK on the first attempt. I've used the RD1 in the above fashion with great success on the Tyan S2885 mainboard. The same RD1 would not work on the nVidia CK8-04 CRB mainboard. I think the CK8-04 CRB requires a flash device that the RD1 does not support. However, the RD1 worked well as an "do nothing" adapter which allowed swapping the BIOS flash device between my flash burner and the mainboard without any wear to the mainboard's BIOS socket. BTW, my flash burner is an older Enhanced Willem Universal Programmer. I got mine for only $60 US over a year ago. I've seen it for less than $40 on eBay a few weeks ago. The newest model is going for about $50 US. It does a LinuxBIOS flash in about 5 minutes; not bad for a $60 burner. However, it does require changing DIP switches to match an image for each device it can program. Great for the amateur or professional with a small budget. > > BTW, a cable of your RD1 is not broken? > > I needed soldering to fix it. > Mine was fine out of the box. Mine cable and switch worked fine out of the box as well. Sincerely, Ken Fuchs <kfuchs(a)winternet.com> ami-mac-sun

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[LinuxBIOS] ASUS A8N-SLI Premium (K8, CK804, IT8712)
by David M Barr 26 May '07

26 May '07

Hi, Attached are dmidecode and lspci -t/n/v output for my system, which has the same MB as Adrian's. Since he has the tools, can anyone provide tips on how to get started? Regards, David M. Barr On 19/03/2007 12:06:43 am, Adrian-Ken Rueegsegger wrote: Hi David, Thanks for the info! I did find out that all chipsets are supported. I bought myself a Bios saviour and I have all the other hardware one needs. I just had little time playing around with it the last two weeks but I want to start looking into it again, that's why I wanted to ask if you had made some progress. I am not quite sure where to start but I found a motherboard [1] that is quite "similar" to ours: Sun Ultra40. It has the same North- and Southbridge; SuperIO is different though. Would you know where to go from here? Cheers, Adrian

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[LinuxBIOS] #40: Decide on common header #ifndef names or standards for usage
by LinuxBIOS 21 May '07

21 May '07

#40: Decide on common header #ifndef names or standards for usage -----------------------------+---------------------------------------------- Reporter: uwe | Owner: uwe Type: enhancement | Status: new Priority: minor | Milestone: Cosmetic fixes Component: code | Version: v2 Keywords: | Due_close: MM/DD/YYYY Include_gantt: 0 | Dependencies: Due_assign: MM/DD/YYYY | Patchstatus: there is no patch -----------------------------+---------------------------------------------- We have lots of variations for "include guards" in the code: {{{ _FOO _FOO_H __FOO_H __FOO_H__ _FOO_H_ __FOO_DEFINED ... }}} Is there a special convention or agreement on when to use which? If yes, it should be documented. If no, we should standardize on one format and use it consistently. -- Ticket URL: <http://tracker.linuxbios.org/trac/LinuxBIOS/ticket/40> LinuxBIOS <http://www.linuxbios.org/>

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[LinuxBIOS] LinuxBios on a braille display ?
by Sébastien Hinderer 14 May '07

14 May '07

Dear all, I am wondering if it would be possible to run LinuxBios on a braille device. Regarded from a Linux point of view, such a device is very similar to a PC or a laptop, as you will certainly notice according to the datas provided below. If the device is supported, the idea would be to install a screen-reader (like brltty) in the BIOS, which would help when there is a problem while booting the operating system's kernel. So below are the outputs of lspci -n, lspci -v and lspci -t run on the terminal. Could someone please tell me whether there is a possibility or not to install LinuxBios on such a machine ? Thanks a lot in advance for your help, Sébastien. # lspci -n 00:00.0 0600: 1078:0001 00:02.0 0200: 1282:9102 (rev 40) 00:12.0 0601: 1078:0100 (rev 30) 00:12.1 0680: 1078:0101 00:12.2 0101: 1078:0102 00:12.3 0401: 1078:0103 00:12.4 0300: 1078:0104 00:13.0 0c03: 0e11:a0f8 (rev 06) # lspci -v 00:00.0 Host bridge: Cyrix Corporation PCI Master Flags: bus master, medium devsel, latency 0 00:02.0 Ethernet controller: Davicom Semiconductor, Inc. 21x4x DEC-Tulip compatible 10/100 Ethernet (rev 40) Subsystem: Davicom Semiconductor, Inc. Unknown device 8212 Flags: bus master, medium devsel, latency 165, IRQ 11 I/O ports at 1000 [size=256] Memory at fedfe000 (32-bit, non-prefetchable) [size=256] [virtual] Expansion ROM at 10000000 [disabled] [size=256K] Capabilities: [50] Power Management version 2 00:12.0 ISA bridge: Cyrix Corporation 5530 Legacy [Kahlua] (rev 30) Flags: bus master, medium devsel, latency 64 00:12.1 Bridge: Cyrix Corporation 5530 SMI [Kahlua] Flags: medium devsel Memory at 40012000 (32-bit, non-prefetchable) [size=256] 00:12.2 IDE interface: Cyrix Corporation 5530 IDE [Kahlua] (prog-if 80 [Master]) Flags: bus master, medium devsel, latency 0 I/O ports at 1400 [size=16] 00:12.3 Multimedia audio controller: Cyrix Corporation 5530 Audio [Kahlua] Flags: bus master, medium devsel, latency 0 Memory at 40011000 (32-bit, non-prefetchable) [size=128] 00:12.4 VGA compatible controller: Cyrix Corporation 5530 Video [Kahlua] (prog-if 00 [VGA]) Subsystem: Cyrix Corporation Unknown device 0001 Flags: medium devsel Memory at 40800000 (32-bit, non-prefetchable) [size=8M] 00:13.0 USB Controller: Compaq Computer Corporation ZFMicro Chipset USB (rev 06) (prog-if 10 [OHCI]) Subsystem: Compaq Computer Corporation ZFMicro Chipset USB Flags: bus master, medium devsel, latency 64, IRQ 9 Memory at 000e0000 (32-bit, non-prefetchable) [size=4K] # lspci -t -[0000:00]-+-00.0 +-02.0 +-12.0 +-12.1 +-12.2 +-12.3 +-12.4 \-13.0

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[LinuxBIOS] 16p h8qm8 s4985 1207f
by Zeb Whitman 10 May '07

10 May '07

afaik supermicro h8qm8-2 ( http://www.supermicro.com/Aplus/motherboard/Opteron8000/MCP55/H8QM8-2.cfm ) and tyan s4985 ( http://www.tyan.com/product_board_detail.aspx?pid=271 ) are only quad socket 1207/ f boards on market discounting sunfire x4600-m2 query is two fold 1 what is future of quad core barcelona support on 1207 / f 2 what are odds of these boards supported i do not yet own either board but linuxbios support would sway me zw ps http://www.llnl.gov/computing/hpc/resources/OCF_resources.html#zeus http://www.appro.com/product/server_1Uxserver_opteron.asp

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Re: [LinuxBIOS] r2550 - trunk/LinuxBIOSv2/util/flashrom
by Carl-Daniel Hailfinger 27 Apr '07

27 Apr '07

Hi! svn(a)openbios.org wrote: > Signed-off-by: Adam Kaufman <adam.kaufman(a)pinnacle.com> > Signed-off-by: Stefan Reinauer <stepan(a)coresystems.de> > Acked-by: Stefan Reinauer <stepan(a)coresystems.de> > Acked-by: Adam Kaufman <adam.kaufman(a)pinnacle.com> It seems there is still some confusion about Signed-off-by and Acked-by. The meaning of Acked-by is a real subset of Signed-off-by. So acking a patch you already signed off for is totally meaningless and should be avoided. The Linux kernel guys never ack and sign off the same patch. Regards, Carl-Daniel -- http://www.hailfinger.org/

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Re: [LinuxBIOS] filo ide speedup patch?
by Peter Stuge 14 Apr '07

14 Apr '07

On Thu, Mar 15, 2007 at 07:37:07PM +0100, Stefan Reinauer wrote: > * Peter Stuge <peter(a)stuge.se> [070309 05:20]: > > Hey, > > > > On Tue, Mar 06, 2007 at 03:19:08PM -0500, Ward Vandewege wrote: > > > Stefan said you wrote a patch at the last symposium to make filo > > > read several blocks at once from an ide device, and that that sped > > > reading from IDE up by about 70%. > > > > > > Do you happen to have that code lying around somewhere? I'd like > > > to see it integrated in FILO. > > > > Hmm. > > > > I'm not sure that it ever happened. > > > > I don't remember writing it.. And it's not in my filo source dir.. > > > > I remember us talking about it, but don't remember any code... > > Ah, sorry, I thought you made something on the Symposium last year. > I do remember you looked at the problem though. What was your > suggestion? Reading multiple blocks at once or something? It was someone else's suggestion (Ron maybe?) but I'm afraid I don't remember looking into it. Looking at the FILO code now it's not very familiar, but my memory may also have been drowned in malt beverage. :) ide_read_sector_* only reads one sector at a time and could instead read up to 256. fs/blockdev.c:devread() always memcpy():s every sector as well . Lots of room for improvement here. :) > > I do have two patches for the EPIA LB code though, one for > > HARD_RESET and one for using rdtsc to calibrate the timer. > > > > I should get them into the tree. Will try to do that next week. > > please! whenever you find the time. > > Lots of people still use FILO. (Even though I try to talk it down > while trying to find someone to look into the Grub2 port) Find attached a patch for timer2 and hard reset. I'm looking at FILO right now. //Peter

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[LinuxBIOS] New with a GA-M57SLI-S4
by Beth 07 Apr '07

07 Apr '07

Hi all !! This is my first post to the mailing list and my first question too :). First of all I want to say that I am pleased to talk to everyone around here. Well, the problem is called M57SLI-S4 and its socketed bios. A problem, not a problem, who knows. I am thinking on flashing the bios without desoldering it, one mistake and ... bye bye. Maybe I will have access to a desoldering station, but I have no experience with plcc chips, and maybe the person who works with it would have the same as I. Has anyone found anything about the "second" plcc socket? One friend of mine had a very "no no no, it don't likes me" idea, he says that one way of removing the plcc bios could be cutting the chip pins, but despite the "very intrusive" way, I will lose the chip, its information, I must to buy at least another chip (I am looking for it), and worst, I must to reprogram it (If I damage the current bios for putting a socket, the system will get bricked without bios, and I will not have the swap option ...). Despite this, I wish to know one thing, it is common to get the board bricked?, I say that because if someone can help me verifying the steps, parameters, and so on, I think that I will try the "Russian Roulette" with this board. In this case what information I must give to you (some charitable soul ;) ) Well thats all, thanks, and best regards from Spain.

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coreboot March 2007