coreboot October 2007

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[LinuxBIOS] r2885 build service
by LinuxBIOS information 23 Oct '07

23 Oct '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "ward" checked in revision 2885 to the LinuxBIOS source repository and caused the following changes: Change Log: Add support for a precompressed LZMA payload (trivial). Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Ward Vandewege <ward(a)gnu.org> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2885&device=hdama&vendor=… Configuration of bcom:winnet100 is still broken Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2885&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2885&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2885&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2885&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2885&device=dk8x&vendor=i… Compilation of newisys:khepri is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2885&device=khepri&vendor… If something broke during this checkin please be a pain in ward's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] r2884 build service
by LinuxBIOS information 22 Oct '07

22 Oct '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "hailfinger" checked in revision 2884 to the LinuxBIOS source repository and caused the following changes: Change Log: Flashrom: Add more Vendor IDs and ensure correct sorting in flash.h. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2884&device=hdama&vendor=… Configuration of bcom:winnet100 is still broken Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2884&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2884&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2884&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2884&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2884&device=dk8x&vendor=i… Compilation of newisys:khepri is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2884&device=khepri&vendor… If something broke during this checkin please be a pain in hailfinger's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

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[LinuxBIOS] M57SLI Rev2.0 SPI - how to add the second bios chip (incl. pictures)
by Harald Gutmann 22 Oct '07

22 Oct '07

hello! i'm new to the list and my first post will tell something about adding the second bios chip to that board. first of all some informations on my mainboard, because i haven't read this informations on the mailinglist until now. i always read about SST25LF040A and MX25L4005A chips which are used for bios on that mainboard. my mainboard which is also revision 2.0 has a different bios chip, which a device from winbond called 25X40VSIG. here's the link to the datasheet of this chip: www.winbond-usa.com/products/Nexflash/pdfs/datasheets/W25X10_20_40_80g.pdf this is just a statement, that there are also boards with that bios-chips out there. linuxbios will not be tested by me on the 25X40VSIG chip, because i want to remain that chip in it's original state. i've got two MX25L4005A chips, and i *want* to test linuxbios on my mainboard. so yesterday i bought some soldering equipment, and the things i need to do the job. Peter Stuge has posted an introduction to add another chip to the second "bios-port" on the mainboard (http://linuxbios.org/pipermail/linuxbios/2007-September/024395.html; http://stuge.se/lb/m57sli/). after studing the datasheet's of the chips, i was certain that it'll be correct what he told just a few weeks before. what you'll need to get the stuff working: * 2 resistors, i took 100k ohm with 0.25Watt * a SPDT switch * an serial eeprom in an soic case with about 200mil. * equipment to solder * some time to do the job first i wanted to boot the machine with the "hardware hack" on it, the fans started to move, but i got no response from my monitor. but, after changing the position of the switch, it just worked like usual! (on that point i knew, that i've soldered everything correct. because when the empty chip is activated, there is no data sent from the bios chip to the superio.) after booting the machine, i made a svn co of the linuxbios flashrom util, compiled it and had a look if it will work. so, here are my output results from the flashrom util: original bios chip: %<--------------------------------------------------------- benchvice flashrom # ./flashrom --mainboard gigabyte:m57sli Calibrating delay loop... ok No LinuxBIOS table found. Found chipset "NVIDIA MCP55": Enabling flash write... OK. Found board "GIGABYTE GA-M57SLI": Enabling flash write... Serial flash segment 0xfffe0000-0xffffffff enabled Serial flash segment 0x000e0000-0x000fffff enabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff enabled LPC write to serial flash enabled serial flash pin 29 OK. RDID returned ef 30 13 No EEPROM/flash device found. benchvice flashrom # %<-------------------------------------------------------- after changing the position of the spdt switch: %<-------------------------------------------------------- benchvice flashrom # ./flashrom --mainboard gigabyte:m57sli Calibrating delay loop... ok No LinuxBIOS table found. Found chipset "NVIDIA MCP55": Enabling flash write... OK. Found board "GIGABYTE GA-M57SLI": Enabling flash write... Serial flash segment 0 xfffe0000-0xffffffff enabled Serial flash segment 0x000e0000-0x000fffff enabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff enabled LPC write to serial flash enabled serial flash pin 29 OK. RDID returned c2 20 13 MX25L4005 found at physical address: 0xfff80000 Flash part is MX25L4005 (512 KB) No operations were specified. benchvice flashrom # %<---------------------------------------------------------------- after all that information i made for sure some pictures, and following the topic here they are: http://illmeyer.com/hg87/LICENSE http://illmeyer.com/hg87/dscf1597.jpg http://illmeyer.com/hg87/dscf1608.jpg http://illmeyer.com/hg87/dscf1617.jpg http://illmeyer.com/hg87/dscf1621.jpg http://illmeyer.com/hg87/dscf1624.jpg http://illmeyer.com/hg87/dscf1628.jpg http://illmeyer.com/hg87/dscf1629.jpg http://illmeyer.com/hg87/dscf1630.jpg http://illmeyer.com/hg87/dscf1631.jpg at the and i want to thank j0hn for the chip. regards, harald gutmann

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[LinuxBIOS] [PATCH] Add K8T890CE support
by Rudolf Marek 22 Oct '07

22 Oct '07

-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 Hello again, I fixed what Uwe suggested. Many thanks. Here comes updated version. The ROM strap code moved to northbridge, where it belongs. Question is where to put the vt8237r_bridge.c file. Correy suggest that it belongs to NB, perhaps this device is some kind of CPU-PCI bridge... I dont know... This patch adds support for K8T890CE northbridge. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Rudolf -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.6 (GNU/Linux) Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org iD8DBQFHER8T3J9wPJqZRNURAsnWAJ9pK4HXfQcuMXTvxq/TwKsiMJAYBACgiUEa RTo+uJJ+YKSHea/LG1VAUjg= =U38i -----END PGP SIGNATURE-----

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[LinuxBIOS] [flashrom] patch: more verbose output in case of known vendor but unknown chip-id
by Peter Lemenkov 22 Oct '07

22 Oct '07

Hello All! This patch just adds a small banner with message to user. I think its a good idea to ask user to send us a message about situation with known vendor id but unknown chip id. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- -- With best regards!

2 2

[LinuxBIOS] r2886 - trunk/LinuxBIOSv2/src/mainboard/tyan/s2882
by svn＠openbios.org 22 Oct '07

22 Oct '07

Author: ward Date: 2007-10-22 22:56:13 +0200 (Mon, 22 Oct 2007) New Revision: 2886 Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/irq_tables.c Log: Fix typo (trivial) Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Ward Vandewege <ward(a)gnu.org> Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/irq_tables.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/irq_tables.c 2007-10-22 20:55:29 UTC (rev 2885) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/irq_tables.c 2007-10-22 20:56:13 UTC (rev 2886) @@ -245,7 +245,7 @@ write_pirq_info(pirq_info, bus_8111_1,(4<<3)|0, 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0x5, 0); pirq_info++; slot_num++; - printk_debug("setting Onboard SI Serail ATA\n"); + printk_debug("setting Onboard SI Serial ATA\n"); static const unsigned char slotIrqs_8111_1_5[4] = { 10, 0, 0, 0 }; pci_assign_irqs(bus_8111_1, 5, slotIrqs_8111_1_5); write_pirq_info(pirq_info, bus_8111_1,(5<<3)|0, 0x4, 0xdef8, 0, 0, 0, 0, 0, 0, 0, 0);

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[LinuxBIOS] r2885 - trunk/LinuxBIOSv2/src/mainboard/tyan/s2882
by svn＠openbios.org 22 Oct '07

22 Oct '07

Author: ward Date: 2007-10-22 22:55:29 +0200 (Mon, 22 Oct 2007) New Revision: 2885 Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/Options.lb Log: Add support for a precompressed LZMA payload (trivial). Signed-off-by: Ward Vandewege <ward(a)gnu.org> Acked-by: Ward Vandewege <ward(a)gnu.org> Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/Options.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/Options.lb 2007-10-22 20:36:16 UTC (rev 2884) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/Options.lb 2007-10-22 20:55:29 UTC (rev 2885) @@ -19,6 +19,7 @@ uses CONFIG_ROM_PAYLOAD uses CONFIG_ROM_PAYLOAD_START uses CONFIG_COMPRESSED_PAYLOAD_LZMA +uses CONFIG_PRECOMPRESSED_PAYLOAD uses PAYLOAD_SIZE uses _ROMBASE uses XIP_ROM_SIZE

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[LinuxBIOS] r2883 build service
by LinuxBIOS information 22 Oct '07

22 Oct '07

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "uwe" checked in revision 2883 to the LinuxBIOS source repository and caused the following changes: Change Log: This patch adds support for K8T890CE northbridge. Signed-off-by: Rudolf Marek <r.marek(a)assembler.cz> Acked-by: Uwe Hermann <uwe(a)hermann-uwe.de> Build Log: Compilation of arima:hdama is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2883&device=hdama&vendor=… Configuration of bcom:winnet100 is still broken Compilation of ibm:e325 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2883&device=e325&vendor=i… Compilation of ibm:e326 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2883&device=e326&vendor=i… Compilation of iei:juki-511p is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2883&device=juki-511p&ven… Compilation of iwill:dk8s2 is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2883&device=dk8s2&vendor=… Compilation of iwill:dk8x is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2883&device=dk8x&vendor=i… Compilation of newisys:khepri is still broken See the error log at http://qa.linuxbios.org/log_buildbrd.php?revision=2883&device=khepri&vendor… If something broke during this checkin please be a pain in uwe's neck until the issue is fixed. If this issue is not fixed within 24h the revision should be backed out. Best regards, LinuxBIOS automatic build system

1 0

[LinuxBIOS] [flashrom] patch: more flashchip vendors (2nd try)
by Peter Lemenkov 22 Oct '07

22 Oct '07

Hello All! This patch just adds more Vendor IDs and slightly changes their order in flash.h. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- -- With best regards!

2 1

[LinuxBIOS] r2884 - trunk/util/flashrom
by svn＠openbios.org 22 Oct '07

22 Oct '07

Author: hailfinger Date: 2007-10-22 22:36:16 +0200 (Mon, 22 Oct 2007) New Revision: 2884 Modified: trunk/util/flashrom/flash.h Log: Flashrom: Add more Vendor IDs and ensure correct sorting in flash.h. Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006(a)gmx.net> Modified: trunk/util/flashrom/flash.h =================================================================== --- trunk/util/flashrom/flash.h 2007-10-22 19:59:57 UTC (rev 2883) +++ trunk/util/flashrom/flash.h 2007-10-22 20:36:16 UTC (rev 2884) @@ -59,10 +59,14 @@ * All SPI parts have 16-bit device IDs. */ +#define ALLIANCE_ID 0x52 /* Alliance */ + #define AMD_ID 0x01 /* AMD */ #define AM_29F040B 0xA4 #define AM_29F016D 0xAD +#define AMIC_ID 0x37 /* AMIC */ + #define ASD_ID 0x25 /* ASD */ #define ASD_AE49F2008 0x52 @@ -70,7 +74,12 @@ #define AT_29C040A 0xA4 #define AT_29C020 0xDA -#define EON_ID 0x1C +#define CATALYST_ID 0x31 /* Catalyst */ + +#define EMST_ID 0x8C /* EMST / EFST */ +#define EMST_F49B002UA 0x00 + +#define EON_ID 0x1C /* EON */ /* EN25 chips are SPI, first byte of device id is memory type, * second byte of device id is log(bitsize)-9. */ #define EN_25B05 0x2010 /* 2^19 kbit or 2^16 kByte */ @@ -81,6 +90,21 @@ #define EN_25B16 0x2015 #define EN_25B32 0x2016 +#define FUJITSU_ID 0x04 /* Fujitsu */ + +#define HYUNDAI_ID 0xAD /* Hyundai */ + +#define IMT_ID 0x7F /* IMT */ + +#define INTEL_ID 0x89 /* Intel */ + +#define ISSI_ID 0xD5 /* ISSI */ + +#define MSYSTEMS_ID 0x156F /* M-Systems */ +#define MSYSTEMS_MD2200 0xDB /* ? */ +#define MSYSTEMS_MD2800 0x30 /* hmm -- both 0x30 */ +#define MSYSTEMS_MD2802 0x30 /* hmm -- both 0x30 */ + #define MX_ID 0xC2 /* Macronix (MX) */ /* MX25 chips are SPI, first byte of device id is memory type, * second byte of device id is log(bitsize)-9. */ @@ -96,6 +120,10 @@ #define MX_25L3235D 0x2416 #define MX_29F002 0xB0 +#define PMC_ID 0x9D /* PMC */ +#define PMC_49FL002 0x6D +#define PMC_49FL004 0x6E + #define SHARP_ID 0xB0 /* Sharp */ #define SHARP_LHF00L04 0xCF @@ -129,23 +157,6 @@ #define SST_49LF016C 0x5C #define SST_49LF160C 0x4C -#define PMC_ID 0x9D /* PMC */ -#define PMC_49FL002 0x6D -#define PMC_49FL004 0x6E - -#define WINBOND_ID 0xDA /* Winbond */ -#define W_29C011 0xC1 -#define W_29C020C 0x45 -#define W_29C040P 0x46 -#define W_29EE011 0xC1 -#define W_39V040FA 0x34 -#define W_39V040A 0x3D -#define W_39V040B 0x54 -#define W_39V080A 0xD0 -#define W_49F002U 0x0B -#define W_49V002A 0xB0 -#define W_49V002FA 0x32 - #define ST_ID 0x20 /* ST */ #define ST_M50FLW040A 0x08 #define ST_M50FLW040B 0x28 @@ -162,20 +173,27 @@ #define ST_M29W010B 0x23 #define ST_M29W040B 0xE3 -#define EMST_ID 0x8c /* EMST / EFST */ -#define EMST_F49B002UA 0x00 - -#define MSYSTEMS_ID 0x156f /* M-Systems */ -#define MSYSTEMS_MD2200 0xdb /* ? */ -#define MSYSTEMS_MD2800 0x30 /* hmm -- both 0x30 */ -#define MSYSTEMS_MD2802 0x30 /* hmm -- both 0x30 */ - -#define SYNCMOS_ID 0x40 /* SyncMOS */ +#define SYNCMOS_ID 0x40 /* SyncMOS and Mosel Vitelic */ #define S29C51001T 0x01 #define S29C51002T 0x02 #define S29C51004T 0x03 #define S29C31004T 0x63 +#define TI_ID 0x97 /* Texas Instruments */ + +#define WINBOND_ID 0xDA /* Winbond */ +#define W_29C011 0xC1 +#define W_29C020C 0x45 +#define W_29C040P 0x46 +#define W_29EE011 0xC1 +#define W_39V040FA 0x34 +#define W_39V040A 0x3D +#define W_39V040B 0x54 +#define W_39V080A 0xD0 +#define W_49F002U 0x0B +#define W_49V002A 0xB0 +#define W_49V002FA 0x32 + /* function prototypes from udelay.h */ void myusec_delay(int time);

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coreboot October 2007