coreboot August 2006

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[LinuxBIOS] PATCH: IT8673F Super IO support.
by Uwe Hermann 25 Aug '06

25 Aug '06

Hi, here's a patch which adds support for the IT8673F Super IO. I cannot test it at the moment (other than that it builds), but it's reasonably similar to the IT8671F, so I think it should work (given that I didn't miss anything important in the datasheet). HTH, Uwe. -- Uwe Hermann http://www.hermann-uwe.de http://www.it-services-uh.de | http://www.crazy-hacks.org http://www.holsham-traders.de | http://www.unmaintained-free-software.org

3 4

[LinuxBIOS] r2391 - in trunk/LinuxBIOSv2/src/superio/ite: . it8673f it8712f
by svn＠openbios.org 25 Aug '06

25 Aug '06

Author: stepan Date: 2006-08-25 21:29:57 +0200 (Fri, 25 Aug 2006) New Revision: 2391 Added: trunk/LinuxBIOSv2/src/superio/ite/it8673f/ trunk/LinuxBIOSv2/src/superio/ite/it8673f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8673f/chip.h trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8673f/superio.c trunk/LinuxBIOSv2/src/superio/ite/it8712f/ trunk/LinuxBIOSv2/src/superio/ite/it8712f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8712f/chip.h trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8712f/superio.c Log: Support for two new ITE superio parts: it8712f and it8673f from Uwe Hermann. Added: trunk/LinuxBIOSv2/src/superio/ite/it8673f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8673f/Config.lb (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8673f/Config.lb 2006-08-25 19:29:57 UTC (rev 2391) @@ -0,0 +1,2 @@ +config chip.h +object superio.o Added: trunk/LinuxBIOSv2/src/superio/ite/it8673f/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8673f/chip.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8673f/chip.h 2006-08-25 19:29:57 UTC (rev 2391) @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _SUPERIO_ITE_IT8673F +#define _SUPERIO_ITE_IT8673F + +#include <pc80/keyboard.h> +#include <uart8250.h> + +extern struct chip_operations superio_ITE_it8673f_ops; + +struct superio_ITE_it8673f_config { + struct uart8250 com1, com2; + struct pc_keyboard keyboard; +}; + +#endif /* _SUPERIO_ITE_IT8673F */ + Added: trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f.h 2006-08-25 19:29:57 UTC (rev 2391) @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#define IT8673F_FDC 0x00 /* Floppy */ +#define IT8673F_SP1 0x01 /* Com1 */ +#define IT8673F_SP2 0x02 /* Com2 */ +#define IT8673F_PP 0x03 /* Parallel port */ +#define IT8673F_FAN 0x04 /* Fan controller */ +#define IT8673F_KBCK 0x05 /* Keyboard */ +#define IT8673F_KBCM 0x06 /* Mouse */ + Added: trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8673f/it8673f_early_serial.c 2006-08-25 19:29:57 UTC (rev 2391) @@ -0,0 +1,95 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/romcc_io.h> +#include "it8673f.h" + +/* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */ +#define SIO_BASE 0x3f0 +#define SIO_INDEX SIO_BASE +#define SIO_DATA SIO_BASE+1 + +/* Global Configuration Registers. */ +#define IT8673F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ +#define IT8673F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ +#define IT8673F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */ +#define IT8673F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend. */ + +#define IT8673F_CONFIGURATION_PORT 0x0279 /* Write-only. */ + +/* Special values used for entering MB PnP mode. The first four bytes of + * each line determine the address port, the last four are data. */ +static const uint8_t init_values[] = { + 0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe, + 0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61, + 0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1, + 0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39, +}; + +/* The content of IT8673F_CONFIG_REG_LDN (index 0x07) must be set to the + * LDN the register belongs to, before you can access the register. */ +static void it8673f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) +{ + outb(IT8673F_CONFIG_REG_LDN, SIO_BASE); + outb(ldn, SIO_DATA); + outb(index, SIO_BASE); + outb(value, SIO_DATA); +} + +/* Enable the peripheral devices on the IT8673F Super IO chip. */ +static void it8673f_enable_serial(device_t dev, unsigned iobase) +{ + uint8_t i; + + /* (1) Enter the configuration state (MB PnP mode). */ + + /* Perform MB PnP setup to put the SIO chip at 0x3f0. */ + /* Base address 0x3f0: 0x86 0x80 0x55 0x55. */ + /* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */ + /* Base address 0x370: 0x86 0x80 0xaa 0x55. */ + outb(0x86, IT8673F_CONFIGURATION_PORT); + outb(0x80, IT8673F_CONFIGURATION_PORT); + outb(0x55, IT8673F_CONFIGURATION_PORT); + outb(0x55, IT8673F_CONFIGURATION_PORT); + + /* Sequentially write the 32 special values. */ + for (i = 0; i < 32; i++) { + outb(init_values[i], SIO_BASE); + } + + /* (2) Modify the data of configuration registers. */ + + /* Enable all devices. */ + it8673f_sio_write(IT8673F_FDC, 0x30, 0x1); /* Floppy */ + it8673f_sio_write(IT8673F_SP1, 0x30, 0x1); /* Serial port 1 */ + it8673f_sio_write(IT8673F_SP2, 0x30, 0x1); /* Serial port 2 */ + it8673f_sio_write(IT8673F_PP, 0x30, 0x1); /* Parallel port */ + it8673f_sio_write(IT8673F_FAN, 0x30, 0x1); /* Fan controller */ + it8673f_sio_write(IT8673F_KBCK, 0x30, 0x1); /* Keyboard */ + it8673f_sio_write(IT8673F_KBCM, 0x30, 0x1); /* Mouse */ + + /* Select 24MHz CLKIN (clear bit 0). TODO: is this really needed? */ + it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CLOCKSEL, 0x00); + + /* Clear software suspend mode (clear bit 0). */ + it8673f_sio_write(0x00, IT8673F_CONFIG_REG_SWSUSP, 0x00); + + /* (3) Exit the configuration state (MB PnP mode). */ + it8673f_sio_write(0x00, IT8673F_CONFIG_REG_CC, 0x02); +} + Added: trunk/LinuxBIOSv2/src/superio/ite/it8673f/superio.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8673f/superio.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8673f/superio.c 2006-08-25 19:29:57 UTC (rev 2391) @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <uart8250.h> +#include <pc80/keyboard.h> +#include "chip.h" +#include "it8673f.h" + +static void init(device_t dev) +{ + struct superio_ITE_it8673f_config *conf; + struct resource *res0, *res1; + + if (!dev->enabled) { + return; + } + + conf = dev->chip_info; + + switch (dev->path.u.pnp.device) { + case IT8673F_FDC: /* TODO. */ + break; + case IT8673F_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com1); + break; + case IT8673F_SP2: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com2); + break; + case IT8673F_PP: /* TODO. */ + break; + case IT8673F_FAN: /* TODO. */ + break; + case IT8673F_KBCK: + res0 = find_resource(dev, PNP_IDX_IO0); + res1 = find_resource(dev, PNP_IDX_IO1); + init_pc_keyboard(res0->base, res1->base, &conf->keyboard); + break; + case IT8673F_KBCM: /* TODO. */ + break; + } +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_enable, + .init = init, +}; + +/* TODO: FDC, PP, FAN, KBCM. */ +static struct pnp_info pnp_dev_info[] = { + { &ops, IT8673F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8673F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, IT8673F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &pnp_ops, + sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); +} + +struct chip_operations superio_ITE_it8673f_ops = { + CHIP_NAME("ITE it8673f") + .enable_dev = enable_dev, +}; + Added: trunk/LinuxBIOSv2/src/superio/ite/it8712f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8712f/Config.lb (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8712f/Config.lb 2006-08-25 19:29:57 UTC (rev 2391) @@ -0,0 +1,2 @@ +config chip.h +object superio.o Added: trunk/LinuxBIOSv2/src/superio/ite/it8712f/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8712f/chip.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8712f/chip.h 2006-08-25 19:29:57 UTC (rev 2391) @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _SUPERIO_ITE_IT8712F +#define _SUPERIO_ITE_IT8712F + +#include <pc80/keyboard.h> +#include <uart8250.h> + +extern struct chip_operations superio_ITE_it8712f_ops; + +struct superio_ITE_it8712f_config { + struct uart8250 com1, com2; + struct pc_keyboard keyboard; +}; + +#endif /* _SUPERIO_ITE_IT8712F */ + Added: trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f.h 2006-08-25 19:29:57 UTC (rev 2391) @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#define IT8712F_FDC 0x00 /* Floppy */ +#define IT8712F_SP1 0x01 /* Com1 */ +#define IT8712F_SP2 0x02 /* Com2 */ +#define IT8712F_PP 0x03 /* Parallel port */ +#define IT8712F_EC 0x04 /* Environment controller */ +#define IT8712F_KBCK 0x05 /* Keyboard */ +#define IT8712F_KBCM 0x06 /* Mouse */ +#define IT8712F_MIDI 0x08 /* MIDI port */ +#define IT8712F_GAME 0x09 /* GAME port */ +#define IT8712F_IR 0x0a /* Consumer IR */ + Added: trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8712f/it8712f_early_serial.c 2006-08-25 19:29:57 UTC (rev 2391) @@ -0,0 +1,87 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/romcc_io.h> +#include "it8712f.h" + +/* The base address is 0x2e or 0x4e, depending on config bytes. */ +#define SIO_BASE 0x2e +#define SIO_INDEX SIO_BASE +#define SIO_DATA SIO_BASE+1 + +/* Global Configuration Registers. */ +#define IT8712F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ +#define IT8712F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ +#define IT8712F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */ +#define IT8712F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */ +#define IT8712F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */ + +#define IT8712F_CONFIGURATION_PORT 0x2E /* Write-only. */ + +/* The content of IT8712F_CONFIG_REG_LDN (index 0x07) must be set to the + * LDN the register belongs to, before you can access the register. */ +static void it8712f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) +{ + outb(IT8712F_CONFIG_REG_LDN, SIO_BASE); + outb(ldn, SIO_DATA); + outb(index, SIO_BASE); + outb(value, SIO_DATA); +} + +/* Enable the peripheral devices on the IT8712F Super IO chip. */ +static void it8712f_enable_serial(device_t dev, unsigned iobase) +{ + /* (1) Enter the configuration state (MB PnP mode). */ + + /* Perform MB PnP setup to put the SIO chip at 0x2e. */ + /* Base address 0x2e: 0x87 0x01 0x55 0x55. */ + /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */ + outb(0x87, IT8712F_CONFIGURATION_PORT); + outb(0x01, IT8712F_CONFIGURATION_PORT); + outb(0x55, IT8712F_CONFIGURATION_PORT); + outb(0x55, IT8712F_CONFIGURATION_PORT); + + /* (2) Modify the data of configuration registers. */ + + /* Select the chip to configure (if there's more than one). + * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + * If this register is not written, both chips are configured. */ + /* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CONFIGSEL, 0x00); */ + + /* Enable all devices. */ + it8712f_sio_write(IT8712F_FDC, 0x30, 0x1); /* Floppy */ + it8712f_sio_write(IT8712F_SP1, 0x30, 0x1); /* Serial port 1 */ + it8712f_sio_write(IT8712F_SP2, 0x30, 0x1); /* Serial port 2 */ + it8712f_sio_write(IT8712F_PP, 0x30, 0x1); /* Parallel port */ + it8712f_sio_write(IT8712F_EC, 0x30, 0x1); /* Environment controller */ + it8712f_sio_write(IT8712F_KBCK, 0x30, 0x1); /* Keyboard */ + it8712f_sio_write(IT8712F_KBCM, 0x30, 0x1); /* Mouse */ + it8712f_sio_write(IT8712F_MIDI, 0x30, 0x1); /* MIDI port */ + it8712f_sio_write(IT8712F_GAME, 0x30, 0x1); /* GAME port */ + it8712f_sio_write(IT8712F_IR, 0x30, 0x1); /* Consumer IR */ + + /* Select 24MHz/48MHz CLKIN (set/clear bit 0). TODO: Needed? */ + /* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CLOCKSEL, 0x00); */ + + /* Clear software suspend mode (clear bit 0). TODO: Needed? */ + /* it8712f_sio_write(0x00, IT8712F_CONFIG_REG_SWSUSP, 0x00); */ + + /* (3) Exit the configuration state (MB PnP mode). */ + it8712f_sio_write(0x00, IT8712F_CONFIG_REG_CC, 0x02); +} + Added: trunk/LinuxBIOSv2/src/superio/ite/it8712f/superio.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8712f/superio.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8712f/superio.c 2006-08-25 19:29:57 UTC (rev 2391) @@ -0,0 +1,91 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <uart8250.h> +#include <pc80/keyboard.h> +#include "chip.h" +#include "it8712f.h" + +static void init(device_t dev) +{ + struct superio_ITE_it8712f_config *conf; + struct resource *res0, *res1; + + if (!dev->enabled) { + return; + } + + conf = dev->chip_info; + + switch (dev->path.u.pnp.device) { + case IT8712F_FDC: /* TODO. */ + break; + case IT8712F_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com1); + break; + case IT8712F_SP2: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com2); + break; + case IT8712F_PP: /* TODO. */ + break; + case IT8712F_EC: /* TODO. */ + break; + case IT8712F_KBCK: + res0 = find_resource(dev, PNP_IDX_IO0); + res1 = find_resource(dev, PNP_IDX_IO1); + init_pc_keyboard(res0->base, res1->base, &conf->keyboard); + break; + case IT8712F_KBCM: /* TODO. */ + break; + case IT8712F_MIDI: /* TODO. */ + break; + case IT8712F_GAME: /* TODO. */ + break; + case IT8712F_IR: /* TODO. */ + break; + } +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_enable, + .init = init, +}; + +/* TODO: FDC, PP, EC, KBCM, MIDI, GAME, IR. */ +static struct pnp_info pnp_dev_info[] = { + { &ops, IT8712F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8712F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, IT8712F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &pnp_ops, + sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); +} + +struct chip_operations superio_ITE_it8712f_ops = { + CHIP_NAME("ITE it8712f") + .enable_dev = enable_dev, +}; +

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[LinuxBIOS] r2390 - trunk/LinuxBIOSv2/util/flashrom
by svn＠openbios.org 25 Aug '06

25 Aug '06

Author: stepan Date: 2006-08-25 21:21:42 +0200 (Fri, 25 Aug 2006) New Revision: 2390 Modified: trunk/LinuxBIOSv2/util/flashrom/README trunk/LinuxBIOSv2/util/flashrom/flash_enable.c Log: Print a warning if southbridge is not known to flashrom. Modified: trunk/LinuxBIOSv2/util/flashrom/README =================================================================== --- trunk/LinuxBIOSv2/util/flashrom/README 2006-08-25 16:14:31 UTC (rev 2389) +++ trunk/LinuxBIOSv2/util/flashrom/README 2006-08-25 19:21:42 UTC (rev 2390) @@ -77,6 +77,6 @@ ----------- DISK on Chip support is currently disabled since it is considered unstable. -Change CFLAGS in the Makefile to enable it. +Change CFLAGS in the Makefile to enable it: Remove -DDISABLE_DOC from CFLAGS. Modified: trunk/LinuxBIOSv2/util/flashrom/flash_enable.c =================================================================== --- trunk/LinuxBIOSv2/util/flashrom/flash_enable.c 2006-08-25 16:14:31 UTC (rev 2389) +++ trunk/LinuxBIOSv2/util/flashrom/flash_enable.c 2006-08-25 19:21:42 UTC (rev 2390) @@ -506,11 +506,15 @@ } } + if (!enable) { + printf("Warning: Unknown system. Flash detection " + "will most likely fail.\n"); + return 1; + } + /* now do the deed. */ - if (enable) { - printf("Enabling flash write on %s...", enable->name); - if (enable->doit(dev, enable->name) == 0) - printf("OK\n"); - } + printf("Enabling flash write on %s...", enable->name); + if (enable->doit(dev, enable->name) == 0) + printf("OK\n"); return 0; }

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Re: [LinuxBIOS] testing with system emulator
by Borg No. One 25 Aug '06

25 Aug '06

Hi. VMware and bochs provide the capabilities to simply change their system BIOS. In VMware and Bochs you can set a filename for the BIOS that the Emulator/Virtual Machines shall use. More about: "VMware/Bochs<-->BIOS development/Option ROM development" can be found here: http://etherboot.org/wiki/vmwarebios There are also two links inside the article which refer to the VMware forums. You should visit the links too. Borg Number One --BIOS Tool Collection-- --BIOS modifications and realtime desktop help service-- http://bnobtc.pix-art.com http://bnobtc.pix-art.com/eservice --BIOS Logo Gallery-- http://bnobtc.pix-art.com/bioslogo http://bnobtc.pix-art.com/images/bioslogo > Date: Fri, 25 Aug 2006 08:50:06 +0800 > From: "Rogelio Serrano" <rogelio.serrano(a)gmail.com> > Subject: [LinuxBIOS] testing with system emulator > To: linuxbios(a)linuxbios.org > Message-ID: > <a9951d2a0608241750h61965815l8a45d284dcbafbb6(a)mail.gmail.com> > Content-Type: text/plain; charset=UTF-8; format=flowed > > Is there an emulator that we can use for development and testing? > Something that i can customise with registers to look like my > motherboard? > > -- > things i hate about my linux pc: > > 1. it takes more than a second to boot up > 2. keeps asking about filenames and directories > 3. does not remember what i was working on yesterday > 4. does not remember all the changes i have ever made > 5.cannot figure out necessary settings by itself -- Der GMX SmartSurfer hilft bis zu 70% Ihrer Onlinekosten zu sparen! Ideal für Modem und ISDN: http://www.gmx.net/de/go/smartsurfer

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[LinuxBIOS] r2389 - in trunk/LinuxBIOSv2/src: include/cpu/amd southbridge/amd/cs5536
by svn＠openbios.org 25 Aug '06

25 Aug '06

Author: rsmith Date: 2006-08-25 18:14:31 +0200 (Fri, 25 Aug 2006) New Revision: 2389 Modified: trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c Log: - USB P4 as host fix This should make the USB P4 work as a USB host Modified: trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h =================================================================== --- trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h 2006-08-25 14:06:48 UTC (rev 2388) +++ trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h 2006-08-25 16:14:31 UTC (rev 2389) @@ -706,6 +706,8 @@ /* SouthBridge Equates*/ /* MSR_SB and SB_SHIFT are located in CPU.inc*/ +#define MSR_SB_USB2_MEM_DES ((1<<16) + MSR_SB + 0x25) /* Hack to make USB P4 work */ + #define MSR_SB_GLIU ((9 << 14) + MSR_SB) /* 51024xxx or 510*xxxx - fake out just like GL0 on CPU. */ #define MSR_SB_GLPCI (MSR_SB) /* 5100xxxx - don't go to the GLIU */ #define MSR_SB_USB2 ((2 << SB_SHIFT) + MSR_SB) /* 5120xxxx */ Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c =================================================================== --- trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2006-08-25 14:06:48 UTC (rev 2388) +++ trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2006-08-25 16:14:31 UTC (rev 2389) @@ -157,19 +157,19 @@ volatile unsigned long* uocmux; unsigned long val; - printk_err("Base 0x%08x\n",USB2_SB_GLD_MSR_CAP); + + printk_err("DES 0x%08x\n",MSR_SB_USB2_MEM_DES); - msr = rdmsr(USB2_SB_GLD_MSR_CAP); - printk_err("CAP 0x%08x%08x\n", msr.hi,msr.lo); + msr = rdmsr(MSR_SB_USB2_MEM_DES); + printk_err("DES 0x%08x%08x\n", msr.hi,msr.lo); - msr = rdmsr(USB2_SB_GLD_MSR_OHCI_BASE); - printk_err("OHCI base 0x%08x%08x\n", msr.hi,msr.lo); + msr.hi = 0x400000fe; + msr.lo = 0x010fffff; - msr = rdmsr(USB2_SB_GLD_MSR_EHCI_BASE); - printk_err("EHCI base 0x%08x%08x\n", msr.hi,msr.lo); + wrmsr(MSR_SB_USB2_MEM_DES, msr); - msr = rdmsr(USB2_SB_GLD_MSR_DEVCTL_BASE); - printk_err("DevCtl base 0x%08x%08x\n", msr.hi,msr.lo); + msr = rdmsr(MSR_SB_USB2_MEM_DES); + printk_err("New DES 0x%08x%08x\n", msr.hi,msr.lo); msr = rdmsr(USB2_SB_GLD_MSR_UOC_BASE); printk_err("Old UOC Base 0x%08x%08x\n", msr.hi,msr.lo); @@ -185,13 +185,15 @@ val = *uocmux; printk_err("UOCMUX is 0x%lx\n",val); -#if 0 - val &= ~(0xc0); + + val &= ~(0x3); val |= 0x2; *uocmux = val; -#endif + val = *uocmux; + printk_err("New UOCMUX is 0x%lx\n",val); + } }

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[LinuxBIOS] booting without vga
by Rogelio Serrano 25 Aug '06

25 Aug '06

Is there a way for linuxbios to initialize the graphics hardware directly? besides making linux use the framebuffer directly on bootup. and maybe making filo use the framebuffer too. -- things i hate about my linux pc: 1. it takes more than a second to boot up 2. keeps asking about filenames and directories 3. does not remember what i was working on yesterday 4. does not remember all the changes i have ever made 5.cannot figure out necessary settings by itself

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[LinuxBIOS] r2388 - trunk/LinuxBIOSv2/src/southbridge/amd/cs5536
by svn＠openbios.org 25 Aug '06

25 Aug '06

Author: rsmith Date: 2006-08-25 16:06:48 +0200 (Fri, 25 Aug 2006) New Revision: 2388 Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c Log: - fix a silly pointer dereference thinko in my previous commit Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c =================================================================== --- trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2006-08-25 05:01:30 UTC (rev 2387) +++ trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2006-08-25 14:06:48 UTC (rev 2388) @@ -176,16 +176,16 @@ msr.hi |= 0xa; msr.lo |= 0xfe010000; -#if 0 wrmsr(USB2_SB_GLD_MSR_UOC_BASE, msr); msr = rdmsr(USB2_SB_GLD_MSR_UOC_BASE); printk_err("New UOC Base 0x%08x%08x\n", msr.hi,msr.lo); - uocmux = (unsigned long *)msr.lo+4; + uocmux = (unsigned long *)(msr.lo+4); val = *uocmux; - printk_err("UOCMUX is 0x%lx\n",*val); + printk_err("UOCMUX is 0x%lx\n",val); +#if 0 val &= ~(0xc0); val |= 0x2;

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[LinuxBIOS] r2387 - in trunk/LinuxBIOSv2/src: include/cpu/amd mainboard/olpc/rev_a southbridge/amd/cs5536
by svn＠openbios.org 25 Aug '06

25 Aug '06

Author: rsmith Date: 2006-08-25 07:01:30 +0200 (Fri, 25 Aug 2006) New Revision: 2387 Modified: trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h trunk/LinuxBIOSv2/src/mainboard/olpc/rev_a/Config.lb trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/chip.h trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c Log: - Added suport for enabling USB P4 on the olpc USB P4 is disabled by default and we need to setup the mux bits proper to make it work. This is the frame work for that. All thats needed is the right address values Modified: trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h =================================================================== --- trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h 2006-08-23 14:33:54 UTC (rev 2386) +++ trunk/LinuxBIOSv2/src/include/cpu/amd/gx2def.h 2006-08-25 05:01:30 UTC (rev 2387) @@ -731,10 +731,14 @@ /* */ /* USB2*/ /* */ -#define USB2_SB_GLD_MSR_CAP ( MSR_SB_USB2 + 0x00) -#define USB2_SB_GLD_MSR_CONF ( MSR_SB_USB2 + 0x01) -#define USB2_SB_GLD_MSR_PM ( MSR_SB_USB2 + 0x04) +#define USB2_SB_GLD_MSR_CAP ( MSR_SB_USB2 + 0x00) +#define USB2_SB_GLD_MSR_CONF ( MSR_SB_USB2 + 0x01) +#define USB2_SB_GLD_MSR_PM ( MSR_SB_USB2 + 0x04) +#define USB2_SB_GLD_MSR_OHCI_BASE ( MSR_SB_USB2 + 0x08) +#define USB2_SB_GLD_MSR_EHCI_BASE ( MSR_SB_USB2 + 0x09) +#define USB2_SB_GLD_MSR_DEVCTL_BASE ( MSR_SB_USB2 + 0x0A) +#define USB2_SB_GLD_MSR_UOC_BASE ( MSR_SB_USB2 + 0x0B) /* Option controller base */ /* */ /* ATA*/ Modified: trunk/LinuxBIOSv2/src/mainboard/olpc/rev_a/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/olpc/rev_a/Config.lb 2006-08-23 14:33:54 UTC (rev 2386) +++ trunk/LinuxBIOSv2/src/mainboard/olpc/rev_a/Config.lb 2006-08-25 05:01:30 UTC (rev 2387) @@ -138,6 +138,7 @@ register "enable_gpio0_inta" = "1" register "enable_ide_nand_flash" = "1" register "enable_uarta" = "1" + register "enable_USBP4_host" = "1" register "audio_irq" = "5" register "usbf4_irq" = "10" register "usbf5_irq" = "10" Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/chip.h 2006-08-23 14:33:54 UTC (rev 2386) +++ trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/chip.h 2006-08-25 05:01:30 UTC (rev 2387) @@ -12,6 +12,7 @@ int enable_gpio0_inta; /* almost always will be true */ int enable_ide_nand_flash; /* if you are using nand flash instead of IDE drive */ int enable_uarta; /* internal uarta interrupt enable */ + int enable_USBP4_host; /* Enable USB Port 4 as a host */ /* following are IRQ numbers for various southbridge resources. */ /* I have guessed at some things, as I still don't have an lspci from anyone */ int ide_irq; /* f.2 */ Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c =================================================================== --- trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2006-08-23 14:33:54 UTC (rev 2386) +++ trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2006-08-25 05:01:30 UTC (rev 2387) @@ -152,6 +152,48 @@ outl(sb->unwanted_vpci[i] + 0x7C, 0xCF8); outl(0xDEADBEEF, 0xCFC); } + + if (sb->enable_USBP4_host) { + volatile unsigned long* uocmux; + unsigned long val; + + printk_err("Base 0x%08x\n",USB2_SB_GLD_MSR_CAP); + + msr = rdmsr(USB2_SB_GLD_MSR_CAP); + printk_err("CAP 0x%08x%08x\n", msr.hi,msr.lo); + + msr = rdmsr(USB2_SB_GLD_MSR_OHCI_BASE); + printk_err("OHCI base 0x%08x%08x\n", msr.hi,msr.lo); + + msr = rdmsr(USB2_SB_GLD_MSR_EHCI_BASE); + printk_err("EHCI base 0x%08x%08x\n", msr.hi,msr.lo); + + msr = rdmsr(USB2_SB_GLD_MSR_DEVCTL_BASE); + printk_err("DevCtl base 0x%08x%08x\n", msr.hi,msr.lo); + + msr = rdmsr(USB2_SB_GLD_MSR_UOC_BASE); + printk_err("Old UOC Base 0x%08x%08x\n", msr.hi,msr.lo); + msr.hi |= 0xa; + msr.lo |= 0xfe010000; + +#if 0 + wrmsr(USB2_SB_GLD_MSR_UOC_BASE, msr); + + msr = rdmsr(USB2_SB_GLD_MSR_UOC_BASE); + printk_err("New UOC Base 0x%08x%08x\n", msr.hi,msr.lo); + + uocmux = (unsigned long *)msr.lo+4; + val = *uocmux; + + printk_err("UOCMUX is 0x%lx\n",*val); + val &= ~(0xc0); + val |= 0x2; + + *uocmux = val; +#endif + + } + }

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Re: [LinuxBIOS] testing with system emulator
by Lu, Yinghai 25 Aug '06

25 Aug '06

You can get AMD SimNow. There is one public version that you can download for AMD web. YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Rogelio Serrano Sent: Thursday, August 24, 2006 5:50 PM To: linuxbios(a)linuxbios.org Subject: [LinuxBIOS] testing with system emulator Is there an emulator that we can use for development and testing? Something that i can customise with registers to look like my motherboard? -- things i hate about my linux pc: 1. it takes more than a second to boot up 2. keeps asking about filenames and directories 3. does not remember what i was working on yesterday 4. does not remember all the changes i have ever made 5.cannot figure out necessary settings by itself -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.openbios.org/mailman/listinfo/linuxbios

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[LinuxBIOS] testing with system emulator
by Rogelio Serrano 25 Aug '06

25 Aug '06

Is there an emulator that we can use for development and testing? Something that i can customise with registers to look like my motherboard? -- things i hate about my linux pc: 1. it takes more than a second to boot up 2. keeps asking about filenames and directories 3. does not remember what i was working on yesterday 4. does not remember all the changes i have ever made 5.cannot figure out necessary settings by itself

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