coreboot August 2006

coreboot@coreboot.org

39 participants
110 discussions

[LinuxBIOS] Nvidia MCP55 support
by Lu, Yinghai 30 Aug '06

30 Aug '06

I'm working on MCP55 support. There is some blank in mcp55_early_setup.c, So Current Only IDE and USB are working but the sata/nic/pcie don't work. There is another option is use Nvidia binary code (NVMM) directly. So questions is nvidia would allow AMD to release NVMM binary to LinuxBIOS. .., Is it ok to LinuxBIOS? Does is voliatiote the GPL?. Because this code will be called by LinuxBIOS. And it is not loaded and started by LinuxBIOS. (cpu microcode patch code and scsi firmare is loaded and started by LinuxBIOS but setting some register). Is VSM loaded and started only for OLPC? Thanks Yinghai Lu

2 2

Re: [LinuxBIOS] IT8718F support.
by Lu, Yinghai 29 Aug '06

29 Aug '06

Some SB need special setting about LPC decoding on PCI conf space. YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Carl-Daniel Hailfinger Sent: Tuesday, August 29, 2006 2:07 PM To: bari(a)onelabs.com Cc: Uwe Hermann; linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] IT8718F support. Bari Ari wrote: > Uwe Hermann wrote: >> Hi, here's some code for the IT8718F. Untested, but compiles. >> >> > Are you working on the support for these devices by just using the data > sheets and without hardware to test this? It's great if you are. It's a > good starting point for someone else with hardware. Yes, he is. This has the potential to get quite a lot of people started and getting any output at all is a major motivation factor even if the rest of the code for bringup has yet to be written. Can we build a ROM which does nothing but execute early serial code for a given SuperIO, prints a few messages and then halts? So that if somebody knows the SuperIO on his mainboard he can build a ROM testing the code we have for it? Or does the early serial code also depend on northbridge/southbridge/CPU? Regards, Carl-Daniel -- http://www.hailfinger.org/ -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.openbios.org/mailman/listinfo/linuxbios

1 0

[LinuxBIOS] r2394 - in trunk/LinuxBIOSv2/src/superio/ite: . it8671f it8718f
by svn＠openbios.org 29 Aug '06

29 Aug '06

Author: stepan Date: 2006-08-29 19:41:14 +0200 (Tue, 29 Aug 2006) New Revision: 2394 Added: trunk/LinuxBIOSv2/src/superio/ite/it8718f/ trunk/LinuxBIOSv2/src/superio/ite/it8718f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8718f/chip.h trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f.h trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8718f/superio.c Modified: trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f.h trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8671f/superio.c Log: merge latest code from Uwe Hermann Modified: trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f.h 2006-08-29 00:45:42 UTC (rev 2393) +++ trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f.h 2006-08-29 17:41:14 UTC (rev 2394) @@ -16,11 +16,10 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -/* TODO: Find datasheet and check for correct values. */ #define IT8671F_FDC 0x00 /* Floppy */ -/* #define IT8671F_PP 0x01 */ /* Parallel port */ +#define IT8671F_SP1 0x01 /* Com1 */ #define IT8671F_SP2 0x02 /* Com2 */ -#define IT8671F_SP1 0x03 /* Com1 */ -#define IT8671F_KBCK 0x06 /* Keyboard */ -/* #define IT8671F_FAN 0x09 */ +#define IT8671F_PP 0x03 /* Parallel port */ +#define IT8671F_KBCK 0x05 /* Keyboard */ +#define IT8671F_KBCM 0x06 /* Mouse */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c 2006-08-29 00:45:42 UTC (rev 2393) +++ trunk/LinuxBIOSv2/src/superio/ite/it8671f/it8671f_early_serial.c 2006-08-29 17:41:14 UTC (rev 2394) @@ -20,18 +20,18 @@ #include "it8671f.h" /* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */ -#define SIO_BASE 0x3f0 -#define SIO_INDEX SIO_BASE -#define SIO_DATA SIO_BASE+1 +#define SIO_BASE 0x3f0 +#define SIO_INDEX SIO_BASE +#define SIO_DATA SIO_BASE+1 -/* TODO: These values are actually from the IT8673F datasheet; check if - they're also valid for the IT8671F. */ -#define IT8671F_CONFIG_REG_CC 0x02 /* Configure Control. */ -#define IT8671F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ -#define IT8671F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */ -#define IT8671F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend. */ +/* Global Configuration Registers. */ +#define IT8671F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ +#define IT8671F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ +#define IT8671F_CONFIG_REG_LDE 0x23 /* PnP Logical Device Enable. */ +#define IT8671F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend. */ -#define IT8671F_ADDRESS_PORT 0x279 +#define IT8671F_CONFIGURATION_PORT 0x0279 /* Write-only. */ +#define IT8671F_WRITE_DATA_PORT 0x0A79 /* Write-only. */ /* Special values used for entering MB PnP mode. The first four bytes of * each line determine the address port, the last four are data. */ @@ -42,7 +42,7 @@ 0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39, }; -/* The content of IT8671F_CONFIG_REG_LDN (index 07h) must be set to the +/* The content of IT8671F_CONFIG_REG_LDN (index 0x07) must be set to the * LDN the register belongs to, before you can access the register. */ static void it8671f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) { @@ -63,10 +63,10 @@ /* Base address 0x3f0: 0x86 0x80 0x55 0x55. */ /* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */ /* Base address 0x370: 0x86 0x80 0xaa 0x55. */ - outb(0x86, IT8671F_ADDRESS_PORT); - outb(0x80, IT8671F_ADDRESS_PORT); - outb(0x55, IT8671F_ADDRESS_PORT); - outb(0x55, IT8671F_ADDRESS_PORT); + outb(0x86, IT8671F_CONFIGURATION_PORT); + outb(0x80, IT8671F_CONFIGURATION_PORT); + outb(0x55, IT8671F_CONFIGURATION_PORT); + outb(0x55, IT8671F_CONFIGURATION_PORT); /* Sequentially write the 32 special values. */ for (i = 0; i < 32; i++) { @@ -75,14 +75,20 @@ /* (2) Modify the data of configuration registers. */ - /* Enable parallel port, serial port 1, serial port 2, floppy. */ - it8671f_sio_write(0x00, 0x23, 0x0f); + /* Allow all devices to be enabled. Bits: FDC (0), Com1 (1), Com2 (2), + PP (3), Reserved (4), KBCK (5), KBCM (6), Reserved (7). */ + it8671f_sio_write(0x00, IT8671F_CONFIG_REG_LDE, 0x6f); - /* Activate serial port 1 and 2. */ - it8671f_sio_write(0x01, 0x30, 0x1); - it8671f_sio_write(0x02, 0x30, 0x1); + /* Activate all devices. */ + it8671f_sio_write(IT8671F_FDC, 0x30, 0x01); /* Floppy */ + it8671f_sio_write(IT8671F_SP1, 0x30, 0x01); /* Serial port 1 */ + it8671f_sio_write(IT8671F_SP2, 0x30, 0x01); /* Serial port 2 */ + it8671f_sio_write(IT8671F_PP, 0x30, 0x01); /* Parallel port */ + it8671f_sio_write(IT8671F_KBCK, 0x30, 0x01); /* Keyboard */ + it8671f_sio_write(IT8671F_KBCM, 0x30, 0x01); /* Mouse */ - /* Select 24MHz CLKIN and clear software suspend mode. */ + /* Select 24MHz CLKIN (clear bit 6) and clear software suspend + mode (clear bit 0). */ it8671f_sio_write(0x00, IT8671F_CONFIG_REG_SWSUSP, 0x00); /* (3) Exit the configuration state (MB PnP mode). */ Modified: trunk/LinuxBIOSv2/src/superio/ite/it8671f/superio.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8671f/superio.c 2006-08-29 00:45:42 UTC (rev 2393) +++ trunk/LinuxBIOSv2/src/superio/ite/it8671f/superio.c 2006-08-29 17:41:14 UTC (rev 2394) @@ -33,8 +33,7 @@ conf = dev->chip_info; switch (dev->path.u.pnp.device) { - case IT8671F_FDC: - /* TODO. */ + case IT8671F_FDC: /* TODO. */ break; case IT8671F_SP1: res0 = find_resource(dev, PNP_IDX_IO0); @@ -44,11 +43,15 @@ res0 = find_resource(dev, PNP_IDX_IO0); init_uart8250(res0->base, &conf->com2); break; + case IT8671F_PP: /* TODO. */ + break; case IT8671F_KBCK: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); init_pc_keyboard(res0->base, res1->base, &conf->keyboard); break; + case IT8671F_KBCM: /* TODO. */ + break; } } @@ -60,12 +63,10 @@ .init = init, }; -/* TODO: Find and check datasheet. */ +/* TODO: FDC, PP, KBCM. */ static struct pnp_info pnp_dev_info[] = { - { &ops, IT8671F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, }, - /* { &ops, IT8671F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, }, */ + { &ops, IT8671F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, { &ops, IT8671F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, - { &ops, IT8671F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, { &ops, IT8671F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, }; Added: trunk/LinuxBIOSv2/src/superio/ite/it8718f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8718f/Config.lb (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8718f/Config.lb 2006-08-29 17:41:14 UTC (rev 2394) @@ -0,0 +1,2 @@ +config chip.h +object superio.o Added: trunk/LinuxBIOSv2/src/superio/ite/it8718f/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8718f/chip.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8718f/chip.h 2006-08-29 17:41:14 UTC (rev 2394) @@ -0,0 +1,33 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _SUPERIO_ITE_IT8718F +#define _SUPERIO_ITE_IT8718F + +#include <pc80/keyboard.h> +#include <uart8250.h> + +extern struct chip_operations superio_ITE_it8718f_ops; + +struct superio_ITE_it8718f_config { + struct uart8250 com1, com2; + struct pc_keyboard keyboard; +}; + +#endif /* _SUPERIO_ITE_IT8718F */ + Added: trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f.h 2006-08-29 17:41:14 UTC (rev 2394) @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8718_2.asp */ +/* Status: untested on real hardware, but it compiles. */ + +#define IT8718F_FDC 0x00 /* Floppy */ +#define IT8718F_SP1 0x01 /* Com1 */ +#define IT8718F_SP2 0x02 /* Com2 */ +#define IT8718F_PP 0x03 /* Parallel port */ +#define IT8718F_EC 0x04 /* Environment controller */ +#define IT8718F_KBCK 0x05 /* Keyboard */ +#define IT8718F_KBCM 0x06 /* Mouse */ +#define IT8718F_IR 0x0a /* Consumer IR */ + Added: trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8718f/it8718f_early_serial.c 2006-08-29 17:41:14 UTC (rev 2394) @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/romcc_io.h> +#include "it8718f.h" + +/* The base address is 0x2e or 0x4e, depending on config bytes. */ +#define SIO_BASE 0x2e +#define SIO_INDEX SIO_BASE +#define SIO_DATA SIO_BASE+1 + +/* Global Configuration Registers. */ +#define IT8718F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ +#define IT8718F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ +#define IT8718F_CONFIG_REG_CONFIGSEL 0x22 /* Configuration Select. */ +#define IT8718F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */ +#define IT8718F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */ + +#define IT8718F_CONFIGURATION_PORT 0x2e /* Write-only. */ + +/* The content of IT8718F_CONFIG_REG_LDN (index 0x07) must be set to the + * LDN the register belongs to, before you can access the register. */ +static void it8718f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) +{ + outb(IT8718F_CONFIG_REG_LDN, SIO_BASE); + outb(ldn, SIO_DATA); + outb(index, SIO_BASE); + outb(value, SIO_DATA); +} + +/* Enable the peripheral devices on the IT8718F Super IO chip. */ +static void it8718f_enable_serial(device_t dev, unsigned iobase) +{ + /* (1) Enter the configuration state (MB PnP mode). */ + + /* Perform MB PnP setup to put the SIO chip at 0x2e. */ + /* Base address 0x2e: 0x87 0x01 0x55 0x55. */ + /* Base address 0x4e: 0x87 0x01 0x55 0xaa. */ + outb(0x87, IT8718F_CONFIGURATION_PORT); + outb(0x01, IT8718F_CONFIGURATION_PORT); + outb(0x55, IT8718F_CONFIGURATION_PORT); + outb(0x55, IT8718F_CONFIGURATION_PORT); + + /* (2) Modify the data of configuration registers. */ + + /* Select the chip to configure (if there's more than one). + * Set bit 7 to select JP3=1, clear bit 7 to select JP3=0. + * If this register is not written, both chips are configured. */ + /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CONFIGSEL, 0x00); */ + + /* Enable all devices. */ + it8718f_sio_write(IT8718F_FDC, 0x30, 0x1); /* Floppy */ + it8718f_sio_write(IT8718F_SP1, 0x30, 0x1); /* Serial port 1 */ + it8718f_sio_write(IT8718F_SP2, 0x30, 0x1); /* Serial port 2 */ + it8718f_sio_write(IT8718F_PP, 0x30, 0x1); /* Parallel port */ + it8718f_sio_write(IT8718F_EC, 0x30, 0x1); /* Environment controller */ + it8718f_sio_write(IT8718F_KBCK, 0x30, 0x1); /* Keyboard */ + it8718f_sio_write(IT8718F_KBCM, 0x30, 0x1); /* Mouse */ + it8718f_sio_write(IT8718F_IR, 0x30, 0x1); /* Consumer IR */ + + /* Select 24MHz/48MHz CLKIN (set/clear bit 0). TODO: Needed? */ + /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CLOCKSEL, 0x00); */ + + /* Clear software suspend mode (clear bit 0). TODO: Needed? */ + /* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_SWSUSP, 0x00); */ + + /* (3) Exit the configuration state (MB PnP mode). */ + it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CC, 0x02); +} + Added: trunk/LinuxBIOSv2/src/superio/ite/it8718f/superio.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8718f/superio.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8718f/superio.c 2006-08-29 17:41:14 UTC (rev 2394) @@ -0,0 +1,87 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <uart8250.h> +#include <pc80/keyboard.h> +#include "chip.h" +#include "it8718f.h" + +static void init(device_t dev) +{ + struct superio_ITE_it8718f_config *conf; + struct resource *res0, *res1; + + if (!dev->enabled) { + return; + } + + conf = dev->chip_info; + + switch (dev->path.u.pnp.device) { + case IT8718F_FDC: /* TODO. */ + break; + case IT8718F_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com1); + break; + case IT8718F_SP2: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com2); + break; + case IT8718F_PP: /* TODO. */ + break; + case IT8718F_EC: /* TODO. */ + break; + case IT8718F_KBCK: + res0 = find_resource(dev, PNP_IDX_IO0); + res1 = find_resource(dev, PNP_IDX_IO1); + init_pc_keyboard(res0->base, res1->base, &conf->keyboard); + break; + case IT8718F_KBCM: /* TODO. */ + break; + case IT8718F_IR: /* TODO. */ + break; + } +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_enable, + .init = init, +}; + +/* TODO: FDC, PP, EC, KBCM, IR. */ +static struct pnp_info pnp_dev_info[] = { + { &ops, IT8718F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8718F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, + { &ops, IT8718F_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &pnp_ops, + sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); +} + +struct chip_operations superio_ITE_it8718f_ops = { + CHIP_NAME("ITE it8718f") + .enable_dev = enable_dev, +}; +

1 0

[LinuxBIOS] Bounty for LinuxBIOS on VIA C7 platform
by Lionel Elie Mamane 29 Aug '06

29 Aug '06

Hi, Anybody interested in a bounty for adding support of a motherboard that can take a Via C7 CPU to LinuxBIOS? (For example the VIA EPIA CN or VIA EPIA EN.) -- Lionel

1 0

[LinuxBIOS] r2393 - in trunk/LinuxBIOSv2/src/superio/ite: . it8661f
by svn＠openbios.org 29 Aug '06

29 Aug '06

Author: stepan Date: 2006-08-29 02:45:42 +0200 (Tue, 29 Aug 2006) New Revision: 2393 Added: trunk/LinuxBIOSv2/src/superio/ite/it8661f/ trunk/LinuxBIOSv2/src/superio/ite/it8661f/Config.lb trunk/LinuxBIOSv2/src/superio/ite/it8661f/chip.h trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f.h trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c trunk/LinuxBIOSv2/src/superio/ite/it8661f/superio.c Log: it8661f support from Uwe Hermann Added: trunk/LinuxBIOSv2/src/superio/ite/it8661f/Config.lb =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8661f/Config.lb (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8661f/Config.lb 2006-08-29 00:45:42 UTC (rev 2393) @@ -0,0 +1,2 @@ +config chip.h +object superio.o Added: trunk/LinuxBIOSv2/src/superio/ite/it8661f/chip.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8661f/chip.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8661f/chip.h 2006-08-29 00:45:42 UTC (rev 2393) @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef _SUPERIO_ITE_IT8661F +#define _SUPERIO_ITE_IT8661F + +/* This chip doesn't seem to have keyboard and mouse support. */ + +/* #include <pc80/keyboard.h> */ +#include <uart8250.h> + +extern struct chip_operations superio_ITE_it8661f_ops; + +struct superio_ITE_it8661f_config { + struct uart8250 com1, com2; + /* struct pc_keyboard keyboard; */ +}; + +#endif /* _SUPERIO_ITE_IT8661F */ + Added: trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f.h =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f.h (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f.h 2006-08-29 00:45:42 UTC (rev 2393) @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* Datasheet: http://www.ite.com.tw/product_info/PC/Brief-IT8661_2.asp */ +/* Status: untested on real hardware, but it compiles. */ + +/* This chip doesn't seem to have keyboard and mouse support. */ + +#define IT8661F_FDC 0x00 /* Floppy */ +#define IT8661F_SP1 0x01 /* Com1 */ +#define IT8661F_SP2 0x02 /* Com2 */ +#define IT8661F_PP 0x03 /* Parallel port */ +#define IT8661F_IR 0x04 /* IR */ +#define IT8661F_GPIO 0x05 /* GPIO & Alternate Function Configuration */ + Added: trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8661f/it8661f_early_serial.c 2006-08-29 00:45:42 UTC (rev 2393) @@ -0,0 +1,95 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/romcc_io.h> +#include "it8661f.h" + +/* The base address is 0x3f0, 0x3bd, or 0x370, depending on config bytes. */ +#define SIO_BASE 0x3f0 +#define SIO_INDEX SIO_BASE +#define SIO_DATA SIO_BASE+1 + +/* Global Configuration Registers. */ +#define IT8661F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */ +#define IT8661F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */ +#define IT8661F_CONFIG_REG_LDE 0x23 /* PnP Logical Device Enable. */ +#define IT8661F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend + Clock Select. */ + +#define IT8661F_CONFIGURATION_PORT 0x0279 /* Write-only. */ + +/* Special values used for entering MB PnP mode. The first four bytes of + * each line determine the address port, the last four are data. */ +static const uint8_t init_values[] = { + 0x6a, 0xb5, 0xda, 0xed, /**/ 0xf6, 0xfb, 0x7d, 0xbe, + 0xdf, 0x6f, 0x37, 0x1b, /**/ 0x0d, 0x86, 0xc3, 0x61, + 0xb0, 0x58, 0x2c, 0x16, /**/ 0x8b, 0x45, 0xa2, 0xd1, + 0xe8, 0x74, 0x3a, 0x9d, /**/ 0xce, 0xe7, 0x73, 0x39, +}; + +/* The content of IT8661F_CONFIG_REG_LDN (index 0x07) must be set to the + * LDN the register belongs to, before you can access the register. */ +static void it8661f_sio_write(uint8_t ldn, uint8_t index, uint8_t value) +{ + outb(IT8661F_CONFIG_REG_LDN, SIO_BASE); + outb(ldn, SIO_DATA); + outb(index, SIO_BASE); + outb(value, SIO_DATA); +} + +/* Enable the peripheral devices on the IT8661F Super IO chip. */ +static void it8661f_enable_serial(device_t dev, unsigned iobase) +{ + uint8_t i; + + /* (1) Enter the configuration state (MB PnP mode). */ + + /* Perform MB PnP setup to put the SIO chip at 0x3f0. */ + /* Base address 0x3f0: 0x86 0x80 0x55 0x55. */ + /* Base address 0x3bd: 0x86 0x80 0x55 0xaa. */ + /* Base address 0x370: 0x86 0x80 0xaa 0x55. */ + outb(0x86, IT8661F_CONFIGURATION_PORT); + outb(0x80, IT8661F_CONFIGURATION_PORT); + outb(0x55, IT8661F_CONFIGURATION_PORT); + outb(0x55, IT8661F_CONFIGURATION_PORT); + + /* Sequentially write the 32 special values. */ + for (i = 0; i < 32; i++) { + outb(init_values[i], SIO_BASE); + } + + /* (2) Modify the data of configuration registers. */ + + /* Allow all devices to be enabled. Bits: FDC (0), Com1 (1), Com2 (2), + PP (3), IR (4). Bits 5-7 are reserved. */ + it8661f_sio_write(0x00, IT8661F_CONFIG_REG_LDE, 0x1f); + + /* Enable all devices. */ + it8661f_sio_write(IT8661F_FDC, 0x30, 0x1); /* Floppy */ + it8661f_sio_write(IT8661F_SP1, 0x30, 0x1); /* Serial port 1 */ + it8661f_sio_write(IT8661F_SP2, 0x30, 0x1); /* Serial port 2 */ + it8661f_sio_write(IT8661F_PP, 0x30, 0x1); /* Parallel port */ + it8661f_sio_write(IT8661F_IR, 0x30, 0x1); /* IR */ + + /* Select 24MHz CLKIN (clear bit 1) and clear software suspend mode + (clear bit 0). */ + it8661f_sio_write(0x00, IT8661F_CONFIG_REG_SWSUSP, 0x00); + + /* (3) Exit the configuration state (MB PnP mode). */ + it8661f_sio_write(0x00, IT8661F_CONFIG_REG_CC, 0x02); +} + Added: trunk/LinuxBIOSv2/src/superio/ite/it8661f/superio.c =================================================================== --- trunk/LinuxBIOSv2/src/superio/ite/it8661f/superio.c (rev 0) +++ trunk/LinuxBIOSv2/src/superio/ite/it8661f/superio.c 2006-08-29 00:45:42 UTC (rev 2393) @@ -0,0 +1,79 @@ +/* + * Copyright (C) 2006 Uwe Hermann <uwe(a)hermann-uwe.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* This chip doesn't seem to have keyboard and mouse support. */ + +#include <uart8250.h> +/* #include <pc80/keyboard.h> */ +#include "chip.h" +#include "it8661f.h" + +static void init(device_t dev) +{ + struct superio_ITE_it8661f_config *conf; + struct resource *res0, *res1; + + if (!dev->enabled) { + return; + } + + conf = dev->chip_info; + + switch (dev->path.u.pnp.device) { + case IT8661F_FDC: /* TODO. */ + break; + case IT8661F_SP1: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com1); + break; + case IT8661F_SP2: + res0 = find_resource(dev, PNP_IDX_IO0); + init_uart8250(res0->base, &conf->com2); + break; + case IT8661F_PP: /* TODO. */ + break; + case IT8661F_IR: /* TODO. */ + break; + } +} + +static struct device_operations ops = { + .read_resources = pnp_read_resources, + .set_resources = pnp_set_resources, + .enable_resources = pnp_enable_resources, + .enable = pnp_enable, + .init = init, +}; + +/* TODO: FDC, PP, IR, GPIO. */ +static struct pnp_info pnp_dev_info[] = { + { &ops, IT8661F_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, }, + { &ops, IT8661F_SP2, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, }, +}; + +static void enable_dev(struct device *dev) +{ + pnp_enable_devices(dev, &pnp_ops, + sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info); +} + +struct chip_operations superio_ITE_it8661f_ops = { + CHIP_NAME("ITE it8661f") + .enable_dev = enable_dev, +}; +

1 0

[LinuxBIOS] IT8661F support.
by Uwe Hermann 29 Aug '06

29 Aug '06

Hi, here's another ITE Super IO. Untested, but compiles. Uwe. -- Uwe Hermann http://www.hermann-uwe.de http://www.it-services-uh.de | http://www.crazy-hacks.org http://www.holsham-traders.de | http://www.unmaintained-free-software.org

1 0

Re: [LinuxBIOS] Microkernel / Manufacturers
by Fish, Andrew J 28 Aug '06

28 Aug '06

Will, The Edk2 project on www.TianoCore.org does not have silicon enabling code but it does implement UEFI conformant interfaces. It currently builds under Windows, Linux, and Mac OS X. So this code may be helpful to you. It's all BSD license so you can use it how ever you like. If you have any EFI questions you can use the mailing lists on www.TianoCore.org to get answers as a fair number of the people from United EFI Forum board of directors companies (AMD, AMI, Dell, HP, IBM Insyde, Intel, Microsoft, & Phoenix Technologies) and others hang out on these mailing lists. Of course www.UEFI.org lets you get the official UEFI info and latest versions of the specifications. I'm really excited about the future of EFI. The Intel based iMac in my office is a cool machine and it's really great to see the innovation Apple has done based on EFI. Andrew Fish Simplicity is the ultimate sophistication. - Leonardo da Vinci "The content of this message is my personal opinion only and although I am an employee of Intel, the statements I make here in no way represent Intel's position on the issue, nor am I authorized to speak on behalf of Intel on this matter." Your lawyer may vary. >-----Original Message----- >From: William DUCK [mailto:guillaume.fortaine@wanadoo.fr] >Sent: Saturday, August 26, 2006 10:55 AM >To: users(a)edk2.tianocore.org; linuxbios(a)linuxbios.org; u-boot- >users(a)lists.sourceforge.net; admin(a)uefi.org >Subject: Microkernel / Manufacturers > >Hello, > >I am currently involved into the UEFI project. > >I would want to build an Open Source UEFI firmware in the style of >U-Boot/LinuxBIOS but to boot a microkernel. > >Which manufacturer could I contact to build a firmware ? ( to have the >specs/datasheets of the hardware) > >If you want to contact me, my mail is >guillaume_dot_fortaine_at_wanadoo_dot_fr > >I will set up a mailing-list, a web server, a wiki and an IRC > >Thank you for your answer, > >Best Regards, > > WIll > >--------------------------------------------------------------------- >To unsubscribe, e-mail: users-unsubscribe(a)edk2.tianocore.org >For additional commands, e-mail: users-help(a)edk2.tianocore.org

1 0

[LinuxBIOS] r2392 - trunk/LinuxBIOSv2/src/southbridge/amd/cs5536
by svn＠openbios.org 28 Aug '06

28 Aug '06

Author: rsmith Date: 2006-08-28 18:18:32 +0200 (Mon, 28 Aug 2006) New Revision: 2392 Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c Log: - Much better USB P4 fix. This one actualy works. You cannot just go mucking about with stuff that the VSA has under its thumb. Bad Things happen. This does it the VSA way. Modified: trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c =================================================================== --- trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2006-08-25 19:29:57 UTC (rev 2391) +++ trunk/LinuxBIOSv2/src/southbridge/amd/cs5536/cs5536.c 2006-08-28 16:18:32 UTC (rev 2392) @@ -146,56 +146,27 @@ /* Southbridge (80007800 = 00.0F.00) */ pci_assign_irqs(0, 0x0F, slots_sb); /* bus=0, device=0x0F, slots={11,5,10,10} */ #endif - /* disable unwanted virtual PCI devices */ - for (i = 0; (i < MAX_UNWANTED_VPCI) && (0 != sb->unwanted_vpci[i]); i++) { - printk_debug("Disabling VPCI device: 0x%08X\n", sb->unwanted_vpci[i]); - outl(sb->unwanted_vpci[i] + 0x7C, 0xCF8); - outl(0xDEADBEEF, 0xCFC); - } if (sb->enable_USBP4_host) { - volatile unsigned long* uocmux; unsigned long val; + unsigned long uocmux; + outl(0x80007F10, 0xCF8); + outl(0x0EFC00000, 0xCFC); - printk_err("DES 0x%08x\n",MSR_SB_USB2_MEM_DES); - - msr = rdmsr(MSR_SB_USB2_MEM_DES); - printk_err("DES 0x%08x%08x\n", msr.hi,msr.lo); + uocmux = *((unsigned long *) 0x0EFC00004); + uocmux &= ~3; + uocmux |= 2; - msr.hi = 0x400000fe; - msr.lo = 0x010fffff; - - wrmsr(MSR_SB_USB2_MEM_DES, msr); - - msr = rdmsr(MSR_SB_USB2_MEM_DES); - printk_err("New DES 0x%08x%08x\n", msr.hi,msr.lo); - - msr = rdmsr(USB2_SB_GLD_MSR_UOC_BASE); - printk_err("Old UOC Base 0x%08x%08x\n", msr.hi,msr.lo); - msr.hi |= 0xa; - msr.lo |= 0xfe010000; - - wrmsr(USB2_SB_GLD_MSR_UOC_BASE, msr); - - msr = rdmsr(USB2_SB_GLD_MSR_UOC_BASE); - printk_err("New UOC Base 0x%08x%08x\n", msr.hi,msr.lo); - - uocmux = (unsigned long *)(msr.lo+4); - val = *uocmux; - - printk_err("UOCMUX is 0x%lx\n",val); - - val &= ~(0x3); - val |= 0x2; - - *uocmux = val; - - val = *uocmux; - printk_err("New UOCMUX is 0x%lx\n",val); - + *((unsigned long *) 0x0EFC00004) = uocmux; } + /* disable unwanted virtual PCI devices */ + for (i = 0; (i < MAX_UNWANTED_VPCI) && (0 != sb->unwanted_vpci[i]); i++) { + printk_debug("Disabling VPCI device: 0x%08X\n", sb->unwanted_vpci[i]); + outl(sb->unwanted_vpci[i] + 0x7C, 0xCF8); + outl(0xDEADBEEF, 0xCFC); + } }

1 0

[LinuxBIOS] Microkernel / Manufacturers
by William DUCK 26 Aug '06

26 Aug '06

Hello, I am currently involved into the UEFI project. I would want to build an Open Source UEFI firmware in the style of U-Boot/LinuxBIOS but to boot a microkernel. Which manufacturer could I contact to build a firmware ? ( to have the specs/datasheets of the hardware) If you want to contact me, my mail is guillaume_dot_fortaine_at_wanadoo_dot_fr I will set up a mailing-list, a web server, a wiki and an IRC Thank you for your answer, Best Regards, WIll

2 1

[LinuxBIOS] Booting LinuxBIOS on an EPIA-V
by Fredrik Tolf 26 Aug '06

26 Aug '06

Hi list! I've been trying to get LinuxBIOS to boot on my EPIA-V motherboard (VIA 8601A NB, VT8231 SB), and at first I followed the bundled HOWTO for the EPIA-M, before I discovered that EPIA-V was an entirely different creatures (it uses SDRAM, whereas I believe that the EPIA-M uses DDRAM), and the EPIA-M BIOS didn't boot, of course. However, I've tried a number of different variations of the via/epia configuration now, and it doesn't seem to want to boot whatever I do. The new flash chip I used is a 512 KiB chip, as opposed to the original 256 KiB chip (which isn't a problem, though, because if I burn the original BIOS to it with a 256 KiB block from /dev/zero prepended to it, it boots just fine), so I tried the 512kbflash config file as well, but to no avail. I'm using FILO as the payload. I'm beginning to run out of options, and I don't know how to diagnose LinuxBIOS. The monitor doesn't turn on, so I'm guessing it might be something to do with the VGA BIOS. In the EPIA-M HOWTO it said to prepend the LinuxBIOS image with the original 64 KiB VGA BIOS image -- is that the same for the EPIA-V (and in that case, how would I do to generate a LinuxBIOS image that is suitable for prepending with the VGA BIOS)? Thank you for your time! Fredrik Tolf

4 16

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

2009

2008

2007

2006

2005

2004

2003

2002

coreboot August 2006