coreboot November 2006

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260 discussions

[LinuxBIOS] Failure with Tyan K8WE S2895
by Daniel Drake 15 Nov '06

15 Nov '06

Hi, I just attempted my first LinuxBIOS install and didn't succeed: The system no longer boots. This is a Tyan K8WE motherboard. When I plug the power in, the fans spin and lights come on very briefly, then everything stops and the PC speaker emits 9 beeps. It then pauses, beeps 9 times, pauses, 9 beeps, ... Pressing the power button restarts this cycle (lights and fans come on, then stop, then the beeping cycle restarts) I have connected a serial console no data is being sent out of the serial port at this time. Are problems such as this common? Any ideas for what might have caused it or how it can be diagnosed? I have not yet performed a hotswap reflash fix on another board. Here is the process I used to build and flash the system: Checked out filo from svn. Ran "make", modified Config: USE_GRUB = 0 AUTOBOOT_FILE = "hde1:/vmlinuz root=/dev/sda5" AUTOBOOT_DELAY = 5 Ran "make". Checked out r2497 of LinuxBIOSv2 from SVN. Made this change, as I am compiling on x86-64: > > Index: src/mainboard/tyan/s2895/Options.lb > =================================================================== > --- src/mainboard/tyan/s2895/Options.lb (revision 2497) > +++ src/mainboard/tyan/s2895/Options.lb (working copy) > @@ -234,8 +234,8 @@ > ## > ## The default compiler > ## > -default CC="$(CROSS_COMPILE)gcc-4.0.2 -m32" > -default HOSTCC="gcc-4.0.2" > +default CC="$(CROSS_COMPILE)gcc -m32" > +default HOSTCC="gcc -m32" > > ## > ## Disable the gdb stub by default Modified targets/tyan/Config.lb to point to my filo.elf payload from earlier. cd targets ./buildtarget tyan/s2895 cd tyan/s2895/s2895 make Then, on the target system: ./flashrom -r vendor.rom ./flashrom -c SST49LF080A -V -w linuxbios.rom ./flashrom -c SST49LF080A --force -v linuxbios.rom No errors. At this point I accidently rebooted, and it froze (could this have caused the problem?) I then replugged the power and observed the above results. Thanks! -- Daniel Drake Brontes Technologies, A 3M Company

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[LinuxBIOS] Filo with Sata
by Moses Reuben 14 Nov '06

14 Nov '06

Hi all Can i use filo with sata disk or i must use etherboot? thanks

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Re: [LinuxBIOS] what is i2cmux2?
by Lu, Yinghai 14 Nov '06

14 Nov '06

That is MB related. So normally you don't need i2cmux for 2 way opteron's RAM spd access. The i2c mux has two bits for one link First for: in/out, second is enabling which link. YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Tom Sylla Sent: Monday, November 13, 2006 1:01 PM To: yhlu; linuxbios(a)linuxbios.org Subject: [LinuxBIOS] what is i2cmux2? As part of Broadcom Blast, yhlu checked in a new i2c mux file, i2cmux2. I see a one line addition: smbus_write_byte(dev, 0x03, 0); // all output What is this for? Is required for the HT1000? or is it required for the particular mux on the Blast platform? Can that answer be documented somewhere? Is there a better way to do this than to duplicate and stick on a '2'? Thanks -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.openbios.org/mailman/listinfo/linuxbios

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[LinuxBIOS] [Fwd: Re: Intel 440bx]
by Svante Signell 14 Nov '06

14 Nov '06

-------- Forwarded Message -------- > From: Svante Signell <svante.signell(a)telia.com> > To: linuxibios(a)linuxbios.org > Cc: svante.signell(a)telia.com > Subject: Re: [LinuxBIOS] Intel 440bx > Date: Tue, 14 Nov 2006 11:34:16 +0100 > > I'm very interested in the development for 440BX in V2. I have a Dual > CPU MSI-6120 with overclocked P2 Celerons. Below are some excerpts from > emails exchanged between the list and me in January this year. I also > have at least 2 more boxes with the same chipset if everything works out > OK with the Dual CPU box I would replace the BIOS in these too. BTW: How > to backup the old BIOS to a replacement chip before starting? Is that > supported by flashrom? > > Thanks, > Svante Signell > > On Tue, 2006-11-14 at 10:32 +0100, Peter Stuge wrote: > > On Tue, Nov 14, 2006 at 01:43:13AM -0500, Corey wrote: > > > On Mon, 2006-11-13 at 17:45 +0100, Shaddam Corrino IV wrote: > > > > I was looking around today and all that I could find was "certified > > > > pre-owned" 256KiB flash ROMs for around $6 each. > > > > [..] > > > > > board). Did manage to find out that FrozenCPU.com carries the Bios > > > Saviors, and I've never had a bad experience with them, I've used > > > them several times over the years, and when you figure in shipping, > > > they're quite a bit cheaper than direct from ioss. > > > > The BIOS savior $25 is definately worthwhile. Zero risk of shorting > > the mainboard out while hotswapping flash chips then. > > > > > > //Peter > > > ================================================== > Hello, > > I have been communicating with the Linuxbios mailing list on and off > (mostly off lately). I'm interested to try out the linuxBIOS on my old > dual CPU board MSI-6120. The current MSI/AMI BIOS V2.0 does not support > newer CPUs than Coppermine. > > Currently I have two old PII processors (Mendocino) installed and would > like to upgrade to one Celeron 2 or dual PIIIs (Tualatin) using one or > two "Upgradeware SLOT-T" slot 1 to socket 370 adapters. A 1.3GHz Celeron > 2 boots with this new CPU but runs _extremely_ slow, at around 8MHz > compared to expected 1.3GHz. This has been reported before in the thread > 'Level 2 cache activation code' in late 2003. > > Where can I purchase a replacement BIOS chip? Placed in a socket on the > main board is a 2x16 pin DIL labeled: 686 AMI BIOS 1995 CS 92222. > > lspci shows: > 0000:00:00.0 Host bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX Host > bridge (rev 03) > 0000:00:01.0 PCI bridge: Intel Corp. 440BX/ZX/DX - 82443BX/ZX/DX AGP > bridge (rev 03) > 0000:00:07.0 ISA bridge: Intel Corp. 82371AB/EB/MB PIIX4 ISA (rev 02) > 0000:00:07.1 IDE interface: Intel Corp. 82371AB/EB/MB PIIX4 IDE (rev 01) > 0000:00:07.2 USB Controller: Intel Corp. 82371AB/EB/MB PIIX4 USB (rev > 01) > 0000:00:07.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02) > 0000:00:0f.0 Ethernet controller: 3Com Corporation 3c905B 100BaseTX > [Cyclone] (rev 30) > 0000:00:10.0 Multimedia audio controller: Creative Labs SB Live! EMU10k1 > (rev 05) > 0000:00:10.1 Input device controller: Creative Labs SB Live! MIDI/Game > Port (rev 05) > 0000:01:00.0 VGA compatible controller: Matrox Graphics, Inc. MGA G400 > AGP (rev 04) > > ======================================================= > On Wed, 2005-01-12 at 18:12 +0100, Peter Stuge wrote: > > On Wed, Jan 12, 2005 at 10:38:57AM +0100, Svante Signell wrote: > > > Where can I purchase a replacement BIOS chip? Placed in a socket on > > > the main board is a 2x16 pin DIL labeled: 686 AMI BIOS 1995 CS > > > 92222. > > > > Please remove the shiny sticker and check how the actual package is > > marked. You're looking for thin letters and numbers "engraved" on > > top of the black plastic. Look for 29F020 or something similar. > > I found the BIOS chip brand and version: Its a Winbond W29C020-90 > (84400M282325601VA). Any suppliers available somehere? > Is it large enough to host LinuxBIOS? > > My dual-CPU MSI-6120 MOBO has on-board dual channel Adaptec 7895 SCSI > support. Does V1 support this? What about the FSB settings avalaible in > the MSI/AMI BIOS v2.0: 100MHz, 103MHz, 112MHz, 133MHz? > It would be nice to run the board at 133MHz, eqipped with an 1.4GHz > Tualatin Celeron 2 or dual PIIIs. (Or VIA C3 1.0-1.4GHz, currently > single CPU, and hopefully soon dual CPU) > > =========================================================== > On Thu, 2005-01-13 at 16:23 -0600, Richard Smith wrote: > ... > > > > > > no idea on the FSB settings -- I think linuxbios always goes with > the > > > fastest :-) > > > > The FSB is set via the clock chip. The clock chip we have is set via > > straps. I'm not sure what your commercial bios is doing but the 440bx > > is not rated for over 100Mhz. So those other settings are > > overclockings. And they will change the speed of your PCI bus as > > well. > > I know about the 100MHz rating for 440BX. However, on the board you can > select 66/100 MHz FSB and the BIOS supports the higher FSB speeds. Also > the board has multiplier settings (3-5) x (66,100) MHz = 200-500 MHz for > CPUs with changable clock multipliers. The board runs today with dual > Celeron (Mendocino, 300MHz, before Intel disabled dual on Celerons) at > 103/66*300MHz = 466MHz stably for many years now. > > BTW: The memories I have installed are all PC133 parts. > > > I suspect your board has a small microcontroller on it with eeprom > > that sets the strap settings on boot and then de-asserts reset. That > > or it boots in 66Mhz and then sets the clock chip after that. > > > > Anybody know what clock chip is on that board? > > Where to look for that chip? > > The board also has a system manager jumper: Selectable between the > SuperIO chip (default) vs. the PIIX4E (southbridge). Wht is the meaning > of this choice? > > I have the board description in pdf-format available if someone is > interested. > -- Svante Signell <svante.signell(a)telia.com>

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[LinuxBIOS] what is i2cmux2?
by Tom Sylla 13 Nov '06

13 Nov '06

As part of Broadcom Blast, yhlu checked in a new i2c mux file, i2cmux2. I see a one line addition: smbus_write_byte(dev, 0x03, 0); // all output What is this for? Is required for the HT1000? or is it required for the particular mux on the Blast platform? Can that answer be documented somewhere? Is there a better way to do this than to duplicate and stick on a '2'? Thanks

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[LinuxBIOS] SMSC FDC37B80x & FDC37M707 code
by Corey Osgood 13 Nov '06

13 Nov '06

If anyone needs code for either of these two SuperIOs, let me know, I've ported the lpc47b397 code and it should work fine, but I don't want to go submitting it until it's tested, and the only boards I have with these chips are 440bx based. BTW, have there been any requests for Slot A Athlon support, namely the AMD 751 northbridge and Via 686a southbridge chips? I'm seriously considering working on all 3 of these, just acquired a board (FIC SPII) and a couple extra BIOS chips that I'm sure can be forced to work, although the DOS flasher doesn't like them.

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Re: [LinuxBIOS] RAM controller breakage?
by Uwe Hermann 13 Nov '06

13 Nov '06

Hi, [I suppose this was meant to go to the mailing list, forwarding...] On Sun, Nov 12, 2006 at 07:45:29AM +0300, Al Boldi wrote: > Uwe Hermann wrote: > > On Sat, Nov 11, 2006 at 10:54:49AM -0500, Corey Osgood wrote: > > > And did you start from scratch, or modify the > > > code that was already there? > > > > Both, partly. I don't want to do further cut'n'paste programming, > > there's enough of that in the tree already. I started mostly from > > scratch and tried to properly document the code. Some parts I'll reuse > > from the E7501 I guess, and the real know-how is in the V1 440BX code > > (which is working fine for me on my hardware, btw). > > I downloaded LBv1, but it doesn't compile out of the box. > > Is there a special setup/config required to compile it? Yeah, the code and build system is quite old. I had to fix a few things in various Makefiles and comment some broken code. Don't remember the details right now. Not sure whether it makes sense to commit more stuff to v1, even if it's just bugfixes... > > > And a final question for anyone, if I were to do a flash and it not go > > > well, do failsafes like key combonations to pull a bios off a floppy > > > still work, or are those stored in the BIOS? > > > > Won't work, see Ron's post. I have a local svn repository where I > > checkin all my proprietary BIOS images, so I won't lose them no matter > > how much I mess up. > > And I put one or more backups of them on real physical chips, of course. > > If it's of any help, I have a DualBIOS i440bx system, which should make it > easy to try any untested code. Sure, the more testers the better. I'll need a few more days to finish the code, though. > Thanks for your outstanding effort! > > -- > Al Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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[LinuxBIOS] 答复: MSI K9N Neo support for LinuxBIOS?
by bxshi＠msik.com.cn 12 Nov '06

12 Nov '06

Dear all, Sorry . please contact their PM andrewchang(a)msi.com.tw laurayan(a)msik.com.cn bxshi -----邮件原件----- 发件人: bxshi(石炳勛=研發) 发送时间: 2006年11月10日 14:24 收件人: owenchen(陳慶濃=研發) 抄送: 'Carl-Daniel Hailfinger'; 'rminnich(a)gmail.com'; 'yinghai.lu(a)amd.com'; 'stepan(a)coresystems.de'; 'uwe(a)hermann-uwe.de'; 'linuxbios(a)linuxbios.org' 主题: 答复: MSI K9N Neo support for LinuxBIOS? Dear Owen , There are several experts from all of world are planning to port it . I will introduce you to them . I think when they are porting ,they may need some datasheet.etc. I may not be able to port it myself ,because I am busy with MS-9182 linuxbios porting. More detail please see www.linuxbios.org Dear carl-Daniel ,Stefan ,Yinghai,ron,uwe, Owen is our Desktop BIOS manager , if you need some help of MSI K9N Nero ,you can contact with him .He is preparing help . Thanks bxshi -----邮件原件----- 发件人: owenchen [mailto:owenchen@msik.com.cn] 发送时间: 2006年11月10日 14:04 收件人: bxshi(石炳勛=研發) 抄送: 'Carl-Daniel Hailfinger' 主题: RE: MSI K9N Neo support for LinuxBIOS? Dear BxShi What I can do a favor to you? And tell me the K9N Neo model's name? thanks -----Original Message----- From: bxshi [mailto:bxshi@msik.com.cn] Sent: Friday, November 10, 2006 10:46 AM To: owenchen(陳慶濃=研發) Cc: 'Carl-Daniel Hailfinger' Subject: 转发: MSI K9N Neo support for LinuxBIOS? Dear Owen , Linuxbios Community is interested in MSI K9N Neo, and they are planning to port linuxbios for it .could you please give them some help ? Many people are like this board if it has linuxbios support. -----邮件原件----- 发件人: Carl-Daniel Hailfinger [mailto:c-d.hailfinger.devel.2006@gmx.net] 发送时间: 2006年11月9日 23:29 收件人: bxshi(a)msik.com.cn 抄送: LinuxBIOS 主题: MSI K9N Neo support for LinuxBIOS? Hi bxshi, would you help us port LinuxBIOS to the MSI K9N Neo? http://cweb.msi.com.tw/program/products/mainboard/mbd/pro_mbd_detail.php?UID =733 http://www.msi.com.tw/program/products/mainboard/mbd/pro_mbd_detail.php?UID= 733 It is a good and cheap board and a few of us will buy it to port LinuxBIOS to it, but we need your support. Regards, Carl-Daniel *****CONFIDENTIAL INFORMATION***** This email is intended only for the use of the person or entity to whom it is addressed and contains information that may be subject to and/or may be restricted from disclosure by contract or applicable law. If you are not the intended recipient of this email, be advised that any disclosure, copy, distribution or use of the contents of this message is strictly prohibited. If you are not the intended recipient of this email, please notify the sender that you have received this in error by replying to this message. Then, please delete it from your system. Thank you.

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[LinuxBIOS] RAM controller breakage?
by Uwe Hermann 11 Nov '06

11 Nov '06

Hi, I'm just a bit curious - are there settings/registers in northbridges which can seriously brick a mainboard and/or RAM (physically) if abused properly? I'll start testing my 440BX code soon, so I'd like to know what I have to expect... Uwe. -- http://www.hermann-uwe.de | http://www.holsham-traders.de http://www.crazy-hacks.org | http://www.unmaintained-free-software.org

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[LinuxBIOS] glue, anyone?
by Corey Osgood 11 Nov '06

11 Nov '06

Anyone have any experience with controlling FSB controlled by a Glue Logic chip? I can't seem to find any code for it in LinuxBIOS, but maybe *fingers crossed here* it detects and configures the CPU all on its own. Thanks Richard for reminding me about that. Corey

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coreboot November 2006