coreboot October 2006

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208 discussions

[LinuxBIOS] Configuring PCI devices
by Ed Swierk 06 Oct '06

06 Oct '06

I'm working on porting LinuxBIOS to an AM2+MCP55-based mainboard (DFI LANParty UT NF590) using the latest AMD Rev F and MCP55 southbridge code from svn. I replaced most of the CK804 PCI device IDs with their MCP55 counterparts, and put the following in my mainboard Config.lb: chip northbridge/amd/amdk8/root_complex device apic_cluster 0 on chip cpu/amd/socket_AM2 device apic 0 on end end end device pci_domain 0 on chip northbridge/amd/amdk8 #mc0 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 chip southbridge/nvidia/ck804 device pci a.0 on end device pci a.1 on end device pci c.0 on end end end # device pci 18.0 device pci 18.0 on end # Link 1 device pci 18.0 on end # Link 2 device pci 18.1 on end device pci 18.2 on end device pci 18.3 on end end #mc0 end # pci_domain end # root_complex Obviously this is not quite right, since I get the following output during boot: Jumping to LinuxBIOS. LinuxBIOS-2.0.0-FILO Thu Oct 5 11:34:43 PDT 2006 booting... Enumerating buses... APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 enabled PCI: 00:18.3 siblings=1 CPU: APIC: 00 enabled CPU: APIC: 01 enabled PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled PCI: 00:1e.0 [10de/0369] enabled PCI: 00:1f.0 [10de/0360] enabled PCI: 00:1f.1 [10de/0368] enabled PCI: 00:1f.2 [10de/036a] enabled Disabling static device: PCI: 00:0a.0 PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [10de/036c] enabled PCI: 00:00.1 [10de/036d] enabled PCI: 00:0a.0 PCI: 00:0a.1 PCI: 00:0c.0 PCI: Left over static devices. Check your Config.lb I'm pretty fuzzy on what exactly belongs in the device/chip section of the Config.lb, and how this affects the PCI device enumeration during boot (e.g. how did device 10de:036c get mapped to 00:00.0?). Is there a document that explains this? I've attached the output of lspci (using the factory BIOS), as well as my modified pci_ids.h and cache_as_ram_auto.c. Any pointers would be appreciated. --Ed

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Re: [LinuxBIOS] [PATCH] Download payload from console via XMODEM
by Lu, Yinghai 06 Oct '06

06 Oct '06

Can you move the xmodemTransmit and two mains etc to another file in util dir? Also could add print out seconds used... 4Mbyte will need 4*1024*1024*10/115200 = 364s... USB ROM emulator is very convient. YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Ed Swierk Sent: Thursday, October 05, 2006 5:42 PM To: LinuxBIOS Subject: [LinuxBIOS] [PATCH] Download payload from console via XMODEM The attached patch adds a new option, CONFIG_XMODEM_ROM_STREAM, that allows LinuxBIOS to download its payload from the console via the XMODEM file transfer protocol. This is handy if you want to try out a payload that's too big to fit into ROM, and you haven't yet gotten IDE or USB devices to work. I chose to hook this into the ROM stream code so it can take advantage of the usual compression methods, but one could imagine moving it to a separate "serial stream" mechanism. Comments are welcome. --Ed

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Re: [LinuxBIOS] Configuring PCI devices
by Lu, Yinghai 05 Oct '06

05 Oct '06

The build tools will create on static.c that includes static devices. The hypertransport_scan_chain() will take some static devices from the device list and match them with probed device. So the probed device can get extra setting from the static device. The device num is adjusted according to ht unit base id too at that time. YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Ed Swierk Sent: Thursday, October 05, 2006 12:01 PM To: LinuxBIOS Subject: [LinuxBIOS] Configuring PCI devices I'm working on porting LinuxBIOS to an AM2+MCP55-based mainboard (DFI LANParty UT NF590) using the latest AMD Rev F and MCP55 southbridge code from svn. I replaced most of the CK804 PCI device IDs with their MCP55 counterparts, and put the following in my mainboard Config.lb: chip northbridge/amd/amdk8/root_complex device apic_cluster 0 on chip cpu/amd/socket_AM2 device apic 0 on end end end device pci_domain 0 on chip northbridge/amd/amdk8 #mc0 device pci 18.0 on # northbridge # devices on link 0, link 0 == LDT 0 chip southbridge/nvidia/ck804 device pci a.0 on end device pci a.1 on end device pci c.0 on end end end # device pci 18.0 device pci 18.0 on end # Link 1 device pci 18.0 on end # Link 2 device pci 18.1 on end device pci 18.2 on end device pci 18.3 on end end #mc0 end # pci_domain end # root_complex Obviously this is not quite right, since I get the following output during boot: Jumping to LinuxBIOS. LinuxBIOS-2.0.0-FILO Thu Oct 5 11:34:43 PDT 2006 booting... Enumerating buses... APIC_CLUSTER: 0 enabled PCI_DOMAIN: 0000 enabled PCI: 00:18.3 siblings=1 CPU: APIC: 00 enabled CPU: APIC: 01 enabled PCI: pci_scan_bus for bus 00 PCI: 00:18.0 [1022/1100] enabled PCI: 00:18.1 [1022/1101] enabled PCI: 00:18.2 [1022/1102] enabled PCI: 00:18.3 [1022/1103] enabled PCI: 00:1e.0 [10de/0369] enabled PCI: 00:1f.0 [10de/0360] enabled PCI: 00:1f.1 [10de/0368] enabled PCI: 00:1f.2 [10de/036a] enabled Disabling static device: PCI: 00:0a.0 PCI: pci_scan_bus for bus 00 PCI: 00:00.0 [10de/036c] enabled PCI: 00:00.1 [10de/036d] enabled PCI: 00:0a.0 PCI: 00:0a.1 PCI: 00:0c.0 PCI: Left over static devices. Check your Config.lb I'm pretty fuzzy on what exactly belongs in the device/chip section of the Config.lb, and how this affects the PCI device enumeration during boot (e.g. how did device 10de:036c get mapped to 00:00.0?). Is there a document that explains this? I've attached the output of lspci (using the factory BIOS), as well as my modified pci_ids.h and cache_as_ram_auto.c. Any pointers would be appreciated. --Ed

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Re: [LinuxBIOS] FW: rev F support code
by Lu, Yinghai 05 Oct '06

05 Oct '06

The abuild will create one config.lb for test. The config will include fallback + normal. Normal image can not use reset16.lds, because reset16.lds need to make sure _start in last 64K near 4G. When Normal together fallback images there, it can not make it happen. YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Ed Swierk Sent: Thursday, October 05, 2006 11:07 AM To: LinuxBIOS Subject: Re: [LinuxBIOS] FW: rev F support code On 10/5/06, Lu, Yinghai <yinghai.lu(a)amd.com> wrote: > Then you should modify Config.lb in targets dir. Can you be a bit more specific? It's not clear to me what is currently broken. --Ed -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.openbios.org/mailman/listinfo/linuxbios

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Re: [LinuxBIOS] FW: rev F support code
by Lu, Yinghai 05 Oct '06

05 Oct '06

Then you should modify Config.lb in targets dir. YH -----Original Message----- From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Ed Swierk Sent: Thursday, October 05, 2006 10:41 AM To: LinuxBIOS Subject: Re: [LinuxBIOS] FW: rev F support code On 10/5/06, Lu, Yinghai <yinghai.lu(a)amd.com> wrote: > http://www.openbios.org/viewcvs/trunk/LinuxBIOSv2/src/mainboard/emulatio > n/qemu-i386/Config.lb?r1=2127&r2=2402 > > Ron modified. That was a patch I submitted a few weeks back. As I said in the accompanying email, I couldn't figure out the purpose of fallback image support for the qemu target or how to configure things so that the final ROM has only one image in it (fallback or not), so I removed the fallback stuff. --Ed -- linuxbios mailing list linuxbios(a)linuxbios.org http://www.openbios.org/mailman/listinfo/linuxbios

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Re: [LinuxBIOS] ACPI NVS and last 64k-ish area of RAM?
by Lu, Yinghai 05 Oct '06

05 Oct '06

What's your total RAM installed? 4G or more. With HW memory hole enable? YH ________________________________ From: linuxbios-bounces(a)linuxbios.org [mailto:linuxbios-bounces@linuxbios.org] On Behalf Of Alan Mimms Sent: Wednesday, October 04, 2006 11:28 AM To: linuxbios(a)linuxbios.org Subject: [LinuxBIOS] ACPI NVS and last 64k-ish area of RAM? We have AMD dual Opteron hardware with AMD 8131+8111 chipsets attached. Using LinuxBIOS, we have a slight problem, that APPEARS to be related to the last 64Kbytes of RAM. Our kboot based environment, running in 32 bit instruction set, seems to randomly crash, and the implicated area of memory is this last 64KB. When we run a commercial BIOS on nearly identical hardware, we see that that BIOS has created in the E820 table an ACPI Non-Volatile-Storage area covering this last 64KB. LinuxBIOS is NOT doing that; LinuxBIOS is treating all of the space as simple USABLE space. In trying to figure this out, we have used the AMD HDT tool to read the last 64KB. We (SOMETIMES) the system crashes when we read this area using HDT. Can someone please explain what this area is for and why it's strange to read even using a hardware debugging tool? Is it REALLY in use for the ACPI NVS, and can we simply tell Linux to ignore it (map it out) by creating an entry in E820 table so it won't be used (we don't use ACPI suspend/resume)? Thanks very much for any information. Alan Mimms, Senior Architect F5 Networks, Inc. Spokane Development Center 1322 North Whitman Lane Liberty Lake, Washington 99019 v: 509-343-3524 f: 509-343-3501

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Re: [LinuxBIOS] FW: rev F support code
by Lu, Yinghai 05 Oct '06

05 Oct '06

No. Your MB Config.lb is using reset16.*. So it only can be used for fallback. I removed "cut rom code into last 64k" in ldscript.lb. Also I added Config-abuild.lb for qemu-i386. and abuild is happy again. YH -----Original Message----- From: Stefan Reinauer [mailto:stepan@coresystems.de] Sent: Wednesday, October 04, 2006 4:12 PM To: Lu, Yinghai Cc: linuxbios(a)linuxbios.org Subject: Re: [LinuxBIOS] FW: rev F support code * Lu, Yinghai <yinghai.lu(a)amd.com> [061004 22:50]: > Can you check abuild with emulation/qemu-i386? > It will create fallback and normal, and normal will use reset16. > > I assume you need to let abuild to create one config that only include > fallback section. So you broke using a normal image? -- coresystems GmbH * Brahmsstr. 16 * D-79104 Freiburg i. Br. Tel.: +49 761 7668825 * Fax: +49 761 7664613 Email: info(a)coresystems.de * http://www.coresystems.de/

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Re: [LinuxBIOS] r2439 - in trunk/LinuxBIOSv2/src: arch/i386/include/arch arch/i386/lib config console cpu/amd/car cpu/amd/model_fxx devices drivers/i2c/adm1027 include/cpu/amd lib mainboard/Iwill/DK8HTX mainboard/amd/serengeti_cheetah mainboard/amd/sereng
by Lu, Yinghai 05 Oct '06

05 Oct '06

That is for MMIO config and PCI segment for PCIE and MMCONFIG later. YH

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[LinuxBIOS] r2445 - in trunk/LinuxBIOSv2/src: mainboard/agami/aruma mainboard/amd/serengeti_leopard mainboard/sunw/ultra40 mainboard/tyan/s2850 mainboard/tyan/s2875 mainboard/tyan/s2880 mainboard/tyan/s2881 mainboard/tyan/s2882 mainboard/tyan/s2885 mainboard/tyan/s2891 mainboard/tyan/s2892 mainboard/tyan/s2895 mainboard/tyan/s4880 mainboard/tyan/s4882 northbridge/amd/amdk8
by svn＠openbios.org 05 Oct '06

05 Oct '06

Author: yhlu Date: 2006-10-05 08:59:56 +0200 (Thu, 05 Oct 2006) New Revision: 2445 Modified: trunk/LinuxBIOSv2/src/mainboard/agami/aruma/cache_as_ram_auto.c trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_leopard/auto.c trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/auto.c trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/cache_as_ram_auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s2850/cache_as_ram_auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s2875/cache_as_ram_auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s2880/cache_as_ram_auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s2881/auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/cache_as_ram_auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s2885/auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s2891/auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s2892/auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s2895/auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s4880/cache_as_ram_auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s4882/auto.c trunk/LinuxBIOSv2/src/mainboard/tyan/s4882/cache_as_ram_auto.c trunk/LinuxBIOSv2/src/northbridge/amd/amdk8/raminit.c Log: K8_4RANK to QRANK Modified: trunk/LinuxBIOSv2/src/mainboard/agami/aruma/cache_as_ram_auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/agami/aruma/cache_as_ram_auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/agami/aruma/cache_as_ram_auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -8,7 +8,7 @@ #endif //use by raminit -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 //used by incoherent_ht //#define K8_SCAN_PCI_BUS 1 Modified: trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_leopard/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_leopard/auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/amd/serengeti_leopard/auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -129,7 +129,7 @@ } //#include "northbridge/amd/amdk8/setup_resource_map.c" -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #if 0 Modified: trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -91,7 +91,7 @@ return smbus_read_byte(device, address); } -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #if 0 Modified: trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/cache_as_ram_auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/cache_as_ram_auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/sunw/ultra40/cache_as_ram_auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -6,7 +6,7 @@ //#define K8_SCAN_PCI_BUS 1 -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2850/cache_as_ram_auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2850/cache_as_ram_auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2850/cache_as_ram_auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -79,8 +79,6 @@ return smbus_read_byte(device, address); } -#define K8_4RANK_DIMM_SUPPORT 1 - #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/resourcemap.c" #include "northbridge/amd/amdk8/coherent_ht.c" Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2875/cache_as_ram_auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2875/cache_as_ram_auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2875/cache_as_ram_auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -68,7 +68,7 @@ return smbus_read_byte(device, address); } -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2880/cache_as_ram_auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2880/cache_as_ram_auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2880/cache_as_ram_auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -69,7 +69,7 @@ return smbus_read_byte(device, address); } -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/resourcemap.c" Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2881/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2881/auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2881/auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -107,7 +107,7 @@ } //#include "northbridge/amd/amdk8/setup_resource_map.c" -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -108,7 +108,7 @@ } #include "northbridge/amd/amdk8/setup_resource_map.c" -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/resourcemap.c" #include "northbridge/amd/amdk8/coherent_ht.c" Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/cache_as_ram_auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/cache_as_ram_auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2882/cache_as_ram_auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -68,7 +68,7 @@ return smbus_read_byte(device, address); } -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/resourcemap.c" Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2885/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2885/auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2885/auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -106,7 +106,7 @@ } //#include "northbridge/amd/amdk8/setup_resource_map.c" -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #if 0 Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2891/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2891/auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2891/auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -69,7 +69,7 @@ return smbus_read_byte(device, address); } -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2892/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2892/auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2892/auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -69,7 +69,7 @@ return smbus_read_byte(device, address); } -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "sdram/generic_sdram.c" Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s2895/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s2895/auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s2895/auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -91,7 +91,7 @@ return smbus_read_byte(device, address); } -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #if 0 Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s4880/cache_as_ram_auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s4880/cache_as_ram_auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s4880/cache_as_ram_auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -83,7 +83,7 @@ return smbus_read_byte(device, address); } -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s4882/auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s4882/auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s4882/auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -115,7 +115,7 @@ } #include "northbridge/amd/amdk8/setup_resource_map.c" -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #if 0 #define ENABLE_APIC_EXT_ID 1 Modified: trunk/LinuxBIOSv2/src/mainboard/tyan/s4882/cache_as_ram_auto.c =================================================================== --- trunk/LinuxBIOSv2/src/mainboard/tyan/s4882/cache_as_ram_auto.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/mainboard/tyan/s4882/cache_as_ram_auto.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -92,7 +92,7 @@ return smbus_read_byte(device, address); } -#define K8_4RANK_DIMM_SUPPORT 1 +#define QRANK_DIMM_SUPPORT 1 #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" Modified: trunk/LinuxBIOSv2/src/northbridge/amd/amdk8/raminit.c =================================================================== --- trunk/LinuxBIOSv2/src/northbridge/amd/amdk8/raminit.c 2006-10-05 06:24:21 UTC (rev 2444) +++ trunk/LinuxBIOSv2/src/northbridge/amd/amdk8/raminit.c 2006-10-05 06:59:56 UTC (rev 2445) @@ -17,8 +17,8 @@ # error "CONFIG_LB_MEM_TOPK must be a power of 2" #endif -#ifndef K8_4RANK_DIMM_SUPPORT -#define K8_4RANK_DIMM_SUPPORT 0 +#ifndef QRANK_DIMM_SUPPORT +#define QRANK_DIMM_SUPPORT 0 #endif #if defined (__GNUC__) @@ -631,7 +631,7 @@ unsigned long side2; unsigned long rows; unsigned long col; -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 unsigned long rank; #endif }; @@ -645,7 +645,7 @@ sz.side2 = 0; sz.rows = 0; sz.col = 0; -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 sz.rank = 0; #endif @@ -689,7 +689,7 @@ if ((value != 2) && (value != 4 )) { goto val_err; } -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 sz.rank = value; #endif @@ -718,7 +718,7 @@ sz.side2 = 0; sz.rows = 0; sz.col = 0; -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 sz.rank = 0; #endif out: @@ -766,7 +766,7 @@ /* Set the appropriate DIMM base address register */ pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+0)<<2), base0); pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+1)<<2), base1); -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 if(sz.rank == 4) { pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+4)<<2), base0); pci_write_config32(ctrl->f2, DRAM_CSBASE + (((index << 1)+5)<<2), base1); @@ -777,7 +777,7 @@ if (base0) { dch = pci_read_config32(ctrl->f2, DRAM_CONFIG_HIGH); dch |= DCH_MEMCLK_EN0 << index; -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 if(sz.rank == 4) { dch |= DCH_MEMCLK_EN0 << (index + 2); } @@ -800,7 +800,7 @@ map = pci_read_config32(ctrl->f2, DRAM_BANK_ADDR_MAP); map &= ~(0xf << (index * 4)); -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 if(sz.rank == 4) { map &= ~(0xf << ( (index + 2) * 4)); } @@ -811,7 +811,7 @@ if (sz.side1 >= (25 +3)) { if(is_cpu_pre_d0()) { map |= (sz.side1 - (25 + 3)) << (index *4); -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 if(sz.rank == 4) { map |= (sz.side1 - (25 + 3)) << ( (index + 2) * 4); } @@ -819,7 +819,7 @@ } else { map |= cs_map_aa[(sz.rows - 12) * 5 + (sz.col - 8) ] << (index*4); -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 if(sz.rank == 4) { map |= cs_map_aa[(sz.rows - 12) * 5 + (sz.col - 8) ] << ( (index + 2) * 4); } @@ -1538,7 +1538,7 @@ } #if 0 //down speed for full load 4 rank support -#if K8_4RANK_DIMM_SUPPORT +#if QRANK_DIMM_SUPPORT if(dimm_mask == (3|(3<<DIMM_SOCKETS)) ) { int ranks = 4; for(i = 0; (i < 4) && (ctrl->channel0[i]); i++) { @@ -1804,7 +1804,7 @@ { uint32_t dcl; int value; -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 int rank; #endif int dimm; @@ -1813,7 +1813,7 @@ return -1; } -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 rank = spd_read_byte(ctrl->channel0[i], 5); /* number of physical banks */ if (rank < 0) { return -1; @@ -1821,7 +1821,7 @@ #endif dimm = 1<<(DCL_x4DIMM_SHIFT+i); -#if K8_4RANK_DIMM_SUPPORT == 1 +#if QRANK_DIMM_SUPPORT == 1 if(rank==4) { dimm |= 1<<(DCL_x4DIMM_SHIFT+i+2); }

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[LinuxBIOS] r2443 build service
by LinuxBIOS information 05 Oct '06

05 Oct '06

Dear LinuxBIOS readers! This is the automated build check service of LinuxBIOS. The developer "yhlu" checked in revision 2443 to the LinuxBIOS source repository and caused the following changes: Change Log: make ppc happy for console Build Log: Compilation of embeddedplanet:ep405pc has been fixed Compilation of motorola:sandpointx3_altimus_mpc7410 has been fixed Compilation of totalimpact:briq has been fixed If something broke during this checkin please be a pain in yhlu's neck until the issue is fixed. If this issue is not fixed within 24h the revision will be backed out. Yours truely, LinuxBIOS automatic build system

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coreboot October 2006