coreboot February 2005

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irq_tables
by Gin 14 Feb '05

14 Feb '05

Does linux care the PCI IRQ tables created by LinuxBios? I thought it only look at the MP-table. gin

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totalimpact briq?
by Stefan Reinauer 14 Feb '05

14 Feb '05

Hi, how should the totalimpact briq target work? When I build it, I get an elf image as the resulting linuxbios.rom. Is this intended? Stefan

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RE: VGA option rom code broken?
by YhLu 12 Feb '05

12 Feb '05

That could solve some problem about font memory initilization. But I guess the problem is about Emulator, and Ron is digging that on S2885 now. With LinuxBIOS (enable VGA and copy that to RAM but don't run_BIOS) + test bios. Stefan, What's the onboard VGA? are your talking about onboard one? YH > -----Original Message----- > From: Stefan Reinauer [mailto:stepan@openbios.org] > Sent: Tuesday, February 08, 2005 12:53 PM > To: Li-Ta Lo > Cc: LinuxBIOS > Subject: Re: VGA option rom code broken? > > * Li-Ta Lo <ollie(a)lanl.gov> [050208 21:22]: > > YhLu reversed the order of apic_cluster and northbridge in > mainboard > > config file. Did you change your config file too? > > No, do I need to? What is the exact benefit except only > having to mention one apic_cluster? If this is the problem we > will have to change it in most ports I guess. > > Stefan > > > _______________________________________________ > Linuxbios mailing list > Linuxbios(a)clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios >

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Hi & 440lx chipset
by Paul Millar 12 Feb '05

12 Feb '05

Hi, Quick (cheeky) question: does LinuxBIOS support the 440LX chipset? MSI/AMI no longer support it (probably for some time now), and the most recent BIOS has some difficulty with "large" disks: anything much over 3G kills the boot sequence. Cheers, Paul. PS I'm getting a 404 when trying to fill in the help web-form: /cgi-bin/linuxbios/help.cgi not found. PPS output from lspci: 0000:00:00.0 Host bridge: Intel Corp. 440LX/EX - 82443LX/EX Host bridge (rev 03) 0000:00:01.0 PCI bridge: Intel Corp. 440LX/EX - 82443LX/EX AGP bridge (rev 03) 0000:00:07.0 ISA bridge: Intel Corp. 82371AB/EB/MB PIIX4 ISA (rev 02) 0000:00:07.1 IDE interface: Intel Corp. 82371AB/EB/MB PIIX4 IDE (rev 01) 0000:00:07.2 USB Controller: Intel Corp. 82371AB/EB/MB PIIX4 USB (rev 01) 0000:00:07.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 02) 0000:00:0e.0 Ethernet controller: Intel Corp. 82557/8/9 [Ethernet Pro 100] (rev08) 0000:00:0f.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (rev 10) 0000:00:10.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (rev 10) 0000:01:00.0 VGA compatible controller: ATI Technologies Inc 3D Rage IIC AGP (rev 3a)

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VIA EPIA FILO boot problems
by Spencer Stucki 11 Feb '05

11 Feb '05

I'm having problems getting filo to recognize any ide drive connected. Ultimately I'd like to boot off of a cf card. I'm using the default configs for via/epia/Config.ituner.filo.lb, except I turned up the console log level, changed RAM settings to PC133 and CL2 to match the ram... Here is the output from the console LinuxBIOS-1.1.7.0Normal Wed Feb 9 14:20:55 MST 2 87 is the comm register SMBus controller enabled vt8601 init starting 00000000 is the north 1106 0601 0120ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ LinuxBIOS-1.1.7.0Fallback Wed Feb 9 14:21:32 MST 2005 starting... vt8601 init starting Slot 00 is SDRAM 08000000 bytes x2 Slot 01 is empty Slot 02 is empty Slot 03 is empty vt8601 done FILO version 0.4.2 (root(a)duck.stoneflytech.com) Tue Feb 8 17:05:08 MST 2005 collect_sys_info: boot eax = 0xe1fb007 collect_sys_info: boot ebx = 0xfff62a0 collect_sys_info: boot arg = 0xfff62a0 malloc_diag: alloc: 0 bytes (0 blocks), free: 16376 bytes (1 blocks) malloc_diag: alloc: 24 bytes (1 blocks), free: 16352 bytes (1 blocks) collect_elfboot_info: Bootloader: elfboot collect_elfboot_info: Version: 1.3 malloc_diag: alloc: 40 bytes (2 blocks), free: 16336 bytes (1 blocks) collect_linuxbios_info: Searching for LinuxBIOS tables... find_lb_table: Found canidate at: 00000500 find_lb_table: header checksum o.k. find_lb_table: table checksum o.k. find_lb_table: recor collect_linuxbios_info: Found LinuxBIOS table at: 00000500 malloc_diag: alloc: 112 bytes (3 blocks), free: 16264 bytes (1 blocks) convert_memmap: 0x00000000000000 0x00000000000b8c 16 convert_memmap: 0x00000000000b8c 0x000000000ef474 1 convert_memmap: 0x000000000f0000 0x00000000000400 16 convert_memmap: 0x000000000f0400 0x0000000ff0fc00 1 collect_sys_info: 0000000000000b8c-00000000000f0000 collect_sys_info: 00000000000f0400-0000000010000000 collect_sys_info: RAM 256 MB relocate: Current location: 0x100000-0x12614 relocate: Relocating to 0xffd9eb0-0xffffff7... ok setup_timers: CPU 533 MHz pci_init: Scanning PCI: found 10 devices malloc_diag: alloc: 240 bytes (4 blocks), free: 16136 bytes (1 blocks) pci_init: 00:00.0 1106:0601 0600 00 pci_init: 00:01.0 1106:8601 0604 00 pci_init: 00:11.0 1106:8231 0601 00 pci_init: 00:11.1 1106:0571 0101 8f pci_init: 00:11.2 1106:3038 0c03 00 pci_init: 00:11.3 1106:3038 0c03 00 pci_init: 00:11.4 1106:8235 0000 00 pci_init: 00:11.5 1106:3058 0401 00 pci_init: 00:11.6 1106:3068 0780 00 pci_init: 00:12.0 1106:3065 0200 00 boot: hda1:/boot/imedia root=/dev/hda1 console=tty0 console=ttyS0,115200 malloc_diag: alloc: 320 bytes (5 blocks), free: 16056 bytes (1 blocks) malloc_diag: alloc: 336 bytes (6 blocks), free: 16040 bytes (1 blocks) file_open: dev=hda1, path=/boot/imedia find_ide_controller: found PCI IDE controller 1106:0571 prog_if=0x8f find_ide_controller: primary channel: native PCI mode find_ide_controller: cmd_base=0x0 ctrl_base=0x0 ide_software_reset: Waiting for ide0 to become ready for reset... ok IDE time out No drive detected on IDE channel 0 devopen: failed to open ide malloc_diag: alloc: 320 bytes (5 blocks), free: 16056 bytes (1 blocks) malloc_diag: alloc: 240 bytes (4 blocks), free: 16136 bytes (1 blocks) boot: hda1:/boot/imedia root=/dev/hda1 console=tty0 console=ttyS0,115200 Here's filo's config # Image filename for automatic boot and optional command line parameter AUTOBOOT_FILE = "hda1:/boot/imedia root=/dev/hda1 console=tty0 console=ttyS0,115200" # Time in second before booting AUTOBOOT_FILE AUTOBOOT_DELAY = 0 # Driver for hard disk, CompactFlash, and CD-ROM on IDE bus IDE_DISK = 1 # VGA text console VGA_CONSOLE = 0 PC_KEYBOARD = 1 # Serial console SERIAL_CONSOLE = 1 SERIAL_IOBASE = 0x3f8 SERIAL_SPEED = 115200 # Filesystems FSYS_EXT2FS = 1 FSYS_FAT = 1 FSYS_JFS = 1 FSYS_MINIX = 1 FSYS_REISERFS = 1 FSYS_XFS = 1 FSYS_ISO9660 = 1 # Support for boot disk image in bootable CD-ROM (El Torito) ELTORITO = 1 # PCI support SUPPORT_PCI = 1 # i386 options # Loader for standard Linux kernel image, a.k.a. /vmlinuz LINUX_LOADER = 1 # Use PCI Configuration Mechanism #1 (most boards) PCI_CONFIG_1 = 1

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Re: Via EPIA-MII ROM speed?
by Ronald G. Minnich 11 Feb '05

11 Feb '05

FILO load is very fast. FILO can be 32KB and it's coming out of flash. I would say for your purposes it is 0. FILO scanning for IDE will be fast on EPIA. The only real time kill is "spinning" up the hard drive, which on CF is also pretty quick. ron

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Re: Via EPIA-MII ROM speed?
by talbotx＠comcast.net 11 Feb '05

11 Feb '05

-Richard. Thank you for some real numbers. Ok, a few note to add to your very good description of the issue at hand. I found that my hard drive has a spin up time of about 3~5 seconds so thats out of the picture. Solved that issue by switching from a HDD to a Compact Flash (CF), no spin up, almost no seek time. The board (Via EPIA-MII) has a built on CF slot. Linux bios allowed me to boot from the CF. Also there is one other number we need to look at. How long does it take for FILO to load? I have no clue on numbers for FILO. The 2 step process LinuxBios à kernel (LBK), or the 3 set process, LinuxBios à FILO à kernel (LBFK). In the LBFK process all the transaction are faster, but the second step my slow down the process long enough to make the LBK process faster. I am not very sure here and there are still just ideas and I need to do some real testing. In the long run I may be forced to use LBFK as the smallest 2.6 kernel I have been able to compile comes in at 404k+linuxbios > ROM. I think 512KB is the biggest ROM chip out there that will work with this board. -Adam -------------- Original message -------------- > On Fri, 11 Feb 2005 08:32:43 -0800, Adam Talbot wrote: > > How fast is the ROM chip MB/s. In my case a SST 39SF020A 70-4C-NH. I was > > trying to figure out what would be faster... Linuxbios calling a 2.6 kernel > > off the hard drive, or loading my 2.6 kernel out of the rom file. I have the > > 512k rom chips, so I have room to add my kernel. If I put my kernel into > > the rom, can I just call it as a payload? > > -Adam > > Your challenge won't be loading speed but rather getting a kernel in 512k. > > That said my first guess is that in ROM is going to be much faster on > all but a few special cases but lets just do some math and see... > > For loading from the BIOS chip you are talking ISA cycles. Which is > approx 1uS per cycle but you are only going to get 8 bits at a time > unless you happend to have a 16-Bit flash. > > Lets neglect RAM speed since it should be the same in both cases. > > The string copy functions of x86 assembly will let you set up a block > memory move with basiclly no overhead. So you should be able to load > the entire ROM into a block of RAM in 525 mS. > > Reading from IDE will happen over the PCI bus which is much faster. I > don't really know what the actual cycle time of PCI is sine it varies > but the clock is 4 tims faster so lets assume we can get 4x the cycle > rate or 250 ns per cycle. Ide devices are 16 bit so we are going to > approx 8x the data rate. However, the HD involes a seek for every > 512 16 bit words. I don't think FILO takes advantage of the streaming > commands. So for every 1kb we are talking 128uS of data time and 10 > to 12 ms avg seek. so 512 x 12.128 mS give you 6.2 seconds. > > But thats a worst case number and neglects the cache of a modern HD. > If the HD is able to cache up the entire 512k so the seek times are 0 > then the number would have a low of .128 mS * 512 = 65mS. That's > negelecting the overhead with issuing the read commands to the IDE > device so in reality its higher than that. > > So the only answer is you have to test and see. Could be faster could > be slower. Also if you take in account harddisk spinup time from a > cold boot which is always going to be larger than .5s it in ROM will > be faster. But if you use something like a compact flash you don't > have the hd platter spinup time. Then its going to depend on the > device. > > I'd be intersted in hearing about your results. > > -- > Richard A. Smith

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Re: Via EPIA-MII ROM speed?
by talbotx＠comcast.net 11 Feb '05

11 Feb '05

-Ron You will have a copy of my 2.6 config... Now I got to see if I can pull this off. My kernel as it currently stands is 1.6MB A bit to big :-) -Adam -------------- Original message -------------- > yes, you can make the kernel the payload. > > if you get a kernel into 512kb, I want your .config file! > > ron >

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RE: VGA option rom code broken?
by YhLu 10 Feb '05

10 Feb '05

In my test the three failure mean can not work under text mode, and I can not test X mode. The AGP device and bridge (amd 8151...) register value in working one and failure one is the same. YH

1 0

RE: VGA option rom code broken?
by YhLu 10 Feb '05

10 Feb '05

The one works. --- AGP 2.0 ~ # lspci -vvxxx -s 2:0.0 02:00.0 VGA compatible controller: nVidia Corporation NV25GL [Quadro4 750 XGL] (rev a3) (prog-if 00 [VGA]) Subsystem: nVidia Corporation: Unknown device 0139 Control: I/O+ Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 16 Region 0: Memory at f0000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at e0000000 (32-bit, prefetchable) [size=128M] Region 2: Memory at e8000000 (32-bit, prefetchable) [size=512K] Expansion ROM at f1000000 [disabled] [size=128K] Capabilities: [60] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [44] AGP version 2.0 Status: RQ=31 SBA+ 64bit- FW+ Rate=x1,x2,x4 Command: RQ=0 SBA- AGP- 64bit- FW- Rate=<none> 00: de 10 59 02 03 00 b0 02 a3 00 00 03 00 40 00 00 10: 00 00 00 f0 08 00 00 e0 08 00 00 e8 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 39 01 30: 00 00 00 f1 60 00 00 00 00 00 00 00 00 01 05 01 40: de 10 39 01 02 00 20 00 17 02 00 1f 00 00 00 00 50: 01 00 00 00 01 00 00 00 ce d6 23 00 0f 00 00 00 60: 01 44 02 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 The one not works --- AGP 3.0 ~ # lspci -vvxxx -s 2:0.0 02:00.0 VGA compatible controller: nVidia Corporation NV35GL [Quadro FX 3000] (rev a1) (prog-if 00 [VGA]) Subsystem: nVidia Corporation: Unknown device 01c2 Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- Interrupt: pin A routed to IRQ 16 Region 0: Memory at f4000000 (32-bit, non-prefetchable) [size=16M] Region 1: Memory at e0000000 (32-bit, prefetchable) [size=256M] Expansion ROM at f5000000 [disabled] [size=128K] Capabilities: [60] Power Management version 2 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-) Status: D0 PME-Enable- DSel=0 DScale=0 PME- Capabilities: [44] AGP version 3.0 Status: RQ=31 SBA+ 64bit- FW+ Rate=x1,x2 Command: RQ=0 SBA- AGP- 64bit- FW- Rate=<none> 00: de 10 38 03 02 00 b0 02 a1 00 00 03 00 40 00 00 10: 00 00 00 f4 08 00 00 e0 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 de 10 c2 01 30: 00 00 00 f5 60 00 00 00 00 00 00 00 00 01 05 01 40: de 10 c2 01 02 00 30 00 1b 0e 00 1f 00 00 00 00 50: 00 00 00 00 01 00 00 00 ce d6 23 00 0f 00 00 00 60: 01 44 02 00 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

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coreboot February 2005