coreboot December 2005

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40 participants
73 discussions

Re: [LinuxBIOS] Gigabyte's DualBios and recovery from a botched Linuxbios flash?
by David Hendricks 28 Dec '05

28 Dec '05

Doesn't look like it: http://www.ioss.com.tw/web/English/RD1BIOSSavior/SelectionSheet.html Does your mainboard actually come with an 8mb chip? Looks like you might need to settle for 4mb if you require a BIOS Savior --David On Wed, 28 Dec 2005 04:43:17 -0600 "Young, Jeff" <Jeff.Young(a)gd-ais.com> wrote: > > I can't seem to find a BIOS Savior for an 8mb chip. Does it exist? > > Thanks, > Jeff Young

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Re: [LinuxBIOS] Gigabyte's DualBios and recovery from a botched Linuxbiosflash?
by sales＠bradbrown.com 28 Dec '05

28 Dec '05

I think I'll go with the replacement ZIF socket as described by Bari. I had no idea it was that easy to remove a TSOP device, so that approach never occured to me. I would consider another motherboard with socketed bios, but given the price constraints I'm forced to work in (sub $100, NForce4), it seems that most boards in that range have TSOP bioses. Also, I wanted to re-read the FAQ portions regarding flashing, but keep receiving a "A database query syntax error has occurred" error when I click on the FAQ link on the main LinuxBios.org website. I could not find a contact email (the help link was broken as well), so could one of you relay a "FAQ is down" message to the website maintainer? Thanks, Brad Brown Bari Ari wrote: >If there is enough room around the tsop flash device on the mainboard, >the flash device may be replaced by a ZIF tsop socket. Such as one by: > >http://www.emulation.com/catalog/off-the-shelf_solutions/sockets/tsop/ > >http://www.emulation.com/pdf/skt518.pdf > >The tsop zif sockets are larger than the tsop package so you need the >extra space to solder them in place. > >-Bari -------------------------------------------------------------------- mail2web - Check your email from the web at http://mail2web.com/ .

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[LinuxBIOS] Gigabyte's DualBios and recovery from a botched Linuxbios flash?
by sales＠bradbrown.com 28 Dec '05

28 Dec '05

I was preparing to flash an ECS NForce4-A939 motherboard with Linuxbios using advice I received earlier this week on this mailing list. Since the bios chip is a surface mount package, I have no easy way of restoring the original manufacturer bios image should I flash an invalid rom image to the motherboard. To minimize my risk, I planned to flash a Gigabyte motherboard with a similar chipset configuration, just to prove my image would theoreticaly work on the ECS board. This motherboard has something called Dualbios, which essentially allows you to boot from a secondary bios image should something go wrong. However, I noticed that to activate this feature and access the backup BIOS image, you had to enter the CMOS setup for the motherboard, whereas I initally assumed the backup mechanism was jumper activated. So my questions are: 1. Does anyone know if the Gigabyte Dualbios feature will still work once I flash the primary bios image with Linuxbios. If so, it would allow me to recover if my first image is bad. I don't see how it would work, since I assume Linuxbios will overwrite any recovery logic, rendering the backup bios image inaccessible. 2. Other than using a fallback image in my Linuxbios image, or using this Dualbios feature, are there any other economical ways to recover from a bad Linuxbios flash, when dealing with a non-socketed bios chip? I just have this sinking feeling that I'll flash my MB, and end up with a $75 brick, hence these questions... Thanks, Brad Brown -------------------------------------------------------------------- mail2web - Check your email from the web at http://mail2web.com/ .

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Re: [LinuxBIOS] Gigabyte's DualBios and recovery from a botched Linuxbios flash?
by Young, Jeff 28 Dec '05

28 Dec '05

I can't seem to find a BIOS Savior for an 8mb chip. Does it exist? Thanks, Jeff Young -----Original Message----- From: linuxbios-bounces(a)openbios.org [mailto:linuxbios-bounces@openbios.org] On Behalf Of David Hendricks Sent: Tuesday, December 27, 2005 11:03 PM To: sales(a)bradbrown.com Cc: linuxbios(a)openbios.org Subject: Re: [LinuxBIOS] Gigabyte's DualBios and recovery from a botched Linuxbios flash? MSI does the same thing with their dual BIOS approach--I found out the hard way from purchasing a K8N-Neo3. My advice is to avoid these gimmicky 0v3rc!0ck3r BIOSes and get a BIOS Savior RD-1 or something if you can get your hands on a socketed mainboard. Or, I think someone on this list (Bari Ari?) can modify your board to use socketed flash parts as well. --David -- LinuxBIOS mailing list LinuxBIOS(a)openbios.org http://www.openbios.org/mailman/listinfo/linuxbios

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Re: [LinuxBIOS] where do we stand
by Stefan Reinauer 27 Dec '05

27 Dec '05

* Young, Jeff <Jeff.Young(a)gd-ais.com> [051227 16:30]: > > Stefan, > I have tried several snapshots and none of them build correctly. > They > All have the same problem: > > /usr/lib/gcc-lib/i486-suse-linux/3.3/../../../../i486-suse-linux/bin/ld: > section .rodata.str1.32 [00000000fffbff80 -> 00000000fffc015a] overlaps > section .reset [00000000fffbfff0 -> 00000000fffbffff] > collect2: ld returned 1 exit status > make: *** [linuxbios] Error 1 > > Any ideas? The ROM_IMAGE_SIZE needs to be increased in the target Config.lb file I think. What SUSE distribution are you using? I've been compiling LinuxBIOS with gcc 3.3.x and 4.0.x for a while. 3.3 might generate larger code. Try setting ROM_IMAGE_SIZE to 0x20000. Stefan

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Re: [LinuxBIOS] where do we stand
by Young, Jeff 27 Dec '05

27 Dec '05

Stefan, I have tried several snapshots and none of them build correctly. They All have the same problem: /usr/lib/gcc-lib/i486-suse-linux/3.3/../../../../i486-suse-linux/bin/ld: section .rodata.str1.32 [00000000fffbff80 -> 00000000fffc015a] overlaps section .reset [00000000fffbfff0 -> 00000000fffbffff] collect2: ld returned 1 exit status make: *** [linuxbios] Error 1 Any ideas? Thanks, Jeff -----Original Message----- From: Stefan Reinauer [mailto:stepan@openbios.org] Sent: Monday, December 05, 2005 6:12 AM To: Young, Jeff Cc: linuxbios(a)openbios.org Subject: RE: [LinuxBIOS] where do we stand > > > Howdy, > Can I take it from this thread that the S2895 Tyan board will > not work now? I am just getting into this and was going to experiment > on the S2895. > > Thanks, > Jeff Young > The Tyan S2895 _should_ work with the current SVN tree, but it is still untested. This applies for most other boards in the latest tree. We'll gladly assist you if you are going to test this. As an option you can always choose a snapshot from 1.5 months ago. Stefan

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[LinuxBIOS] regarding pci sement num and extend reg
by yhlu 24 Dec '05

24 Dec '05

I suggest to change PCI_ADDR and PCI_DEV to followings #define PCI_ADDR(SEGBUS, DEV, FN, WHERE) ( \ (((SEGBUS) & 0xFFF) << 20) | \ (((DEV) & 0x1F) << 15) | \ (((FN) & 0x07) << 12) | \ ((WHERE) & 0xFFF)) #define PCI_DEV(SEGBUS, DEV, FN) ( \ (((SEGBUS) & 0xFFF) << 20) | \ (((DEV) & 0x1F) << 15) | \ (((FN) & 0x07) << 12)) So we can put extened reg pos together... pci read will become static inline __attribute__((always_inline)) uint32_t pci_read_config32(device_t dev, unsigned where) { unsigned addr; addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); outl(0x80000000 | (addr & ~3), 0xCF8); return inl(0xCFC); } static inline __attribute__((always_inline)) uint32_t pci_mmio_read_config32(device_t dev, unsigned where) { unsigned addr; addr = dev | where; return read32(addr); } static inline __attribute__((always_inline)) uint32_t pci_read_config32x(device_t dev, unsigned where) { if(dev & 0xf0000000) { return pci_mmio_read_config32(dev, where); } else { return pci_read_config32(dev, where); } } YH

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Re: [LinuxBIOS] Linuxbios on an ECS Nforce4-A939?
by Lu, Yinghai 23 Dec '05

23 Dec '05

1. you need to the datasheet for superior ITE IT7812F, and refer to other superio to add support for it. 2. copy tyan s2891 MB and target dir to create ecs/sth, and modify to support only one CPU... 3. modify superio etc in 2.... YH

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Re: [LinuxBIOS] Linuxbios on an ECS Nforce4-A939?
by Lu, Yinghai 23 Dec '05

23 Dec '05

Superio only have serial port support. IDE and SATA and USB... on NV Southbridge... YH

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[LinuxBIOS] Linuxbios on an ECS Nforce4-A939?
by sales＠bradbrown.com 23 Dec '05

23 Dec '05

Hello: Let me preface this by saying "Yes, I realize ECS is not the best manufacturer, but man they're cheap!" Before attempting a flash this board with Linuxbios, I'd like to get opinions on whether my motherboard should work correctly with Linux bios; by "work," I mean boot Linux from an IDE device using FILO ; although network or USB booting would be nice, I really only care about being able to boot from the hard drive or CD-rom. The lspci output is shown below the dotted line. Additional information: 1. Board is an ECS Nforce4-A939 with a Venice-core 3000 chip: http://www.ecs.com.tw/ECSWeb/Products/ProductsDetail.aspx?CategoryID=1&TypeI D=31&DetailID=493&MenuID=16&LanID=9 I know there is NForce4 support in Linuxbios, I just wasn't sure what beyond this support was actually needed to boot. Here's the rest in case it's relevant. 2. The SuperIO chip is: ITE IT8712F . I don't see this in the list of supported SuperIOs, so I assume the USB booting will be impossible, and serial output of boot output impossible. 3. Onboard Nic is: Marvell 88E1111 Giga LAN PHY. 4. Bios is: Award BIOS with 4Mb Flash ROM. The PLCC reads PhoenixBios D686 BIOS Thanks for your input. I will post my results for others. Thanks, Brad Brown ---------------------------------------------------------------------------- --------------- lspci output for target machine: 0000:00:00.0 Memory controller: nVidia Corporation: Unknown device 005e (rev a3) Subsystem: Elitegroup Computer Systems: Unknown device 1b51 Flags: bus master, 66MHz, fast devsel, latency 0 Capabilities: <available only to root> 0000:00:01.0 ISA bridge: nVidia Corporation: Unknown device 0050 (rev a3) Subsystem: Elitegroup Computer Systems: Unknown device 1b51 Flags: bus master, 66MHz, fast devsel, latency 0 0000:00:01.1 SMBus: nVidia Corporation: Unknown device 0052 (rev a2) Subsystem: Elitegroup Computer Systems: Unknown device 1b51 Flags: 66MHz, fast devsel, IRQ 3 I/O ports at fc00 [size=32] I/O ports at 4c00 [size=64] I/O ports at 4c40 [size=64] Capabilities: <available only to root> 0000:00:02.0 USB Controller: nVidia Corporation: Unknown device 005a (rev a2) (prog-if 10 [OHCI]) Subsystem: Elitegroup Computer Systems: Unknown device 1b51 Flags: bus master, 66MHz, fast devsel, latency 0, IRQ 21 Memory at febff000 (32-bit, non-prefetchable) [size=4K] Capabilities: <available only to root> 0000:00:02.1 USB Controller: nVidia Corporation: Unknown device 005b (rev a3) (prog-if 20 [EHCI]) Subsystem: Elitegroup Computer Systems: Unknown device 1b51 Flags: bus master, 66MHz, fast devsel, latency 0, IRQ 10 Memory at febfe000 (32-bit, non-prefetchable) [size=256] Capabilities: <available only to root> 0000:00:04.0 Multimedia audio controller: nVidia Corporation: Unknown device 0059 (rev a2) Subsystem: Elitegroup Computer Systems: Unknown device 1b51 Flags: bus master, 66MHz, fast devsel, latency 0, IRQ 23 I/O ports at f000 [size=256] I/O ports at ec00 [size=256] Memory at febfd000 (32-bit, non-prefetchable) [size=4K] Capabilities: <available only to root> 0000:00:06.0 IDE interface: nVidia Corporation: Unknown device 0053 (rev a2) (prog-if 8a [Master SecP PriP]) Subsystem: Elitegroup Computer Systems: Unknown device 1b51 Flags: bus master, 66MHz, fast devsel, latency 0 I/O ports at e000 [size=16] Capabilities: <available only to root> 0000:00:07.0 IDE interface: nVidia Corporation: Unknown device 0054 (rev a3) (prog-if 85 [Master SecO PriO]) Subsystem: Elitegroup Computer Systems: Unknown device 1b51 Flags: bus master, 66MHz, fast devsel, latency 0, IRQ 23 I/O ports at 09f0 [size=8] I/O ports at 0bf0 [size=4] I/O ports at 0970 [size=8] I/O ports at 0b70 [size=4] I/O ports at cc00 [size=16] Memory at febfb000 (32-bit, non-prefetchable) [size=4K] Capabilities: <available only to root> 0000:00:08.0 IDE interface: nVidia Corporation: Unknown device 0055 (rev a3) (prog-if 85 [Master SecO PriO]) Subsystem: Elitegroup Computer Systems: Unknown device 1b51 Flags: bus master, 66MHz, fast devsel, latency 0, IRQ 22 I/O ports at 09e0 [size=8] I/O ports at 0be0 [size=4] I/O ports at 0960 [size=8] I/O ports at 0b60 [size=4] I/O ports at b800 [size=16] Memory at febfa000 (32-bit, non-prefetchable) [size=4K] Capabilities: <available only to root> 0000:00:09.0 PCI bridge: nVidia Corporation: Unknown device 005c (rev a2) (prog-if 01 [Subtractive decode]) Flags: bus master, 66MHz, fast devsel, latency 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=32 I/O behind bridge: 0000a000-0000afff Memory behind bridge: fea00000-feafffff Prefetchable memory behind bridge: d8000000-dfffffff 0000:00:0a.0 Bridge: nVidia Corporation: Unknown device 0057 (rev a3) Subsystem: Elitegroup Computer Systems: Unknown device 1b51 Flags: bus master, 66MHz, fast devsel, latency 0, IRQ 20 Memory at febf9000 (32-bit, non-prefetchable) [size=4K] I/O ports at b400 [size=8] Capabilities: <available only to root> 0000:00:0b.0 PCI bridge: nVidia Corporation: Unknown device 005d (rev a3) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 00009000-00009fff Memory behind bridge: fe900000-fe9fffff Prefetchable memory behind bridge: 00000000fe800000-00000000fe800000 Capabilities: <available only to root> 0000:00:0c.0 PCI bridge: nVidia Corporation: Unknown device 005d (rev a3) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 I/O behind bridge: 00008000-00008fff Memory behind bridge: fe700000-fe7fffff Prefetchable memory behind bridge: 00000000fe600000-00000000fe600000 Capabilities: <available only to root> 0000:00:0d.0 PCI bridge: nVidia Corporation: Unknown device 005d (rev a3) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 I/O behind bridge: 00007000-00007fff Memory behind bridge: fe500000-fe5fffff Prefetchable memory behind bridge: 00000000fe400000-00000000fe400000 Capabilities: <available only to root> 0000:00:0e.0 PCI bridge: nVidia Corporation: Unknown device 005d (rev a3) (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=05, subordinate=05, sec-latency=0 I/O behind bridge: 00006000-00006fff Memory behind bridge: fe300000-fe3fffff Prefetchable memory behind bridge: 00000000fe200000-00000000fe200000 Capabilities: <available only to root> 0000:00:18.0 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge Flags: fast devsel Capabilities: <available only to root> 0000:00:18.1 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge Flags: fast devsel 0000:00:18.2 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge Flags: fast devsel 0000:00:18.3 Host bridge: Advanced Micro Devices [AMD] K8 NorthBridge Flags: fast devsel 0000:01:06.0 VGA compatible controller: ATI Technologies Inc Radeon RV100 QY [Radeon 7000/VE] (prog-if 00 [VGA]) Subsystem: PC Partner Limited: Unknown device 7c02 Flags: bus master, stepping, medium devsel, latency 32, IRQ 5 Memory at d8000000 (32-bit, prefetchable) [size=128M] I/O ports at ac00 [size=256] Memory at feaf0000 (32-bit, non-prefetchable) [size=64K] Capabilities: <available only to root> -------------------------------------------------------------------- mail2web - Check your email from the web at http://mail2web.com/ .

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coreboot December 2005