coreboot June 2004

coreboot@coreboot.org

43 participants
102 discussions

Porting Linux BIOS
by Michael Robinson 24 Jun '04

24 Jun '04

Hello, How much modification is typically involved in porting LinuxBIOS to a currently unsupported motherboard? I'd like to attempt (keyword) to do this on a motherboard not listed on your site. The major modifications are supporting the chipset and the memory type if they're not already supported, correct? Anyways, I'm going to attempt this and may (will) be asking for further help at later dates, LOL. Thanks, Michael Robinson mrobinson(a)fuzzymuzzle.com www.fuzzymuzzle.com

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FYI: I am rewriting cpu initialization....
by ebiederman＠lnxi.com 24 Jun '04

24 Jun '04

Since the freebios2 tree was started we have not revisited the cpu initialization code. And now that it seems there are little tweaks needed for every cpu rev, I am starting that process. So far I have just barely made a dent but I do have code that will accurately identify the cpu, and look up it's initialization routine. A goal is to allow building firmware that can support multiple vendors cpu in the same sockets, as is common in the socket 7 category. I'm not quite certain where I am going to wind up but I don't expect I will have anything in the public tree before next week. If anyone has some thoughts they want to share while I am reworking cpu initialization feel free to speak up. Eric

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AMD Opteron bug fix in BIOS
by Matt L. Leininger 23 Jun '04

23 Jun '04

The Inquirer is reporting that the Opteron bug announced earlier this week can be fixed by the BIOS. AMD has been supportive of LinuxBIOS. Anyone know if AMD has supplied the necessary information to get a fix into LinuxBIOS? http://www.theinquirer.net/?article=16774 Thanks, - Matt

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Re: Porting Linux BIOS
by Michael Robinson 23 Jun '04

23 Jun '04

If it came to that, I could desolder and resolder components (hardware hacking/construction is my specialty - http://www.fuzzymuzzle.com). What I really want to do though is buy a board on whether it supports my needs, not whether it currently supports LinuxBIOS. I'll check out the Tyans and see what they have. Thanks, Michael Robinson mrobinson(a)fuzzymuzzle.com www.fuzzymuzzle.com > > ron minnich wrote: > >> don't plan to solder flash parts and sockets on and off. For some >> parts it is almost impossible. >> The issue with Asus is not the flash part anyway, it's the hidden >> bits that control important functions like SPD. >> Any reason not to just go to tyan or cwlinux.com and buy a board with >> linuxbios installed? >> >> ron >> >> >> >> >> >> > >

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Doc translation
by Mathieu Deschamps 23 Jun '04

23 Jun '04

Hello LinuxBiosers, I have finish my reporting activities, i'am submiting my work. It is has been done during my training period of 2 months or so. This was a short time and maybe I'am not experimenced enough to give something to more experimenced people, but maybe not ;) Actually, this documentation is 'nowby' oriented, it's complete, from null cable making to kernel tweaking, and LinuxBios matter for sure. Stefan, indeed I don't know whatever it will stuff your initial papers which were one of my source. I submit it for 2 reasons : Because LinuxBios gives me, as a newbie, some real piece of hardness and some good piece of joy. I'd like to share this document so that the first could be reduce in the advantage of the second piece. Because it is a duty and a chance of OpenSource design, taking advantage of everybody experience twice : be quickly started and confirmed with BIOS developpement, and being commented/corrected when it's your go to release something. Nathanael, thanks for your proposition. I tryed to be as clear as possible, If you find difficulties, you can mail me. It is a great project to work on. I congratulate everybody that made it what it is now, and people at LANL that started and support it. Cordialy, mathieu

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Re: E7501 support in V2
by YhLu 22 Jun '04

22 Jun '04

After change some variable to const, the auto.c can be compiled. Any one would like to help to check the code? Steven James? Regards YH -----邮件原件----- 发件人: YhLu 发送时间: 2004年6月21日 10:54 收件人: ebiederman(a)lnxi.com 抄送: ron minnich; Stefan Reinauer; LinuxBIOS 主题: E7501 support in V2 Eric, I finish the translate raminit.inc to E7501. But in compiling stage, it used up the regs. In the K8, there is enable_mmx_sse.inc to enable cpu access more regs for romcc. So the problem is 1. Can I use the enable_mmx_sse.inc for Xeon without change? It has MMX and sse too. 2. how about the romcc cpu flag. Or just use -mcpu=k8? Regards YH _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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Re: Question about AGP (epia-m)
by Dave Ashley 22 Jun '04

22 Jun '04

>I haven't implemented this yet within linuxbios V1 but I will try it out and >post again. It's pretty irritating. When I turn 00.0 byte $88 bit 1 to 1, the MB locks up. Turning that bit on enables the graphics aperture. I'm going to just do it in a userspace program, which works fine. I can put this in V1 src/mainboard/via/epia-m/earlysetup.inc at the top: // set AGP aperture size to 128M movl $CONFIG_ADDR(0, 0x00, 0x84), %eax movb $0x80, %dl PCI_WRITE_CONFIG_BYTE // enable AGP movl $CONFIG_ADDR(0, 0x00, 0xa9), %eax movb $0x01, %dl PCI_WRITE_CONFIG_BYTE // Move AGP to safe place before enabling movl $CONFIG_ADDR(0, 0x00, 0x10), %eax movl $0xe0000000,%edx PCI_WRITE_CONFIG_DWORD However if I follow this with movl $CONFIG_ADDR(0, 0x00, 0x88), %eax movb $2,%dl PCI_WRITE_CONFIG_BYTE Then it locks up. I had thought it might be because the GART is supposed to be in system memory, so if I try and turn it on before DRAM is ready, the AGP system might try to read a page of the GART into its cache, and this results in a fault since the memory isn't there. So I tried doing the last turn on bit later after DRAM is initialized, but that didn't help. -Dave

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PCChips M810
by Leo Currie 22 Jun '04

22 Jun '04

Hello list. Is it still possible to build for the PC-Chips M810LR? I have been looking at the instructions here: http://www.linuxbios.org/developer/portguides/M810LR/index.html but they seem quite out of date. Thanks. Leo

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Re: Question about AGP
by Dave Ashley 22 Jun '04

22 Jun '04

Regarding the EPIA-M, I've determined more about the situation. The CLE266 comes up with the AGP memory area mapped at 0, but AGP is disabled. The actual memory area is defined by pci device 00.0 memory resource #0 at offset $10 in pci config space. When linuxbios goes to try to assign space for this, it gives up after it decides the resource is read-only. What's happening is the bit to enable AGP (00.0 byte $88 bit 1) if set to 0 causes the upper 4 bits of the longword at $10 to always read back 0. So in order to actually configure that region you need to set the bit to 1. But if you set the bit to 1 and the region is still set to the default value of 0 the system locks up because you're now stepping on RAM. So to initialize agp on epia-m you need to 1) Write some safe value to the memory region at 00.0 offset $10, say $e0000000. It won't read back as $e0000000, it'll still read back as $00000000. 2) Enable 00.0 byte $88 bit 1 (bits go from 0 to 7) 3) Set graphics aperture size to 128 mbytes by writing $80 to 00.0 byte $84. 4) Fall through to normal pci resource allocation I haven't implemented this yet within linuxbios V1 but I will try it out and post again. -Dave

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E7501 support in V2
by YhLu 21 Jun '04

21 Jun '04

Eric, I finish the translate raminit.inc to E7501. But in compiling stage, it used up the regs. In the K8, there is enable_mmx_sse.inc to enable cpu access more regs for romcc. So the problem is 1. Can I use the enable_mmx_sse.inc for Xeon without change? It has MMX and sse too. 2. how about the romcc cpu flag. Or just use -mcpu=k8? Regards YH

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coreboot June 2004