coreboot October 2004

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197 discussions

RE: FYI: Merge in progress...
by YhLu 19 Oct '04

19 Oct '04

I will try s2885. -----Original Message----- From: Li-Ta Lo [mailto:ollie@lanl.gov] Sent: Tuesday, October 19, 2004 1:04 PM To: YhLu Cc: 'ebiederman(a)lnxi.com'; 'Ronald G. Minnich'; 'LinuxBIOS' Subject: RE: FYI: Merge in progress... On Tue, 2004-10-19 at 14:02, YhLu wrote: YhLu, Which mainboard are you working on ? Is it some board that's already in the public tree ? If it is already in the public tree, could be commit you change so people on the list can try it. Don't worry about broken code, every mainboard is broken in the current CVS. Ollie > Align is not assigned and it will be used to calculate the base too. (using > resource_max) > > > > root mem limit=0x00febfffff, size=0x0022700000, align=28, base=0x00d0000000 > Allocating VGA resource PCI: 03:00.0 > base1: a 0xd0000000 limit1: 0xfebfffff size: 0x1880000000000000 align: > 0x1c00000000 > base2: a 0xec000000 limit2: 0xfebfffff size: 0x06700000 align: > 0x2bfc40000001a > base1: b 0xf8000000 limit1: 0xf7ffffff size: 0x1880000000000000 align: > 0x1c00000000 > base2: b 0xf8000000 limit2: 0xfebfffff size: 0x06700000 align: > 0x2bfc40000001a > > -----Original Message----- > From: YhLu > Sent: Tuesday, October 19, 2004 12:31 PM > To: YhLu; ebiederman(a)lnxi.com > Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' > Subject: RE: FYI: Merge in progress... > > strange size for prefmem of PCI_DOMAIN > > root mem limit=0x00febfffff, size=0x0022700000, align=28, base=0x00d0000000 > Allocating VGA resource PCI: 03:00.0 > base1: 0xf8000000 limit1: 0xf7ffffff size: 0x1880000000000000 > base2: 0xf8000000 limit2: 0xfebfffff size: 0x06700000 > PCI_DOMAIN: 0000 00 <- [0x0000001000 - 0x0000005fff] io > PCI_DOMAIN: 0000 01 <- [0x00f8000000 - 0x01007fffff] prefmem > PCI_DOMAIN: 0000 02 <- [0x00f8000000 - 0x00fe6fffff] mem > > -----Original Message----- > From: YhLu > Sent: Tuesday, October 19, 2004 12:18 PM > To: ebiederman(a)lnxi.com > Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' > Subject: RE: FYI: Merge in progress... > > Eric, > > The PCI_DOMAIN has two mem resource, root calculate the mem base correctly. > But PCI_DOMAIN get the wrong base. > > root mem limit=0x00febfffff, size=0x0022700000, align=28, base=0x00d0000000 > Allocating VGA resource PCI: 03:00.0 > PCI_DOMAIN: 0000 00 <- [0x0000001000 - 0x0000005fff] io > PCI_DOMAIN: 0000 01 <- [0x00f8000000 - 0x01007fffff] prefmem > PCI_DOMAIN: 0000 02 <- [0x00f8000000 - 0x00fe6fffff] mem > > > > -----Original Message----- > From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] > Sent: Monday, October 18, 2004 7:54 PM > To: YhLu > Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' > Subject: Re: FYI: Merge in progress... > > YhLu <YhLu(a)tyan.com> writes: > > > Get more worse. > > Ouch. If you can boot the board in linux please give me an lspci -vvv > > I don't have enough information to even guess what is going on. > I need to know what the size and limit of the resources are, > so I can walk through the code and see what it would do. > > At the moment I can't even begin to guess what is going wrong. > > The obvious problem of doubly allocating a base register does > not appear to apply. I am using the standard compute_allocate_resource > function which should traverse the bus and do the right thing. > > Unless my rewrite of the limit calculation code is causing a problem. > > I just don't know where to look. > > Eric > _______________________________________________ > Linuxbios mailing list > Linuxbios(a)clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios >

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RE: FYI: Merge in progress...
by YhLu 19 Oct '04

19 Oct '04

Align is not assigned and it will be used to calculate the base too. (using resource_max) root mem limit=0x00febfffff, size=0x0022700000, align=28, base=0x00d0000000 Allocating VGA resource PCI: 03:00.0 base1: a 0xd0000000 limit1: 0xfebfffff size: 0x1880000000000000 align: 0x1c00000000 base2: a 0xec000000 limit2: 0xfebfffff size: 0x06700000 align: 0x2bfc40000001a base1: b 0xf8000000 limit1: 0xf7ffffff size: 0x1880000000000000 align: 0x1c00000000 base2: b 0xf8000000 limit2: 0xfebfffff size: 0x06700000 align: 0x2bfc40000001a -----Original Message----- From: YhLu Sent: Tuesday, October 19, 2004 12:31 PM To: YhLu; ebiederman(a)lnxi.com Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' Subject: RE: FYI: Merge in progress... strange size for prefmem of PCI_DOMAIN root mem limit=0x00febfffff, size=0x0022700000, align=28, base=0x00d0000000 Allocating VGA resource PCI: 03:00.0 base1: 0xf8000000 limit1: 0xf7ffffff size: 0x1880000000000000 base2: 0xf8000000 limit2: 0xfebfffff size: 0x06700000 PCI_DOMAIN: 0000 00 <- [0x0000001000 - 0x0000005fff] io PCI_DOMAIN: 0000 01 <- [0x00f8000000 - 0x01007fffff] prefmem PCI_DOMAIN: 0000 02 <- [0x00f8000000 - 0x00fe6fffff] mem -----Original Message----- From: YhLu Sent: Tuesday, October 19, 2004 12:18 PM To: ebiederman(a)lnxi.com Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' Subject: RE: FYI: Merge in progress... Eric, The PCI_DOMAIN has two mem resource, root calculate the mem base correctly. But PCI_DOMAIN get the wrong base. root mem limit=0x00febfffff, size=0x0022700000, align=28, base=0x00d0000000 Allocating VGA resource PCI: 03:00.0 PCI_DOMAIN: 0000 00 <- [0x0000001000 - 0x0000005fff] io PCI_DOMAIN: 0000 01 <- [0x00f8000000 - 0x01007fffff] prefmem PCI_DOMAIN: 0000 02 <- [0x00f8000000 - 0x00fe6fffff] mem -----Original Message----- From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] Sent: Monday, October 18, 2004 7:54 PM To: YhLu Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' Subject: Re: FYI: Merge in progress... YhLu <YhLu(a)tyan.com> writes: > Get more worse. Ouch. If you can boot the board in linux please give me an lspci -vvv I don't have enough information to even guess what is going on. I need to know what the size and limit of the resources are, so I can walk through the code and see what it would do. At the moment I can't even begin to guess what is going wrong. The obvious problem of doubly allocating a base register does not appear to apply. I am using the standard compute_allocate_resource function which should traverse the bus and do the right thing. Unless my rewrite of the limit calculation code is causing a problem. I just don't know where to look. Eric _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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RE: FYI: Merge in progress...
by YhLu 19 Oct '04

19 Oct '04

strange size for prefmem of PCI_DOMAIN root mem limit=0x00febfffff, size=0x0022700000, align=28, base=0x00d0000000 Allocating VGA resource PCI: 03:00.0 base1: 0xf8000000 limit1: 0xf7ffffff size: 0x1880000000000000 base2: 0xf8000000 limit2: 0xfebfffff size: 0x06700000 PCI_DOMAIN: 0000 00 <- [0x0000001000 - 0x0000005fff] io PCI_DOMAIN: 0000 01 <- [0x00f8000000 - 0x01007fffff] prefmem PCI_DOMAIN: 0000 02 <- [0x00f8000000 - 0x00fe6fffff] mem -----Original Message----- From: YhLu Sent: Tuesday, October 19, 2004 12:18 PM To: ebiederman(a)lnxi.com Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' Subject: RE: FYI: Merge in progress... Eric, The PCI_DOMAIN has two mem resource, root calculate the mem base correctly. But PCI_DOMAIN get the wrong base. root mem limit=0x00febfffff, size=0x0022700000, align=28, base=0x00d0000000 Allocating VGA resource PCI: 03:00.0 PCI_DOMAIN: 0000 00 <- [0x0000001000 - 0x0000005fff] io PCI_DOMAIN: 0000 01 <- [0x00f8000000 - 0x01007fffff] prefmem PCI_DOMAIN: 0000 02 <- [0x00f8000000 - 0x00fe6fffff] mem -----Original Message----- From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] Sent: Monday, October 18, 2004 7:54 PM To: YhLu Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' Subject: Re: FYI: Merge in progress... YhLu <YhLu(a)tyan.com> writes: > Get more worse. Ouch. If you can boot the board in linux please give me an lspci -vvv I don't have enough information to even guess what is going on. I need to know what the size and limit of the resources are, so I can walk through the code and see what it would do. At the moment I can't even begin to guess what is going wrong. The obvious problem of doubly allocating a base register does not appear to apply. I am using the standard compute_allocate_resource function which should traverse the bus and do the right thing. Unless my rewrite of the limit calculation code is causing a problem. I just don't know where to look. Eric _______________________________________________ Linuxbios mailing list Linuxbios(a)clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios

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Re: FYI: Merge in progress...
by Richard Smith 19 Oct '04

19 Oct '04

Stefan Reinauer wrote: > actually a real problem. I have not been able without hacks to find out > the memory "layout" in qemu except the old read,write,read method of > scanning through memory. Emulating enough of a northbridge would allow > holes in memory and such, too. > > Otoh, bochs and qemu (which per default uses the bochs bios) are > concentrating a lot on userspace, even though they would suit perfectly > for demonstrating and testing firmware development (besides the hardware > weirdnesses) Its probally not very well suited then for a reference implementation. Currently there is no "simple" port framework for v2. I'm proposing creating that. Then I'll attempt to use that to do my 440bx port and see how well it works. Perhaps thats what I'll call it... "simple" -- Richard A. Smith

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RE: FYI: Merge in progress...
by YhLu 19 Oct '04

19 Oct '04

Eric, The PCI_DOMAIN has two mem resource, root calculate the mem base correctly. But PCI_DOMAIN get the wrong base. root mem limit=0x00febfffff, size=0x0022700000, align=28, base=0x00d0000000 Allocating VGA resource PCI: 03:00.0 PCI_DOMAIN: 0000 00 <- [0x0000001000 - 0x0000005fff] io PCI_DOMAIN: 0000 01 <- [0x00f8000000 - 0x01007fffff] prefmem PCI_DOMAIN: 0000 02 <- [0x00f8000000 - 0x00fe6fffff] mem -----Original Message----- From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] Sent: Monday, October 18, 2004 7:54 PM To: YhLu Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' Subject: Re: FYI: Merge in progress... YhLu <YhLu(a)tyan.com> writes: > Get more worse. Ouch. If you can boot the board in linux please give me an lspci -vvv I don't have enough information to even guess what is going on. I need to know what the size and limit of the resources are, so I can walk through the code and see what it would do. At the moment I can't even begin to guess what is going wrong. The obvious problem of doubly allocating a base register does not appear to apply. I am using the standard compute_allocate_resource function which should traverse the bus and do the right thing. Unless my rewrite of the limit calculation code is causing a problem. I just don't know where to look. Eric

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RE: FYI: Merge in progress...
by YhLu 19 Oct '04

19 Oct '04

There is overlapping between prefmem and mem. PCI_DOMAIN: 0000 00 <- [0x0000001000 - 0x0000005fff] io PCI_DOMAIN: 0000 01 <- [0x00f8000000 - 0x01007fffff] prefmem PCI_DOMAIN: 0000 02 <- [0x00f8000000 - 0x00fe6fffff] mem PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000003fff] io <node 0 link 0> PCI: 00:18.0 1b8 <- [0x0000000000 - 0x000fffffff] prefmem <node 0 link 0> PCI: 00:18.0 1b0 <- [0x00fc000000 - 0x00fe1fffff] mem <node 0 link 0> PCI: 00:18.0 1da <- [0x0000004000 - 0x0000004fff] io <node 0 link 2> PCI: 00:18.0 1aa <- [0x0100800000 - 0x01007fffff] prefmem <node 0 link 2> PCI: 00:18.0 1a2 <- [0x00fe200000 - 0x00fe4fffff] mem <node 0 link 2> PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> PCI: 00:19.0 1c8 <- [0x0000005000 - 0x0000005fff] io <node 1 link 0> PCI: 00:19.0 198 <- [0x00f8000000 - 0x01007fffff] prefmem <node 1 link 0> PCI: 00:19.0 190 <- [0x00fe500000 - 0x00fe6fffff] mem <node 1 link 0> -----Original Message----- From: YhLu Sent: Monday, October 18, 2004 2:29 PM To: 'ebiederman(a)lnxi.com' Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' Subject: RE: FYI: Merge in progress... self.firstparentdevicelink() How about IORESOURCE_FIXED ? static void pnp_set_resource(device_t dev, struct resource *resource) { if (!(resource->flags & IORESOURCE_ASSIGNED)) { printk_err("ERROR: %s %02x not allocated\n", dev_path(dev), resource->index); return; } -----Original Message----- From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] Sent: Monday, October 18, 2004 2:22 PM To: YhLu Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' Subject: Re: FYI: Merge in progress... YhLu <YhLu(a)tyan.com> writes: > It should config.g bug, there is some un consistent. It could be. I should have fixed this Saturday, but... Looking Hmm... > For dev33 and it sibling > should be .bus = &_dev4.link[2], > instead of > .bus = &_dev4.link[0], Good catch. We do not yet have the link of the parent device set properly in the .bus field. It is always hard coded to 0 :( Ok the fix looks easy, committed. Hopefully I have not missed any other cases... Eric

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RE: PCI IRQ tables
by YhLu 19 Oct '04

19 Oct '04

It's the same if you enable io apic. In the irq-table. Add Entry Bus 1 for 8111 and 8131 Other 8131 bus may be discovered by Kernel. Regards YH -----Original Message----- From: Liu Tao [mailto:liutao@safe-mail.net] Sent: Monday, October 18, 2004 2:50 AM To: YhLu Cc: Dave Aubin; linuxbios(a)clustermatic.org Subject: Re: PCI IRQ tables YhLu wrote: >SMP or single CPU? > >If SMP, and io apci is enabled, you may only focus on mptable.c and >irq-tables.c may only contain device that point to the peer roots bus. > >YH > > How about single CPU with IO-APIC enabled in linux? We are designing a new AMD64 mainboard and want to use linuxbios, the IO architecture is showed in the attached picture. I'm not sure how to specify the "PCI IRQ Router" in pirq table for this architecture. Since each AMD8131 and AMD8111 all provide legacy PIC mode interrupt controller, I think maybe there isn't a global legacy PIC mode PCI IRQ router for different NCHT channels? Maybe APIC is the better choice? Best Regards, Liu Tao

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RE: PCI IRQ tables
by Dave Aubin 19 Oct '04

19 Oct '04

Don't I wish! PCI-X is dangled off of the 8131? I think.... My memory is bad. But one needs to configure the pci irq Before getting to the pci-x in order to see it show up Correctly under linux by lspci. Then I believe your Messages can be handled via the virtual signaled interrupts. -----Original Message----- From: linuxbios(a)mikebell.org [mailto:linuxbios@mikebell.org] Sent: Tuesday, October 19, 2004 1:17 PM To: Liu Tao Cc: YhLu; Dave Aubin; linuxbios(a)clustermatic.org Subject: Re: PCI IRQ tables On Tue, Oct 19, 2004 at 12:12:50PM +0800, Liu Tao wrote: > Or does the interrupt router in pirq table only responses of legacy > 32bitPCI/ISA devices, and Linux handles all the AMD8131? Forgive my ignorance, but doesn't the fact that PCI-X is all message signaled interrupts obviate the need for a PCIIRQ table?

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LinuxBIOS snapshots
by Stefan Reinauer 19 Oct '04

19 Oct '04

Hi, http://snapshots.linuxbios.org/ has been updated a bit. I hope it is more usable now... * New snapshots are only generated, if something changed in CVS * The snapshot script now generates a diff to the last snapshot. * Snapshot directories have a timestamp now. * old snapshots are not deleted automatically anymore (since there are not 48 new ones every day) Comments, wishes, ideas welcome. Stefan

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RE: FYI: Merge in progress...
by YhLu 18 Oct '04

18 Oct '04

Get more worse. -----Original Message----- From: ebiederman(a)lnxi.com [mailto:ebiederman@lnxi.com] Sent: Monday, October 18, 2004 7:04 PM To: YhLu Cc: Ronald G. Minnich; Li-Ta Lo; 'LinuxBIOS' Subject: Re: FYI: Merge in progress... YhLu <YhLu(a)tyan.com> writes: > The pci_device is using PCI 64, how to disable it and let it use 32 bit > premem? I still need to make it an option so we can boot 32bit kernels. All you should need to do is to set the resource limits to 4G. See below for the function to modify to set it. The pci_domain resources that you are seeing current make no sense to me. Eric > > There is overlapping between prefmem and mem. > > Ok that is really weird. > > Do you have a prefmem resource whose limit is below 4G? > > A few small glitches don't surprise me as the 64bit support in > the resources is new, and I am still refining it. And it should > be suboptimal for multiple HT chains. (Because I am artificially > limiting them in the PCI_DOMAIN). > > However. I don't know of a case that would assign > prefmem and mem the same base address. > > In src/northbridge/amd/amdk8/northbridge.c:pci_domain_read_resources > > You might try setting the limit to 4G - 1 == 0xffffffff > > An lspci -vvv of the failing system would be interesting if you have > BIOS under which it boots. > > > > PCI_DOMAIN: 0000 00 <- [0x0000001000 - 0x0000005fff] io > > PCI_DOMAIN: 0000 01 <- [0x00f8000000 - 0x01007fffff] prefmem > > PCI_DOMAIN: 0000 02 <- [0x00f8000000 - 0x00fe6fffff] mem > > PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000003fff] io <node 0 link 0> > > PCI: 00:18.0 1b8 <- [0x0000000000 - 0x000fffffff] prefmem <node 0 link 0> > > PCI: 00:18.0 1b0 <- [0x00fc000000 - 0x00fe1fffff] mem <node 0 link 0> > > PCI: 00:18.0 1da <- [0x0000004000 - 0x0000004fff] io <node 0 link 2> > > PCI: 00:18.0 1aa <- [0x0100800000 - 0x01007fffff] prefmem <node 0 link 2> > > PCI: 00:18.0 1a2 <- [0x00fe200000 - 0x00fe4fffff] mem <node 0 link 2> > > > > PCI: 00:18.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> > > PCI: 00:19.3 94 <- [0x00f8000000 - 0x00fbffffff] mem <gart> > > PCI: 00:19.0 1c8 <- [0x0000005000 - 0x0000005fff] io <node 1 link 0> > > PCI: 00:19.0 198 <- [0x00f8000000 - 0x01007fffff] prefmem <node 1 link 0> > > PCI: 00:19.0 190 <- [0x00fe500000 - 0x00fe6fffff] mem <node 1 link 0> > > > For reference on my HDAMA with a mellanox HCA plugged in I am getting: > > PCI_DOMAIN: 0000 00 <- [0x0000001000 - 0x0000002fff] io > PCI_DOMAIN: 0000 01 <- [0xfcf0000000 - 0xfcf87fffff] prefmem > PCI_DOMAIN: 0000 02 <- [0x00f8000000 - 0x00fd3fffff] mem > PCI: 00:18.0 1b8 <- [0xfcf0000000 - 0xfcf87fffff] prefmem <node 0 link 0> > PCI: 00:18.0 1c0 <- [0x0000001000 - 0x0000002fff] io <node 0 link 0> > PCI: 00:18.0 1b0 <- [0x00fc000000 - 0x00fd3fffff] mem <node 0 link 0> > > > Eric > _______________________________________________ > Linuxbios mailing list > Linuxbios(a)clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios

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coreboot October 2004