I read the document
states that DiskOnChip is required for the linuxBIOS.
The How-to doc in linuxbios tree too is based on
building it for DiskOnChip. Thats what i was confused
whether my Flash device would be supported or not?
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---------- Forwarded message ----------
Date: Wed, 23 Jul 2003 03:12:33 +0000
From: Devi Priya <ijpriya(a)hotmail.com>
I have compiled the linuxbios for sc1200. I also have Dorado xpress
loader. Can you plz tell how could I boot my linux OS from Flash into RAM
using the BLDT from National? I assume the BLDT is for WindowsCE OS.
I assume like this. I can have the (lilo) bootloader as the option
ROM. So my BIOS program shall scan for the option ROMs. Is it correct?
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I finally succeeded in burning linuxbois on rom, however, how can i see if
i succeed or not?
On the HOWTO I should connect linuxbios computer with serial port.....
where should I connect it?
can anybody explain about it?
thanks for any helps
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On Fri, 18 Jul 2003, John Praveen wrote:
> I am new to linux bios. My project is based on
> geode chip. I want my linux OS to be in Flash ROM(capacity 4 MB).
>I have sad news. You can't get a 4 MB chip on that board, I bet.
I can't get to this. This means that 4 MB Flash ROM cannot be used with SC1200? Or is it not supported in LinuxBIOS. Plz help me to understand these.
>probably 4 Mbits, 512 KB. You'll have to put that overweight linux kernel
>on a diet to get it to fit in there.
>One option is 2.4.0 or so, that might fit.
>Can DoC fit on your geode anywhere?
No I don't use DiskOnChip.
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It seems that linuxbios (and linux) uses the irq routing tables
dumped from the bios mptable.
Are there any good reasons to reroute 9 pci/agp interrupts (2 64-bit slots
on the first pci bus + 1 agp + 4 32-bit slots + builtin ethernet on the
second pci bus) to 4 apic pins 16,17,18,19 when at least the pins 5,9,10,11
are not used at all ? Now i have 3 devices sharing
pin 19, and 2 devices on 16,17 and 18.
Is this the intended use of io-apic ?
These may sound like stupid questions to you, but please bear with me, I'm
new to this stuff and have not found anything definitive on google about
M-Systems apparently no longer produces the Disk-on-chip millenium with the
part number MD-2800-D08. The successor MD-2802-D08 is supposed to be
compatible , but I'd like to be a little more certain about it. Has anybody
used the new chips with linuxbios successfully?
Can any bios chip (in DIP-32 package) be replaced by a DoC? Or are there
any requirements not all boards fullfil, like not all needed address lines
are connected? More specifically, I'd like to try to get linuxbios working
on my Asus P2B, which I hope will not be too difficult since some support
for 440BX seems already present.
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Now that we are using romcc, and all functions are inline, it is getting
increasingly painful to deal with linuxbios images smaller than 64k. This
problem happens as we need a 16-bit jump to the start of the linuxbios
code, which limits us to jumping to 0xffff0000. But if linuxbios is bigger
than that, we need to be able to jmp to 0xfffe0000, which is not possible
with the current setup.
We can grow this if we do the following:
make reset a rel jump to 0xfffffff0 - (sizeof entry16). Then put entry 16
right before 0xfffffff0. Entry16 code turns on 32-bit mode and then jumps
to the real start of the linuxbios image -- which can now be anywhere in
the flash image. I could use this now, as could others.
here is sample code which I am trying. It now assembles and inspection of
the object reveals that it is certainly close to correct.
Here's where I wish I had a really good emulator for linux -- checking
this out would be a whole lot easier.
The test reset16 code:
.type reset_start, @function
xorl %eax, %eax
movl %eax, %cr3 /* Invalidate TLB*/
movw %cs, %ax
shlw $4, %ax
movw $gdtptr16_offset, %bx
subw %ax, %bx
data32 lgdt %cs:(%bx)
movl %cr0, %eax
andl $0x7FFAFFD1, %eax /* PG,AM,WP,NE,TS,EM,MP = 0 */
orl $0x60000001, %eax /* CD, NW, PE = 1 */
movl %eax, %cr0
/* Now that we are in protected mode jump to a 32 bit code
data32 ljmp $ROM_CODE_SEG, $__protected_start
/** The gdt has a 4 Gb code segment at 0x10, and a 4 GB data segment
* at 0x18; these are Linux-compatible.
.word gdt_end - gdt -1 /* compute the table limit */
.long gdt /* we know the offset */
The net effect is this: 16-bit reset jmps to a very small startup code
right before 0xfffffff0 that enables full 32-bit mode. We can then jmp
anywhere we want -- to 0xfffe0000 for example -- which we can't do now.
This will alleviate the problem of linuxbios images growing to > 64K which
is a consequence of romcc right now. This will allow us to live with
really big linuxbios images until romcc makes tighter code.
Comments? Errors in the code?